Op amp integrator

Short description: Circuit component performing mathematical integration

The operational amplifier integrator is an electronic integration circuit. Based on the operational amplifier (op-amp), it performs the mathematical operation of integration with respect to time; that is, its output voltage is proportional to the input voltage integrated over time.

## Contents

* 1 Applications
* 2 Design
* 2.1 Ideal circuit
* 2.2 Practical circuit
* 3 Frequency response
* 3.1 Ideal integrator
* 3.2 Practical integrator
* 4 References

## Applications

The typical circuit, and its common name, is a form of the Miller integrator, but based on an op-amp. The circuit is mostly used in analog computers, analog-to-digital converters and wave-shaping circuits.

A common wave-shaping use is as a charge amplifier and they are usually constructed using an operational amplifier though they can use high gain discrete transistor configurations.

## Design

The input current is offset by a negative feedback current flowing in the capacitor, which is generated by an increase in output voltage of the amplifier. The output voltage is therefore dependent on the value of input current it has to offset and the inverse of the value of the feedback capacitor. The greater the capacitor value, the less output voltage has to be generated to produce a particular feedback current flow.

The input capacitance of the circuit is almost zero because of the Miller effect. This ensures that the stray capacitances (the cable capacitance, the amplifier input capacitance, etc.) are virtually grounded and have no influence on the output signal.[1]

### Ideal circuit

This circuit operates by passing a current that charges or discharges the capacitor CF during the time under consideration, which strives to retain the virtual ground condition at the input by off-setting the effect of the input current:

500x500px

Referring to the above diagram, if the op-amp is assumed to be ideal, then the voltage at the inverting (-) input is held equal to the voltage at the non-inverting (+) input as a virtual ground. The input voltage passes a current Vin/R1 through the resistor producing a compensating current flow through the series capacitor to maintain the virtual ground. This charges or discharges the capacitor over time. Because the resistor and capacitor are connected to a virtual ground, the input current does not vary with capacitor charge, so a linear integration that works across all frequencies is achieved (unlike RC circuit § Integrator).

The circuit can be analyzed by applying Kirchhoff's current law at the inverting input:

i1=IB+iF

For an ideal op-amp, IB=0 amps, so:

i1=iF

Furthermore, the capacitor has a voltage-current relationship governed by the equation:

iF=CFd(V2−Vo)dt

Substituting the appropriate variables:

Vin−V2R1=CFd(V2−Vo)dt

For an ideal op-amp, V2=0 volts, so:

VinR1=−CFdVodt

Integrating both sides with respect to time:

∫0tVinR1 dt =−∫0tCFdVodtdt

If the initial value of Vo is assumed to be 0 volts, the output voltage will simply be proportional to the integral of the input voltage:[2]

Vo=−1R1CF∫0tVindt

### Practical circuit

This practical integrator attempts to address a number of flaws of the ideal integrator circuit:

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Real op-amps have a finite open-loop gain, an input offset voltage (VOS) and input bias currents (IB), which may not be well-matched and may be distinguished as IB- going into the inverting input and IB+ going into the non-inverting input. This can cause several issues for the ideal design; most importantly, if Vin=0, both the output offset voltage and the input bias current IB- can cause current to pass through the capacitor, causing the output voltage to drift over time until the op-amp saturates. Similarly, if Vin were a signal centered about zero volts (i.e. without a DC component), no drift would be expected in an ideal circuit, but may occur in a real circuit.

To negate the effect of the input bias current, it is necessary for the non-inverting terminal to include a resistor Rom=R1||RF||RL, which simplifies to R1 provided that R1 is much smaller than the load resistance RL and the feedback resistance RF. Well-matched input bias currents then cause the same voltage drop of R1IB at both the inverting and non-inverting terminals, to effectively cancel out the effect of bias current at those inputs. A CMOS op amp should be selected to minimize errors from input bias current,[3] since MOSFET gates don't require DC current and only have small leakage current on the order of picoamps (pA).[4]

Also, in a DC steady state, an ideal capacitor acts as an open circuit. The DC gain of the ideal circuit is therefore infinite (or in practice, the open-loop gain of a non-ideal op-amp). Any DC (or very low frequency) component may then cause the op amp output to drift into saturation.[5] To prevent this, the DC gain can be limited to a finite value by inserting a large resistor RF in parallel with the feedback capacitor. Note that some op amps have a large internal feedback resistor, and many real capacitors have leakage that is effectively a large feedback resistor.[6]

The addition of these resistors turns the output drift into a finite, preferably small, DC error voltage:

Verror=(RFR1+1)(VOS+IB-(RF∥R1)).

There are other methods, which may be combined, to deal with offset error. A variation of this circuit simply uses an adjustable voltage source instead of Rom and some op amps with very low offset voltage may not even require offset correction.[3] Offset correction is a bigger concern for older op amps, particularly BJT types. Another variation circuit to avoid offset correction that works for AC signals only is to capacitively-couple the input with a large input capacitor before R1 which will naturally charge up to the offset voltage. Additionally, because offset may drift over time and temperature, some op amps provide null offset pins, which can be connected to a potentiometer whose wiper connects to the negative supply to allow readjusting when conditions change.[6] It should also be noted that the integrator is commonly used as part of a feedback/servo loop which provides the DC feedback path, removing the need for a feedback resistor.[3]

## Frequency response

Both the ideal and practical integrator have a gain of 1 at a single frequency called the unity gain frequency f0dB:

f0dB=12πR1CF.

But the overall frequency response of the two circuits differ due to their different pole locations.

### Ideal integrator

The ideal integrator's transfer function 1s corresponds to the time-domain integration property of the Laplace transform. Since its denominator is just s, the transfer function has a pole frequency at f=0. Thus its frequency response has a steady -20 dB per decade slope across all frequencies and appears as a downward-sloping line in a Bode plot.

### Practical integrator

The practical integrator's feedback resistor RF in parallel with the feedback capacitor CF turns the circuit into an active low-pass filter with a pole at the -3 dB cutoff frequency:

fcutoff=12πRFCF.

The frequency response has a relatively constant gain up to fcutoff, and then decreases by 20 dB per decade. While this circuit is no longer an integrator for low frequencies around and below fcutoff, the error is decreases to only 0.5% at one decade above fcutoff and the response approaches that of an ideal integrator as the frequency increases.[5] Real op amps also have a limited gain-bandwidth product (GBWP), which adds an additional high frequency pole. Integration only occurs along the -20 dB per decade slope, which is steady only from frequencies about a decade above fcutoff to about a decade below the op amp's GBWP.[3]

## References

1. ↑ Transducers with Charge Output
2. ↑ "AN1177 Op Amp Precision Design: DC Errors". Microchip. 2 January 2008. Archived from the original on 2019-07-09. https://web.archive.org/web/20190709005741/http://ww1.microchip.com/downloads/en/AppNotes/01177a.pdf. Retrieved 26 December 2012.
3. ↑ 3.0 3.1 3.2 3.3 "Analog Engineer's Circuit: Amplifiers - SBOA275A". 2019. https://www.ti.com/lit/an/sboa275a/sboa275a.pdf.
4. ↑ Zhang, Xiyao (December 2016). "What You Need to Know about Input Bias Current – and Why". https://www.ti.com/lit/ta/ssztaj8/ssztaj8.pdf.
5. ↑ 5.0 5.1 Stata, Ray (1967). "Operational Integrators" (PDF). pp. 10–11. https://www.analog.com/media/en/training-seminars/design-handbooks/ray-stata-op-amp-articles/Operational-Integrators.pdf.
6. ↑ 6.0 6.1 Pavlic, Theodore (2009). "Practical Integrators and Operational Amplifier Offset - Practical Integrators and Operational Amplifier Offset - ECE 327: Electronic Devices and Circuits Laboratory I". https://www.tedpavlic.com/teaching/osu/ece327/lab2_fets/lab2_fets_integrators.pdf.

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