Op amp integrator

Short description: Circuit component performing mathematical integration

The operational amplifier integrator is an electronic integration circuit. Based on the operational amplifier (op-amp), it performs the mathematical operation of integration with respect to time; that is, its output voltage is proportional to the input voltage integrated over time.

## Contents

* 1 Applications
* 2 Design
* 2.1 Ideal circuit
* 2.2 Practical circuit
* 3 Frequency response
* 4 References

## Applications

The integrator circuit is mostly used in analog computers, analog-to-digital converters and wave-shaping circuits. A common wave-shaping use is as a charge amplifier and they are usually constructed using an operational amplifier though they can use high gain discrete transistor configurations.

## Design

The input current is offset by a negative feedback current flowing in the capacitor, which is generated by an increase in output voltage of the amplifier. The output voltage is therefore dependent on the value of input current it has to offset and the inverse of the value of the feedback capacitor. The greater the capacitor value, the less output voltage has to be generated to produce a particular feedback current flow.

The input impedance of the circuit is almost zero because of the Miller effect. Hence all the stray capacitances (the cable capacitance, the amplifier input capacitance, etc.) are virtually grounded and they have no influence on the output signal.[1]

### Ideal circuit

This circuit operates by passing a current that charges or discharges the capacitor [math]\displaystyle{ C_\text{F} }[/math] during the time under consideration, which strives to retain the virtual ground condition at the input by off-setting the effect of the input current:

Referring to the above diagram, if the op-amp is assumed to be ideal, then the voltage at the inverting (-) input is held equal to the voltage at the non-inverting (+) input as a virtual ground. The input voltage passes a current [math]\displaystyle{ V_\text{in}/{R_1} }[/math] through the resistor producing a compensating current flow through the series capacitor to maintain the virtual ground. This charges or discharges the capacitor over time. Because the resistor and capacitor are connected to a virtual ground, the input current does not vary with capacitor charge, so a linear integration that works across all frequencies is achieved (unlike RC circuit § Integrator).

The circuit can be analyzed by applying Kirchhoff's current law at the inverting input:

[math]\displaystyle{ i_{\text{1}} = I_{\text{B}} + i_{\text{F}} }[/math]

For an ideal op-amp, [math]\displaystyle{ I_{\text{B}} = 0 }[/math] amps, so:

[math]\displaystyle{ i_{\text{1}} = i_{\text{F}} }[/math]

Furthermore, the capacitor has a voltage-current relationship governed by the equation:

[math]\displaystyle{ i_{\text{F}} = C_\text{F} \frac{d(V_\text{2} - V_\text{o})}{dt} }[/math]

Substituting the appropriate variables:

[math]\displaystyle{ \frac{V_{\text{in}} - V_{\text{2}}}{R_{\text{1}}} = C_{\text{F}}\frac{d(V_{\text{2}} - V_{\text{o}})}{dt} }[/math]

For an ideal op-amp, [math]\displaystyle{ V_2 = 0 }[/math] volts, so:

[math]\displaystyle{ \frac{V_{\text{in}}}{R_{\text{1}}} = -C_{\text{F}}\frac{dV_{\text{o}}}{dt} }[/math]

Integrating both sides with respect to time:

[math]\displaystyle{ \int_0^t\frac{V_{\text{in}}}{R_{\text{1}}} \ dt\ = - \int_0^t C_{\text{F}} \frac{dV_{\text{o}}}{dt} \, dt }[/math]

If the initial value of [math]\displaystyle{ V_\text{o} }[/math] is assumed to be 0 volts, the output voltage will simply be proportional to the integral of the input voltage:[2]

[math]\displaystyle{ V_{\text{o}} = -\frac{1}{R_{\text{1}}C_{\text{F}}}\int_0^t V_{\text{in}}\, dt }[/math]

### Practical circuit

This practical integrator attempts to address a number of flaws of the ideal integrator circuit:

Real op-amps have a finite open-loop gain, an input offset voltage [math]\displaystyle{ (V_\text{OS}) }[/math] and input bias currents [math]\displaystyle{ (I_\text{B}) }[/math], which may not be well-matched and may be distinguished as [math]\displaystyle{ I_\text{B-} }[/math] going into the inverting input and [math]\displaystyle{ I_\text{B+} }[/math] going into the non-inverting input. This can cause several issues for the ideal design; most importantly, if [math]\displaystyle{ V_{\text{in}} = 0 }[/math], both the output offset voltage and the input bias current [math]\displaystyle{ I_\text{B-} }[/math] can cause current to pass through the capacitor, causing the output voltage to drift over time until the op-amp saturates. Similarly, if [math]\displaystyle{ V_{\text{in}} }[/math] were a signal centered about zero volts (i.e. without a DC component), no drift would be expected in an ideal circuit, but may occur in a real circuit.

To negate the effect of the input bias current, it is necessary for the non-inverting terminal to include a resistor [math]\displaystyle{ R_{\text{om}}=R_1 || R_\text{F} || R_\text{L} , }[/math] which simplifies to [math]\displaystyle{ R_1 }[/math] provided that [math]\displaystyle{ R_1 }[/math] is much smaller than the load resistance [math]\displaystyle{ R_L }[/math] and the feedback resistance [math]\displaystyle{ R_F }[/math]. Well-matched input bias currents then cause the same voltage drop of [math]\displaystyle{ R_1 I_\text{B} }[/math] at both the inverting and non-inverting terminals, to effectively cancel out the effect of bias current at those inputs.

Also, in a DC steady state, an ideal capacitor acts as an open circuit. The DC gain of the ideal circuit is therefore infinite (or in practice, the open-loop gain of a non-ideal op-amp). To counter this, a large resistor [math]\displaystyle{ R_\text{F} }[/math] may be inserted in parallel with the feedback capacitor. This limits the DC gain of the circuit to a finite value. Note that some op amps have a large internal feedback resistor, and many real capacitors have leakage that is effectively a large feedback resistor.[3]

The addition of these resistors turns the output drift into a finite, preferably small, DC error voltage:

[math]\displaystyle{ V_\text{error} = \left( \frac{R_\text{F}}{R_1} + 1 \right) \left( V_\text{OS} + I_\text{B-} \left( R_\text{F} \parallel R_1 \right) \right) . }[/math]

Notes on offset: a variation of this circuit simply uses an adjustable voltage source instead of [math]\displaystyle{ R_{\text{om}} }[/math] and some op amps with very low offset voltage may not even require offset correction.[4] Offset correction is a bigger concern for older op amps, particularly BJT types. Another variation circuit to avoid offset correction that works for AC signals only is to capacitively-couple the input with large input capacitor before [math]\displaystyle{ R_1 }[/math]which will naturally charge up to the offset voltage. Additionally, because offset may drift over time and temperature, some op amps provide null offset pins, which can be connected to a potentiometer whose wiper connects to the negative supply to allow readjusting when conditions change. These methods may be combined for greater ensurance.[3]

## Frequency response

The ideal integrator's Bode plot has a steady -20 dB per decade over all frequencies. This negative slope corresponds to the time-domain integration property of the Laplace transform whose transfer function is simply [math]\displaystyle{ \tfrac{1}{s} }[/math] (i.e. a pole at zero frequency).

The practical integrator is an active first-order low-pass filter with a gain relatively constant up to its pole (the -3 dB cutoff frequency) which is inversely proportional to the [math]\displaystyle{ R_\text{F}C_\text{F} }[/math] time constant:

[math]\displaystyle{ f_{\text{cutoff}}=\frac{1}{{2\pi}{R_{\text{F}}}{ C_{\text{F}}}} }[/math]

Its gain then starts to decrease by 20 dB per decade, and for ideal op amps continues so indefinitely. However, real op amps have a limited gain-bandwidth product (GBWP). Integration only occurs over the -20 dB per decade slope, which is steady only from frequencies about a decade above [math]\displaystyle{ f_\text{cutoff} }[/math] to about a decade below the op amp's GBWP.[4]

For both circuits, the unity gain frequency [math]\displaystyle{ f_\text{0dB} }[/math] is inversely proportional to the [math]\displaystyle{ R_1 C_\text{F} }[/math] time constant:

[math]\displaystyle{ f_{\text{0dB}}=\frac{1}{{2\pi}{R_{\text{1}}}{ C_{\text{F}}}} }[/math]

## References

1. ↑ Transducers with Charge Output
2. ↑ "AN1177 Op Amp Precision Design: DC Errors". Microchip. 2 January 2008. Archived from the original on 2019-07-09. https://web.archive.org/web/20190709005741/http://ww1.microchip.com/downloads/en/AppNotes/01177a.pdf. Retrieved 26 December 2012.
3. ↑ 3.0 3.1 Pavlic, Theodore (2009). "Practical Integrators and Operational Amplifier Offset - Practical Integrators and Operational Amplifier Offset - ECE 327: Electronic Devices and Circuits Laboratory I". https://www.tedpavlic.com/teaching/osu/ece327/lab2_fets/lab2_fets_integrators.pdf.
4. ↑ 4.0 4.1 "Analog Engineer's Circuit: Amplifiers - SBOA275A". 2019. https://www.ti.com/lit/an/sboa275a/sboa275a.pdf.

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