Molecular modeling on GPUs

Short description: Using graphics processing units for molecular simulations

Ionic liquid simulation on GPU (Abalone)

Molecular modeling on GPU is the technique of using a graphics processing unit (GPU) for molecular simulations.[1]

In 2007, Nvidia introduced video cards that could be used not only to show graphics but also for scientific calculations. These cards include many arithmetic units (as of 2022[update], up to 18,176 in the RTX 6000 Ada) working in parallel. Long before this event, the computational power of video cards was purely used to accelerate graphics calculations. The new features of these cards made it possible to develop parallel programs in a high-level application programming interface (API) named CUDA. This technology substantially simplified programming by enabling programs to be written in C/C++. More recently, OpenCL allows cross-platform GPU acceleration.

Quantum chemistry calculations[2][3][4][5][6][7] and molecular mechanics simulations[8][9][10] (molecular modeling in terms of classical mechanics) are among beneficial applications of this technology. The video cards can accelerate the calculations tens of times, so a PC with such a card has the power similar to that of a cluster of workstations based on common processors.

## Contents

* 1 GPU accelerated molecular modelling software
* 1.1 Programs
* 1.2 API
* 1.3 Distributed computing projects
* 2 See also
* 3 References
* 4 External links

## GPU accelerated molecular modelling software

### Programs

* Abalone – Molecular Dynamics (Benchmark)
* ACEMD on GPUs since 2009 Benchmark
* AMBER on GPUs version
* Ascalaph on GPUs version – Ascalaph Liquid GPU
* AutoDock – Molecular docking
* BigDFT Ab initio program based on wavelet
* BrianQC Quantum chemistry (HF and DFT) and molecular mechanics
* Blaze ligand-based virtual screening
* CHARMM – Molecular dynamics [1]
* CP2K Ab initio molecular dynamics
* Desmond on GPUs, workstations, and clusters
* EXESS – Quantum chemistry and ab initio Molecular Dynamics
* Firefly (formerly PC GAMESS)
* FastROCS
* GOMC – GPU Optimized Monte Carlo simulation engine
* GPIUTMD – Graphical processors for Many-Particle Dynamics
* GPU4PySCF – GPU accelerated plugin package for PySCF
* GPUMD \- A lightweight general-purpose molecular dynamics code
* GROMACS on GPUs [11]
* HALMD – Highly Accelerated Large-scale MD package
* HOOMD-blue – Highly Optimized Object-oriented Many-particle Dynamics—Blue Edition
* LAMMPS on GPUs version – lammps for accelerators
* LIO DFT-Based GPU optimized code - [2]
* Octopus has support for OpenCL.
* oxDNA – DNA and RNA coarse-grained simulations on GPUs
* PWmat – Plane-Wave Density Functional Theory simulations
* RUMD \- Roskilde University Molecular Dynamics[12]
* TeraChem – Quantum chemistry and ab initio Molecular Dynamics
* TINKER on GPUs.[13]
* VMD & NAMD on GPUs versions
* YASARA runs MD simulations on all GPUs using OpenCL.

### API

* BrianQC – has an open C level API for quantum chemistry simulations on GPUs, provides GPU-accelerated version of Q-Chem and PSI
* OpenMM – an API for accelerating molecular dynamics on GPUs, v1.0 provides GPU-accelerated version of GROMACS
* mdcore – an open-source platform-independent library for molecular dynamics simulations on modern shared-memory parallel architectures.

### Distributed computing projects

* GPUGRID distributed supercomputing infrastructure
* Folding@home distributed computing project
* Exscalate4Cov large-scale virtual screening experiment

## See also

* Comparison of nucleic acid simulation software
* Comparison of software for molecular mechanics modeling
* Folding@home
* GPU
* GPU cluster
* GPGPU
* List of molecular graphics systems
* List of quantum chemistry and solid state physics software
* Molecular design software
* Molecule editor
* Simulated reality

## References

1. ↑ "Accelerating molecular modeling applications with graphics processors". Journal of Computational Chemistry 28 (16): 2618–2640. December 2007. doi:10.1002/jcc.20829. PMID 17894371. Bibcode: 2007JCoCh..28.2618S.
2. ↑ "Accelerating Density Functional Calculations with Graphics Processing Unit". Journal of Chemical Theory and Computation 4 (8): 1230–1236. August 2008. doi:10.1021/ct8001046. PMID 26631699. Bibcode: 2008JCTC....4.1230Y.
3. ↑ "Two-electron integral evaluation on the graphics processor unit". Journal of Computational Chemistry 29 (3): 334–342. February 2008. doi:10.1002/jcc.20779. PMID 17614340. Bibcode: 2008JCoCh..29..334Y.
4. ↑ "Accelerating resolution-of-the-identity second-order Møller-Plesset quantum chemistry calculations with graphical processing units". The Journal of Physical Chemistry A 112 (10): 2049–2057. March 2008. doi:10.1021/jp0776762. PMID 18229900. Bibcode: 2008JPCA..112.2049V. http://nrs.harvard.edu/urn-3:HUL.InstRepos:5344183.
5. ↑ "Quantum Chemistry on Graphical Processing Units. 1. Strategies for Two-Electron Integral Evaluation". Journal of Chemical Theory and Computation 4 (2): 222–231. February 2008. doi:10.1021/ct700268q. PMID 26620654. Bibcode: 2008JCTC....4..222U.
6. ↑ Ivan S. Ufimtsev; Todd J. Martinez (2008). "Graphical Processing Units for Quantum Chemistry". Computing in Science & Engineering 10 (6): 26–34. doi:10.1109/MCSE.2008.148. Bibcode: 2008CSE....10f..26U.
7. ↑ "Calculation of Quantum Chemical Two-Electron Integrals by Applying Compiler Technology on GPU". Journal of Chemical Theory and Computation 15 (10): 5319–5331. October 2019. doi:10.1021/acs.jctc.9b00560. PMID 31503475. Bibcode: 2019JCTC...15.5319T.
8. ↑ Joshua A. Anderson; Chris D. Lorenz; A. Travesset (2008). "General Purpose Molecular Dynamics Simulations Fully Implemented on Graphics Processing Units". Journal of Computational Physics 227 (10): 5342–5359. doi:10.1016/j.jcp.2008.01.047. Bibcode: 2008JCoPh.227.5342A.
9. ↑ Christopher I. Rodrigues; David J. Hardy; John E. Stone; Klaus Schulten; Wen-Mei W. Hwu. (2008). "GPU acceleration of cutoff pair potentials for molecular modeling applications.". In CF'08: Proceedings of the 2008 Conference on Computing Frontiers, New York, NY, USA: 273–282.
10. ↑ Peter H. Colberg; Felix Höfling (2011). "Highly accelerated simulations of glassy dynamics using GPUs: Caveats on limited floating-point precision". Comput. Phys. Commun. 182 (5): 1120–1129. doi:10.1016/j.cpc.2011.01.009. Bibcode: 2011CoPhC.182.1120C.
11. ↑ "Exploring the Molecular Interactions between Neoculin and the Human Sweet Taste Receptors through Computational Approaches". Sains Malaysiana 49 (3): 517–525. 2020. doi:10.17576/jsm-2020-4903-06. http://www.ukm.my/jsm/pdf_files/SM-PDF-49-3-2020/ARTIKEL 6.pdf.
12. ↑ "RUMD: A general purpose molecular dynamics package optimized to utilize GPU hardware down to a few thousand particles" (in en). SciPost Physics 3 (6). 2017-12-14. doi:10.21468/SciPostPhys.3.6.038. ISSN 2542-4653. Bibcode: 2017ScPP....3...38B.
13. ↑ "Tinker-OpenMM: Absolute and relative alchemical free energies using AMOEBA on GPUs". Journal of Computational Chemistry 38 (23): 2047–2055. September 2017. doi:10.1002/jcc.24853. PMID 28600826. Bibcode: 2017JCoCh..38.2047H.

## External links

* More links for classical and quantum chemistry on GPUs

* v
* t
* e

Processor technologies

Models|

* Turing machine
* Universal
* Post–Turing
* Quantum
* Belt machine
* Stack machine
* Finite-state machine
* with datapath
* Hierarchical
* Queue automaton
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load/store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* comparison
* addressing modes

|

* x86
* ARM
* MIPS
* Power ISA
* SPARC
* Itanium
* Unicore
* MicroBlaze
* RISC-V
* others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

|

Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Tomasulo algorithm
* Reservation station
* Re-order buffer
* Register renaming

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

|

Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* SWAR
* SIMT
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Coprocessor
* ASIC
* FPGA
* CPLD
* Multi-chip module (MCM)
* System in package (SiP)

| By application|

* Microprocessor
* Microcontroller
* Mobile
* Notebook
* Ultra-low-voltage
* ASIP

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Programmable (PSoC)
* Network on a chip (NoC)

Hardware
accelerators|

* AI accelerator
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor processing unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 2-bit
* 4-bit
* 8-bit
* 16-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Integrated memory controller (IMC)

|

Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Program counter

Control unit|

* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)
* Race to sleep

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model

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