List of Intel x86 Families

The following is a list of the Intel x86 processor families by year of creation:

## x86-16

* (1978) 8086
* (1982) 80286

## x86-32

* (1985) 80386
* (1989) 80486
* (1993) Pentium
* (1995) Pentium Pro
* (1997) Pentium II
* (1999) Pentium III
* (2000) Pentium 4
* (2003) Pentium M
* (2006) Core

## x86-64

Starting with Intel Core 2, Intel started releasing processors with different tradeoffs between wattage and performance, to better support mobile and desktop devices. Presumably the x86 architectures order from lowest-wattage to highest-performance was denoted with the following brands: Atom, Celeron, Pentium, i3,i5,i7, Xeon, and i9, where atom was the lowest-wattage/lowest-performance and i9 was the highest-performance/highest-power CPU. Initially, the i-nomenclature included both desktop and mobile versions, but later the mobile CPUs were renamed using m-nomenclature: m3, m5, and m7 making the lineup: m3, m5, m7, Atom, Celeron, Pentium, i3, i5, i7, Xeon, i9.

Year  | Transistor  | CPU Family

|
|

2006  | 65 nm  | Core-2
2008  | 45 nm  | Intel Core gen1 (Nehalem)
2011  | 32 nm  | Intel Core gen2 (SandyBridge)
2012  | 22 nm  | Intel Core gen3 (IvyBridge))
2013  | 22 nm  | Intel Core gen4 (Haswell)
2015  | 14 nm  | Intel Core gen5 (Broadwell)
2015  | 14 nm  | Intel Core gen6 (SkyLake)
2016  | 14 nm  | Intel Core gen7 (KabyLake)
2017  | 10 nm  | Intel Core gen8 (CannonLake)
2019  | 10 nm  | Intel Core gen9 (IceLake)
2020  | TBD nm  | Intel Core gen10 (TigerLake)

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x86 assembly topics

Topics|

* Assembly language
* Comparison of assemblers
* Disassembler
* Instruction set
* Low-level programming language
* Machine code
* Microassembler
* x86 assembly language

Assemblers|

* A86/A386
* Flat Assembler (FASM)
* GNU Assembler (GAS)
* High Level Assembly (HLA)
* Microsoft Macro Assembler (MASM)
* Netwide Assembler (NASM)
* Turbo Assembler (TASM)
* Open Watcom Assembler (WASM)

Programming
issues|

* Call stack
* Flags
* Carry flag
* Direction flag
* Interrupt flag
* Overflow flag
* Zero flag
* Opcode
* Program counter
* Processor register
* Calling conventions
* Instruction listings
* Registers

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Instruction set extensions

SIMD (RISC)|

* Alpha
* MVI
* ARM
* NEON
* SVE
* MIPS
* MDMX
* MIPS-3D
* MXU
* MIPS SIMD
* PA-RISC
* MAX
* Power ISA
* VMX
* SPARC
* VIS

SIMD (x86)|

* MMX (1996)
* 3DNow! (1998)
* SSE (1999)
* SSE2 (2001)
* SSE3 (2004)
* SSSE3 (2006)
* SSE4 (2006)
* SSE5 ~~(2007)~~
* AVX (2008)
* F16C (2009)
* XOP (2009)
* FMA (FMA4: 2011, FMA3: 2012)
* AVX2 (2013)
* AVX-512 (2015)

Bit manipulation|

* BMI (ABM: 2007, BMI1: 2012, BMI2: 2013, TBM: 2012)
* ADX (2014)

Compressed instructions|

* Thumb
* MIPS16e ASE

Security and cryptography|

* AES-NI (2008); 32- and 64-bit ARMv8 also has AES instructions
* CLMUL (2010)
* RDRAND (2012)
* SHA (2013)
* MPX (2015)
* SGX (2015)

Transactional memory|

* TSX (2013)
* ASF

Virtualization|

* VT-x (2005)
* AMD-V (2006)

Suspended extensions' dates have been ~~struck through~~.

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Intel

Subsidiaries|

* 3Dlabs
* Altera
* Intel Security
* Mobileye
* Recon Instruments
* Virtutech
* Wind River Systems

Joint ventures|

* 4Group Holdings (50% owned by Technicolor SA)
* McAfee (49%)

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