Cray MTA-2

The Cray MTA-2 is a shared-memory MIMD computer marketed by Cray Inc. It is an unusual design based on the Tera computer designed by Tera Computer Company. The original Tera computer (also known as the MTA) turned out to be nearly unmanufacturable due to its aggressive packaging and circuit technology. The MTA-2 was an attempt to correct these problems while maintaining essentially the same processor architecture respun in one silicon ASIC, down from some 26 gallium arsenide ASICs in the original MTA; and while regressing the network design from a 4-D torus topology to a less efficient but more scalable Cayley graph topology. The name Cray was added to the second version after Tera Computer Company bought the remains of the Cray Research division of Silicon Graphics in 2000 and renamed itself Cray Inc.

The MTA-2 was not a commercial success, with only one moderately-sized 40-processor system ("Boomer") being sold to the United States Naval Research Laboratory in 2002, and one 4-processor system sold to the Electronic Navigation Research Institute (ENRI) in Japan.

The MTA computers pioneered several technologies, presumably to be used in future Cray Inc. products:

* A simple, whole-machine-oriented programming model.
* Hardware-based multithreading.[1]
* Low-overhead thread synchronization.

## See also

* Cray MTA
* Heterogeneous Element Processor

## References

1. ↑ Petascale computing: Algorithms and applications. Boca Raton: Chapman & Hall/CRC. 2008. pp. 240–241. ISBN 978-1-58488-909-0.

## External links

* Utrecht University HPCG - Cray MTA-2 page

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