VEGA Microprocessors

Short description: Type of microprocessor developed in India

VEGA Microprocessors

VEGA Processor logo

General Info
Designed by| Centre for Development of Advanced Computing
Common manufacturer(s)|

* Semi-Conductor Laboratory[1]
* SilTerra[2]

Architecture and classification
Application| IoT, storage, smart NICs, edge analytics, data analytics, autonomous machines, networking
Instruction set| RISC-V
History

VEGA Microprocessors (also known as VEGA Processors) is an initiative to develop a portfolio of microprocessors, and their hardware ecosystem, by the Centre for Development of Advanced Computing (C-DAC) in India.[3][4] The portfolio includes several indigenously-developed processors based on the RISC-V instruction set architecture (ISA).[5][6][7]

The India Microprocessor Development Programme (IMDP) was started by the Ministry of Electronics and Information Technology with the objective of designing a set of microprocessors, and developing a product line for commercial purposes, to be used as part of a "Make in India" strategy.[8][9]

## Contents

* 1 Products
* 1.1 VEGA
* 1.2 THEJAS
* 1.2.1 Swadeshi Microprocessor Challenge
* 1.3 ARIES
* 1.4 DHRUV
* 2 Commercialization
* 3 See also
* 4 References
* 5 External links

## Products

The initiative has developed the following product lines:[7]

* VEGA microprocessors
* ASTRA interface controllers
* THEJAS system on a chip \- integrating VEGA and ASTRA devices
* ARIES microprocessor development boards
* DHRUV microprocessor

### VEGA

The initiative has developed 5 RISC-V microprocessors that run on FPGAs boards.[10] The ET1031 is a 32-bit processor, with all other processors being 64-bit.[10] Only the 32-bit variant has been physically manufactured within a THEJAS SOC.[11]

Together with affiliated institutions, C-DAC seeks to acquire 10% of the microprocessor market in critical industries like space exploration and defense, where data security is crucial. C-DAC is developing a dual-core chip for high-end applications under the India Microprocessor Development Programme, and the chip is expected to be released in the second half of 2023. From 2024 forward, Dhanush64, Dhruv64, and Dhanush64+ will be released, followed by Octa-core in 2026. Beyond Octa-core, C-DAC chips will feature 48 or 64 cores once the microprocessor and high-performance computing processor programs have converged.[9][12]

### THEJAS

From the VEGA processor cores, 2 SOCs have been created running on the Digilent ARTY A7 FPGA.[10] Only the THEJAS32 has been taped-out for manufacturing for the ARIES microcontroller boards.[11] Silterra Malaysia is where THEJAS32 is manufactured. THEJAS64 is produced domestically at Semi-Conductor Laboratory.[13]

#### Swadeshi Microprocessor Challenge

On December 7, 2021, the Ministry of Electronics and Information Technology honored the Swadeshi Microprocessor Challenge winners. At different phases of the challenge, participants get up to ₹4.40 crore in funding for the development of a hardware prototype and the incubation of a start-up by participating teams. C-DAC and IIT Madras made accessible for the challenge their SoCs, THEJAS32 (VEGA ET1031) and THEJAS64 (VEGA AS1061), based on VEGA 32-bit and 64-bit processors and Shakti. The participating teams successfully implemented the SoCs in a variety of designs. Ten teams became victorious from the 30 finalist teams. Team VEGA FCS FT (AI drone), received a ₹35 lakh cheque for their drone application; second-place winners, Team HWDL, received ₹30 lakh for FM Radio Data System Utilities; and third-place winners, Cytox, received ₹25 lakh for their "cell count" project. Each of the other teams received a check for ₹20 lakh for sharing fourth place. The teams are Astrek Innovations (lower limb exosuit for disabled), Team 6E Resources (remote monitoring and optimization of sewage treatment plant), Team Anshashodhak (unique calibration system for nuclear spectroscopy applications), Team Quicproc (wireless maternal monitoring system), Team Avrio Energy (AI Energy Meter with intelligence at edge and deep learning), and Team JayHawks (anti-theft geofencing based locking system).[14][12]

Thirty finalist teams of the Swadeshi Microprocessor Challenge have been awarded incubation support by Maker Village, the largest electronic system design and production center in India.[15]

### ARIES

The ARIES microcontroller boards have been described by researchers as alternatives to Arduino Uno boards.[7][16]

As of May 2023, the ARIES v3.0 board can be purchased for "around 1,000 Rs each, or about $12".[11] It can be programmed with the Arduino IDE.[11]

### DHRUV

C-DAC created the 1.0 GHz, 64-bit dual-core DHRUV64 microprocessor. It is the third chip produced as part of the DIR-V Programme. In order to support both strategic and commercial applications, DHRUV64 will offer increased efficiency, improved multitasking capability, and dependability. It is appropriate for consumer electronics, automotive systems, 5G infrastructure, industrial automation, and the Internet of Things (IoT).[13][17]

## Commercialization

On August 28, 2024, L&T Semiconductor Technologies (LTSCT) and C-DAC signed a memorandum of understanding (MoU). It will establish a program for the commercialization of cutting-edge technologies created by C-DAC in the areas of electric power systems, embedded software, free and open-source software operating systems, high-performance computing, and semiconductor design and development. LTSCT will leverage C-DAC's extensive pipeline of in-house intellectual property (IP), which includes the VEGA processor, to create global product prospects through application design and validation for field-programmable gate arrays. By facilitating the creation of cutting-edge goods and solutions for the automotive, industrial, information and communications technology infrastructure, and energy sectors, the collaboration to create indigenous ICs and SoCs based in Vega is expected to pick up speed.[18][19]

## See also

SHAKTI Series \- RISC-V microprocessor developed by IIT Madras

## References

1. ↑ Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs". Centre for Development of Advanced Computing. https://amritmahotsav.negd.in/presentation/day5/VEGA Processors.pdf.
2. ↑ Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs". Centre for Development of Advanced Computing. https://amritmahotsav.negd.in/presentation/day5/VEGA Processors.pdf.
3. ↑ "CDAC all set to develop crucial technology indigenously". The Times of India. 30 March 2019. https://timesofindia.indiatimes.com/city/pune/cdac-all-set-to-develop-crucial-tech-indigenously/articleshow/68638592.cms.
4. ↑ "India to build 11 new supercomputers, with indigenous processors developed by C-DAC". The Print. 22 December 2019. https://theprint.in/science/india-to-build-11-new-supercomputers-with-indigenous-processors-developed-by-c-dac/339196/.
5. ↑ "India Preps RISC-V Processors". 27 January 2016. https://www.eetimes.com/india-preps-risc-v-processors/.
6. ↑ "Design and Implementation of a RISC-V ISA-based In-order Dual Issue Superscalar Processor". RISC-V Summit. 5 December 2018. https://riscv.org/wp-content/uploads/2018/12/16.00-Rao-TT-Design-and-Implementation-of-a-RISC-V-ISA-based-In-order-Dual-Issue-Superscalar-Processor-Libin-T.-T-S-and-Krishnakumar-Rao.pdf.
7. ↑ 7.0 7.1 7.2 Kaur, Roopmeet; Dash, Biswajeet; Shiney O., Jeba; Singh, Sukhpreet (19 July 2023). "Revolutionizing CanSat Technology with Vega Processors: A Comparative Study". 2023 2nd International Conference on Edge Computing and Applications (ICECAA). pp. 1276–1282. doi:10.1109/ICECAA58104.2023.10212104. ISBN 979-8-3503-4757-9. https://doi.org/10.1109/ICECAA58104.2023.10212104. Retrieved 17 January 2024.
8. ↑ "स्वदेशी Microprocessor Challenge - Innovate Solutions for #आत्मनिर्भर भारत". My Gov India. https://innovate.mygov.in/swadeshi-microprocessor-challenge/.
9. ↑ 9.0 9.1 Nair, Ardhra (2023-02-04). "CDAC hopes to corner 10% of microprocessor market". The Times of India. ISSN 0971-8257. https://timesofindia.indiatimes.com/city/pune/cdac-hopes-to-corner-10-of-microprocessor-market/articleshow/97599311.cms.
10. ↑ 10.0 10.1 10.2 Aufranc, Jean-Luc (4 February 2022). "India goes RISC-V with VEGA processors - CNX Software". CNX Software - Embedded Systems News (CNXSoft). https://www.cnx-software.com/2022/02/04/india-goes-risc-v-with-vega-processors/.
11. ↑ 11.0 11.1 11.2 11.3 Aufranc, Jean-Luc (31 May 2023). "ARIES v3.0 development board features India-made VEGA RISC-V processor - CNX Software". CNX Software - Embedded Systems News (CNXSoft). https://www.cnx-software.com/2023/05/31/aries-v3-0-development-board-features-india-made-vega-risc-v-processor/.
12. ↑ 12.0 12.1 Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs". Centre for Development of Advanced Computing. https://amritmahotsav.negd.in/presentation/day5/VEGA Processors.pdf.
13. ↑ 13.0 13.1 "DHRUV64: India’s First 1.0 GHz, 64-bit dual-core Microprocessor". 2025-12-15. https://www.pib.gov.in/PressNoteDetails.aspx?id=156505&NoteId=156505&ModuleId=3&reg=6&lang=1.
14. ↑ "MeitY felicitates winners of microprocessor challenge; participants get financial support" (in en). 2021-12-07. https://www.businesstoday.in/latest/economy/story/meity-felicitates-winners-of-microprocessor-challenge-participants-get-financial-support-314698-2021-12-07.
15. ↑ "Maker Village of Digital University Kera to incubate 10 winners of Swadeshi Microprocessor Challenge" (in en). 2021-12-10. https://english.mathrubhumi.com/features/technology/maker-village-of-digital-university-kera-to-incubate-10-winners-of-swadeshi-microprocessor-challenge-1.6257128.
16. ↑ Sharma, Devansh; Kumar, Ashish; Dhall, Aryan; Tomar, Riya; Pundir, Vikrant Singh; Bhandari, Hemant (November 2023). "Efficient Parking & Toll Management: A RFID-Enabled Approach with Vega Aries Development Board". International Journal of Innovative Science and Research Technology 8 (11): 1559–1564. https://ijisrt.com/assets/upload/files/IJISRT23NOV1691.pdf. Retrieved 17 January 2024.
17. ↑ "India gets its first homegrown 1.0 GHz microprocessor, DHRUV64: Key features, design and what is next". The Times of India. 2025-12-15. ISSN 0971-8257. https://timesofindia.indiatimes.com/technology/tech-news/india-gets-its-first-homegrown-1-0-ghz-microprocessor-dhruv64-key-features-design-and-whats-coming-next/articleshow/125984426.cms.
18. ↑ "L&T Semiconductor Technologies Inks MoU with C-DAC" (in en). https://www.larsentoubro.com/pressreleases/2024-08-28-lt-semiconductor-technologies-inks-mou-with-c-dac/.
19. ↑ "L&T Semiconductor, C-DAC sign pact to jointly work on indigenous chip tech". 28 August 2024. https://www.business-standard.com/technology/tech-news/l-t-semiconductor-c-dac-sign-pact-to-jointly-work-on-indigenous-chip-technology-124082801440_1.html.

## External links

* Official website
* VEGA Microprocessors's channel on YouTube
* CNX Software: Article

* v
* t
* e

Reduced instruction set computer (RISC) architectures

* IBM 801
* Berkeley RISC
* Stanford MIPS

Active|

* Analog Devices Blackfin
* ARC
* ARM
* AVR
* eSi-RISC
* LatticeMico8
* LatticeMico32
* MIPS
* OpenRISC
* Power ISA
* Renesas M32R
* Renesas SuperH
* Renesas V850
* RISC-V
* Sunway
* SPARC
* Unicore
* Xilinx MicroBlaze
* Xilinx PicoBlaze
* POWER
* PowerPC
* XMOS XCore XS1

Historic|

* Alpha
* AMD Am29000
* Apollo PRISM
* Atmel AVR32
* Clipper
* CRISP
* DEC Prism
* Intel i860
* Intel i960
* Meta
* MIPS-X
* Motorola 88000
* Motorola M·CORE
* PA-RISC
* ROMP

* v
* t
* e

Processor technologies

Models|

* Turing machine
* Universal
* Post–Turing
* Quantum
* Belt machine
* Stack machine
* Finite-state machine
* with datapath
* Hierarchical
* Queue automaton
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load/store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* comparison
* addressing modes

|

* x86
* ARM
* MIPS
* Power ISA
* SPARC
* Itanium
* Unicore
* MicroBlaze
* RISC-V
* others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

|

Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Tomasulo algorithm
* Reservation station
* Re-order buffer
* Register renaming

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

|

Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* SWAR
* SIMT
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Coprocessor
* ASIC
* FPGA
* CPLD
* Multi-chip module (MCM)
* System in package (SiP)

| By application|

* Microprocessor
* Microcontroller
* Mobile
* Notebook
* Ultra-low-voltage
* ASIP

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Programmable (PSoC)
* Network on a chip (NoC)

Hardware
accelerators|

* AI accelerator
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor processing unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 2-bit
* 4-bit
* 8-bit
* 16-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Integrated memory controller (IMC)

|

Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Program counter

Control unit|

* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)
* Race to sleep

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model

Template:Programmable logic

* v
* t
* e

Microcontrollers

Main|

* Single-board microcontroller
* Special function register

Architectures|

* 68000
* 8051
* ARC
* ARM
* AVR
* MIPS
* PIC
* RISC-V

Families|

| 4-bit|

* Am2900
* MARC4
* S1C6x
* TLCS-47
* TMS1000
* μCOM-4

|

8-bit|

* 6800
* 68HC05
* 68HC08
* 68HC11
* S08
* RS08
* 6502
* 65C134
* 65C265
* MELPS 740
* 78K
* 8048
* 8051
* XC800
* AVR
* COP8
* H8
* PIC10/12/16/17/18
* ST6/ST7
* STM8
* Z8
* Z80
* eZ80
* Rabbit 2000
* TLCS-870

16-bit|

* 68HC12/16
* C166
* CR16/C
* H8S
* MSP430
* PIC24/dsPIC
* R8C
* RL78
* TLCS-900
* Z8000

32-bit|

* Am29000
* ARM/Cortex-M
* EFM32
* LPC
* SAM
* STM32
* XMC
* AVR32
* CRX
* FR
* FR-V
* H8SX
* M32R
* 68000
* ColdFire
* PIC32
* PowerPC
* MPC5xx
* Propeller
* TLCS-900
* TriCore
* V850
* RX
* Z80000

64-bit|

* PowerPC64

Interfaces|

| Programming|

* In-circuit serial programming (ICSP)
* In-system programming (ISP)
* Program and Debug Interface (PDI)
* High-voltage serial programming (HVSP)
* High voltage parallel programming (HVPP)
* Bootloader
* ROM
* aWire

|

Debugging|

* Nexus (standard)
* Joint Test Action Group (JTAG)
* debugWIRE (Atmel)
* In-circuit debugging (ICD)
* In-circuit emulator (ICE)
* In-target probe (ITP)

Simulators|

* gpsim

Lists|

* List of common microcontrollers
* By manufacturer
* Intel
* NXP/Freescale
* Infineon
* Renesas Electronics
* List of Wi-Fi microcontrollers

See also|

* Embedded system
* Programmable logic controller
* List of microprocessors

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