VEGA Microprocessors

Short description: Type of microprocessor developed in India

VEGA Microprocessors

VEGA Processor logo

General Info
Designed by| Centre for Development of Advanced Computing
Common manufacturer(s)|

* Semi-Conductor Laboratory[citation needed]
* SilTerra[citation needed]

Architecture and classification
Application| IoT, Storage, Smart NICs, Edge Analytics, Data Analytics, Autonomous Machines, Storage, Networking
Instruction set| RISC-V
History

VEGA Microprocessors (also referred to as VEGA Processors) is an initiative to develop a portfolio of microprocessors, and their hardware ecosystem, by the Centre for Development of Advanced Computing (C-DAC) in India.[1][2] The portfolio includes several indigenously-developed processors based on the RISC-V instruction set architecture (ISA).[3][4][5]

The programme was started by the Ministry of Electronics and Information Technology with the objective of designing a set of microprocessors, and developing a product line for commercial purposes, to be used as part of a "Make in India" strategy.[6]

## Contents

* 1 Products
* 1.1 VEGA
* 1.2 THEJAS
* 1.3 ARIES
* 2 References
* 3 External links

## Products

The initiative has developed the following product lines:[5]

* VEGA microprocessors
* ASTRA interface controllers
* THEJAS system on a chip \- integrating VEGA and ASTRA devices
* ARIES microcontroller development boards

### VEGA

The initiative has developed 5 RISC-V microprocessors that run on FPGAs boards.[7] The ET1031 is a 32-bit processor, with all other processors being 64-bit.[7] Only the 32-bit variant has been physically manufactured within a THEJAS SOC.[8]

### THEJAS

From the VEGA processor cores, 2 SOCs have been created running on the Digilent ARTY A7 FPGA.[7] Only the THEJAS32 has been taped-out for manufacturing for the ARIES microcontroller boards.[8]

### ARIES

The ARIES microcontroller boards have been described by researchers as alternatives to Arduino Uno boards.[5][9]

As of May 2023, the ARIES v3.0 board can be purchased for "around 1,000 Rs each, or about $12".[8] It can be programmed with the Arduino IDE.[8]

## References

1. ↑ "CDAC all set to develop crucial technology indigenously". The Times of India. 30 March 2019. https://timesofindia.indiatimes.com/city/pune/cdac-all-set-to-develop-crucial-tech-indigenously/articleshow/68638592.cms.
2. ↑ "India to build 11 new supercomputers, with indigenous processors developed by C-DAC". The Print. 22 December 2019. https://theprint.in/science/india-to-build-11-new-supercomputers-with-indigenous-processors-developed-by-c-dac/339196/.
3. ↑ "India Preps RISC-V Processors". 27 January 2016. https://www.eetimes.com/india-preps-risc-v-processors/.
4. ↑ "DESIGN AND IMPLEMENTATION OF A RISC-V ISA-BASED IN-ORDER DUAL ISSUE SUPERSCALAR PROCESSOR". RISC-V Summit. 5 December 2018. https://riscv.org/wp-content/uploads/2018/12/16.00-Rao-TT-Design-and-Implementation-of-a-RISC-V-ISA-based-In-order-Dual-Issue-Superscalar-Processor-Libin-T.-T-S-and-Krishnakumar-Rao.pdf.
5. ↑ 5.0 5.1 5.2 Kaur, Roopmeet; Dash, Biswajeet; Shiney O, Jeba; Singh, Sukhpreet (19 July 2023). "Revolutionizing CanSat Technology with Vega Processors: A Comparative Study". 2023 2nd International Conference on Edge Computing and Applications (ICECAA). pp. 1276–1282. doi:10.1109/ICECAA58104.2023.10212104. ISBN 979-8-3503-4757-9. https://doi.org/10.1109/ICECAA58104.2023.10212104. Retrieved 17 January 2024.
6. ↑ "स्वदेशी Microprocessor Challenge - Innovate Solutions for #आत्मनिर्भर भारत". My Gov India. https://innovate.mygov.in/swadeshi-microprocessor-challenge/.
7. ↑ 7.0 7.1 7.2 Aufranc, Jean-Luc (4 February 2022). "India goes RISC-V with VEGA processors - CNX Software". CNX Software - Embedded Systems News (CNXSoft). https://www.cnx-software.com/2022/02/04/india-goes-risc-v-with-vega-processors/.
8. ↑ 8.0 8.1 8.2 8.3 Aufranc, Jean-Luc (31 May 2023). "ARIES v3.0 development board features India-made VEGA RISC-V processor - CNX Software". CNX Software - Embedded Systems News (CNXSoft). https://www.cnx-software.com/2023/05/31/aries-v3-0-development-board-features-india-made-vega-risc-v-processor/.
9. ↑ Sharma, Devansh; Kumar, Ashish; Dhall, Aryan; Tomar, Riya; Pundir, Vikrant Singh; Bhandari, Hemant (November 2023). "fficient Parking & Toll Management: A RFID-Enabled Approach with Vega Aries Development Board". International Journal of Innovative Science and Research Technology 8 (11): 1559–1564. https://ijisrt.com/assets/upload/files/IJISRT23NOV1691.pdf. Retrieved 17 January 2024.

## External links

* VEGA Processors YouTube channel
* CNX Software: Article

* v
* t
* e

Reduced instruction set computer (RISC) architectures

* IBM 801
* Berkeley RISC
* Stanford MIPS

Active|

* Analog Devices Blackfin
* ARC
* ARM
* AVR
* eSi-RISC
* LatticeMico8
* LatticeMico32
* MIPS
* OpenRISC
* Power ISA
* Renesas M32R
* Renesas SuperH
* Renesas V850
* RISC-V
* Sunway
* SPARC
* Unicore
* Xilinx MicroBlaze
* Xilinx PicoBlaze
* POWER
* PowerPC
* XMOS XCore XS1

Historic|

* Alpha
* AMD Am29000
* Apollo PRISM
* Atmel AVR32
* Clipper
* CRISP
* DEC Prism
* Intel i860
* Intel i960
* Meta
* MIPS-X
* Motorola 88000
* Motorola M·CORE
* PA-RISC
* ROMP

* v
* t
* e

Processor technologies

Models|

* Turing machine
* Universal
* Post–Turing
* Quantum
* Belt machine
* Stack machine
* Finite-state machine
* with datapath
* Hierarchical
* Queue automaton
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load/store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* comparison
* addressing modes

|

* x86
* ARM
* MIPS
* Power ISA
* SPARC
* Itanium
* Unicore
* MicroBlaze
* RISC-V
* others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

|

Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Tomasulo algorithm
* Reservation station
* Re-order buffer
* Register renaming

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

|

Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* SWAR
* SIMT
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Coprocessor
* ASIC
* FPGA
* CPLD
* Multi-chip module (MCM)
* System in package (SiP)

| By application|

* Microprocessor
* Microcontroller
* Mobile
* Notebook
* Ultra-low-voltage
* ASIP

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Programmable (PSoC)
* Network on a chip (NoC)

Hardware
accelerators|

* AI accelerator
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor processing unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 2-bit
* 4-bit
* 8-bit
* 16-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Integrated memory controller (IMC)

|

Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Program counter

Control unit|

* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)
* Race to sleep

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model

* v
* t
* e

Programmable logic

Concepts|

* ASIC
* SoC
* FPGA
* Logic block
* CPLD
* EPLD
* PLA
* PAL
* GAL
* PSoC
* Reconfigurable computing
* Xputer
* Soft microprocessor
* Circuit underutilization
* High-level synthesis
* Hardware acceleration

Languages|

* Verilog
* A
* AMS
* VHDL
* AMS
* VITAL
* SystemVerilog
* DPI
* SystemC
* AHDL
* Handel-C
* PSL
* UPF
* PALASM
* ABEL
* CUPL
* OpenVera
* C to HDL
* Flow to HDL
* MyHDL
* JHDL
* ELLA

Companies|

* Accellera
* Actel
* Achronix
* AMD
* Aldec
* Atmel
* Cadence
* Cypress
* Duolog
* Forte
* Intel
* Altera
* Lattice
* National
* Mentor Graphics
* Microsemi
* Signetics
* Synopsys
* Magma
* Virage Logic
* Texas Instruments
* Tabula
* Xilinx

Products|

| Hardware|

* iCE
* Stratix
* Virtex

|

Software|

* Intel Quartus Prime
* Xilinx ISE
* Xilinx Vivado
* ModelSim
* VTR
* Simulators

IP|

| Proprietary|

* ARC
* ARM Cortex-M
* LEON
* LatticeMico8
* MicroBlaze
* PicoBlaze
* Nios
* Nios II

|

Open-source|

* JOP
* LatticeMico32
* OpenCores
* OpenRISC
* 1200
* RISC-V
* Zet

* v
* t
* e

Microcontrollers

Main|

* Single-board microcontroller
* Special function register

Architectures|

* 68000
* 8051
* ARC
* ARM
* AVR
* MIPS
* PIC
* RISC-V

Families|

| 4-bit|

* Am2900
* MARC4
* S1C6x
* TLCS-47
* TMS1000
* μCOM-4

|

8-bit|

* 6800
* 68HC05
* 68HC08
* 68HC11
* S08
* RS08
* 6502
* 65C134
* 65C265
* MELPS 740
* 78K
* 8048
* 8051
* XC800
* AVR
* COP8
* H8
* PIC10/12/16/17/18
* ST6/ST7
* STM8
* Z8
* Z80
* eZ80
* Rabbit 2000
* TLCS-870

16-bit|

* 68HC12/16
* C166
* CR16/C
* H8S
* MSP430
* PIC24/dsPIC
* R8C
* RL78
* TLCS-900
* Z8000

32-bit|

* Am29000
* ARM/Cortex-M
* EFM32
* LPC
* SAM
* STM32
* XMC
* AVR32
* CRX
* FR
* FR-V
* H8SX
* M32R
* 68000
* ColdFire
* PIC32
* PowerPC
* MPC5xx
* Propeller
* TLCS-900
* TriCore
* V850
* RX
* Z80000

64-bit|

* PowerPC64

Interfaces|

| Programming|

* In-circuit serial programming (ICSP)
* In-system programming (ISP)
* Program and Debug Interface (PDI)
* High-voltage serial programming (HVSP)
* High voltage parallel programming (HVPP)
* Bootloader
* ROM
* aWire

|

Debugging|

* Nexus (standard)
* Joint Test Action Group (JTAG)
* debugWIRE (Atmel)
* In-circuit debugging (ICD)
* In-circuit emulator (ICE)
* In-target probe (ITP)

Simulators|

* gpsim

Lists|

* List of common microcontrollers
* By manufacturer
* Intel
* NXP/Freescale
* Infineon
* Renesas Electronics
* List of Wi-Fi microcontrollers

See also|

* Embedded system
* Programmable logic controller
* List of microprocessors

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