List of AMD processors with 3D graphics

Short description: None

This is a list of microprocessors designed by AMD containing a 3D integrated graphics processing unit (iGPU), including those under the AMD APU (Accelerated Processing Unit) product series.

## Contents

* 1 Features overview
* 2 Graphics API overview
* 3 Desktop processors with 3D graphics
* 3.1 APU or Radeon Graphics branded
* 3.1.1 Lynx: "Llano" (2011)
* 3.1.2 Virgo: "Trinity" (2012)
* 3.1.3 "Richland" (2013)
* 3.1.4 "Kabini" (2013, SoC)
* 3.1.5 "Kaveri" (2014) & "Godavari" (2015)
* 3.1.6 "Carrizo" (2016)
* 3.1.7 "Bristol Ridge" (2016)
* 3.1.8 "Raven Ridge" (2018)
* 3.1.9 "Picasso" (2019)
* 3.1.10 "Renoir" (2020)
* 3.1.11 "Cezanne" (2021)
* 3.2 Non APU or Radeon Graphics branded
* 3.2.1 "Raphael" (2022)
* 3.2.2 "Phoenix" (2024)
* 4 Server APUs
* 4.1 Opteron X2100-series "Kyoto" (2013) & "Steppe Eagle" (2016)
* 4.2 Opteron X3000-series "Toronto" (2017)
* 5 Mobile processors with 3D graphics
* 5.1 APU or Radeon Graphics branded
* 5.1.1 Sabine: "Llano" (2011)
* 5.1.2 Comal: "Trinity" (2012)
* 5.1.3 "Richland" (2013)
* 5.1.4 "Kaveri" (2014)
* 5.1.5 "Carrizo" (2015)
* 5.1.6 "Bristol Ridge" (2016)
* 5.1.7 "Raven Ridge" (2017)
* 5.1.8 "Picasso" (2019)
* 5.1.9 "Renoir" (2020)
* 5.1.9.1 U
* 5.1.9.2 H
* 5.1.10 "Lucienne" (2021)
* 5.1.11 "Cezanne" (2021)
* 5.1.11.1 U
* 5.1.11.2 H
* 5.1.12 "Barceló" (2022)
* 5.1.13 "Rembrandt" (2022)
* 5.1.14 "Phoenix" (2024)
* 5.1.15 "Dragon Range" (2023)
* 6 Ultra-mobile APUs
* 6.1 Brazos: "Desna", "Ontario", "Zacate" (2011)
* 6.2 Brazos 2.0: "Ontario", "Zacate" (2012)
* 6.3 Brazos-T: "Hondo" (2012)
* 6.4 "Kabini", "Temash" (2013)
* 6.4.1 Temash, Elite Mobility APU
* 6.4.2 Kabini, Mainstream APU
* 6.5 "Beema", "Mullins" (2014)
* 6.5.1 Mullins, Tablet/2-in-1 APU
* 6.5.2 Beema, Notebook APU
* 6.6 "Carrizo-L" (2015)
* 6.7 "Stoney Ridge" (2016)
* 6.8 "Dalí" (2020)
* 6.9 "Pollock" (2020)
* 6.10 "Mendocino" (2022)
* 7 Embedded APUs
* 7.1 G-Series
* 7.1.1 Brazos: "Ontario" and "Zacate" (2011)
* 7.1.2 "Kabini" (2013, SoC)
* 7.1.3 "Steppe Eagle" (2014, SoC)
* 7.1.4 "Crowned Eagle" (2014, SoC)
* 7.1.5 LX-Family (2016, SoC)
* 7.1.6 I-Family: "Brown Falcon" (2016, SoC)
* 7.1.7 J-Family: "Prairie Falcon" (2016, SoC)
* 7.2 R-Series
* 7.2.1 Comal: "Trinity" (2012)
* 7.2.2 "Bald Eagle" (2014)
* 7.2.3 "Merlin Falcon" (2015, SoC)
* 7.3 1000-Series
* 7.3.1 V1000-Family: "Great Horned Owl" (2018, SoC)
* 7.3.2 R1000-Family: "Banded Kestrel" (2019, SoC)
* 7.4 2000-Series
* 7.4.1 V2000-Family: "Grey Hawk" (2020, SoC)
* 7.4.2 R2000-Family: "River Hawk" (2022, SoC)
* 8 Custom APUs
* 9 See also
* 10 Notes
* 11 References
* 12 External links

## Features overview

The following table shows features of AMD's APUs (see also: List of AMD accelerated processing units).

[ VisualEditor ] [view * talk * edit]

Codename | Server  | Basic  |  | Toronto |  |  |

|
|
|
|
|
|
|

Micro  |  |  | Kyoto |
Desktop | Mainstream  |  | Carrizo | Bristol Ridge | Raven Ridge | Picasso |  |
Entry  | Llano | Trinity | Richland | Kaveri |
Basic  |  |  | Kabini |
Mobile | Performance  |  | Renoir |
Mainstream  | Llano | Trinity | Richland | Kaveri | Carrizo | Bristol Ridge | Raven Ridge | Picasso
Entry  |  |  | Dalí
Basic  |  | Desna, Ontario, Zacate | Kabini, Temash | Beema, Mullins | Carrizo-L | Stoney Ridge
Embedded  |  | Trinity |  | Bald Eagle | Merlin Falcon,
Brown Falcon |  | Great Horned Owl |  | Ontario, Zacate | Kabini | Steppe Eagle, Crowned Eagle,
LX-Family |  | Prairie Falcon | Banded Kestrel
Platform | High, standard and low power | Low and ultra-low power
Released | Aug 2011 | Oct 2012 | Jun 2013 | Jan 2014 | Jun 2015 | Jun 2016 | Oct 2017 | Jan 2019 | Mar 2020 | Jan 2011 | May 2013 | Apr 2014 | May 2015 | Feb 2016 | Apr 2019
CPU microarchitecture | K10 | Piledriver | Steamroller | Excavator | "Excavator+"[1] | Zen | Zen+ | Zen 2 | Bobcat | Jaguar | Puma | Puma+[2] | "Excavator+" | Zen
ISA | x86-64 | x86-64
Socket | Desktop | High-end | N/A | N/A
Mainstream | N/A | AM4
Entry | FM1 | FM2 | FM2+[lower-alpha 1] | N/A
Basic | N/A | N/A | AM1 | N/A
Other | FS1 | FS1+, FP2 | FP3 | FP4 | FP5 | FP6 | FT1 | FT3 | FT3b | FP4 | FP5
PCI Express version | 2.0 | 3.0 | 2.0 | 3.0
[[Engineering:Semiconductor device fabricatFab. (Nanometre|nm]]) | GF 32SHP
(HKMG SOI) | GF 28SHP
(HKMG bulk) | GF 14LPP
(FinFET bulk) | GF 12LP
(FinFET bulk) | TSMC N7
(FinFET bulk) | TSMC N40
(bulk) | TSMC N28
(HKMG bulk) | GF 28SHP
(HKMG bulk) | GF 14LPP
(FinFET bulk)
Die area (mm2) | 228 | 246 | 245 | 245 | 250 | 210[3] | 156 | 75 (+ 28 FCH) | 107 | ? | 125 |
Min TDP (W) | 35 | 17 | 12 | 10 | 4.5 | 4 | 3.95 | 10 | 6
Max APU TDP (W) | 100 | 95 | 65 | 54 | 18 | 25
Max stock APU base clock (GHz) | 3 | 3.8 | 4.1 | 3.7 | 3.8 | 3.6 | 3.7 | 3.3 | 1.75 | 2.2 | 2 | 2.2 | 3.2 | 3.3
Max APUs per node[lower-alpha 2] | 1 | 1
Max CPU[lower-alpha 3] cores per APU | 4 | 8 | 2 | 4 | 2
Max threads per CPU core | 1 | 2 | 1 | 2
Integer structure | 3+3 | 2+2 | 4+2 | 4+2+1 | 1+1+1+1 | 2+2 | 4+2
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF |  |
IOMMU[lower-alpha 4] | N/A |
BMI1, AES-NI, CLMUL, and F16C | N/A |
MOVBE | N/A |
AVIC, BMI2 and RDRAND | N/A |
ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, and CLZERO | N/A |  | N/A |
WBNOINVD, CLWB, RDPID, RDPRU, and MCOMMIT | N/A |  | N/A
FPUs per core | 1 | 0.5 | 1 | 1 | 0.5 | 1
Pipes per FPU | 2 | 2
FPU pipe width | 128-bit | 256-bit | 80-bit | 128-bit
CPU instruction set SIMD level | SSE4a[lower-alpha 5] | AVX | AVX2 | SSSE3 | AVX | AVX2
3DNow! | 3DNow!+ | N/A | N/A
PREFETCH/PREFETCHW |  |
FMA4, LWP, TBM, and XOP | N/A |  | N/A | N/A |  | N/A
FMA3 |  |
L1 data cache per core (KiB) | 64 | 16 | 32 | 32
L1 data cache associativity (ways) | 2 | 4 | 8 | 8
L1 instruction caches per core | 1 | 0.5 | 1 | 1 | 0.5 | 1
Max APU total L1 instruction cache (KiB) | 256 | 128 | 192 | 256 | 64 | 128 | 96 | 128
L1 instruction cache associativity (ways) | 2 | 3 | 4 | 8 | 2 | 3 | 4
L2 caches per core | 1 | 0.5 | 1 | 1 | 0.5 | 1
Max APU total L2 cache (MiB) | 4 | 2 | 4 | 1 | 2 | 1
L2 cache associativity (ways) | 16 | 8 | 16 | 8
APU total L3 cache (MiB) | N/A | 4 | 8 | N/A | 4
APU L3 cache associativity (ways) | 16 | 16
L3 cache scheme | Victim | N/A | Victim | Victim
Max stock DRAM support | DDR3-1866 | DDR3-2133 | DDR3-2133, DDR4-2400 | DDR4-2400 | DDR4-2933 | DDR4-3200, LPDDR4-4266 | DDR3L-1333 | DDR3L-1600 | DDR3L-1866 | DDR3-1866, DDR4-2400 | DDR4-2400
Max DRAM channels per APU | 2 | 1 | 2
Max stock DRAM bandwidth (GB/s) per APU | 29.866 | 34.132 | 38.400 | 46.932 | 68.256 | 10.666 | 12.800 | 14.933 | 19.200 | 38.400
GPU microarchitecture | TeraScale 2 (VLIW5) | TeraScale 3 (VLIW4) | GCN 2nd gen | GCN 3rd gen | GCN 5th gen[4] | TeraScale 2 (VLIW5) | GCN 2nd gen | GCN 3rd gen[4] | GCN 5th gen
GPU instruction set | TeraScale instruction set | GCN instruction set | TeraScale instruction set | GCN instruction set
Max stock GPU base clock (MHz) | 600 | 800 | 844 | 866 | 1108 | 1250 | 1400 | 1750 | 538 | 600 | ? | 847 | 900 | 1200
Max stock GPU base GFLOPS[lower-alpha 6] | 480 | 614.4 | 648.1 | 886.7 | 1134.5 | 1760 | 1971.2 | 1792 | 86 | ? | ? | ? | 345.6 | 460.8
3D engine[lower-alpha 7] | Up to 400:20:8 | Up to 384:24:6 | Up to 512:32:8 | Up to 704:44:16[5] | Up to 512:?:? | 80:8:4 | 128:8:4 | Up to 192:?:? | Up to 192:?:?
IOMMUv1 | IOMMUv2 |  | IOMMUv1 | ? | IOMMUv2
Video decoder | UVD 3.0 | UVD 4.2 | UVD 6.0 | VCN 1.0[6] |  | UVD 3.0 | UVD 4.0 | UVD 4.2 | UVD 6.0 | UVD 6.3 | VCN 1.0
Video encoder | N/A | VCE 1.0 | VCE 2.0 | VCE 3.1 |  | N/A | VCE 2.0 | VCE 3.1
GPU power saving | PowerPlay | PowerTune |  | PowerPlay | PowerTune[7]
TrueAudio | N/A | [8] | N/A |
FreeSync | 1
2 | 1

HDCP[lower-alpha 8] | ? | 1.4 | 1.4
2.2 | ? | 1.4 | 1.4
2.2
PlayReady[lower-alpha 8] | N/A | 3.0 not yet |  | N/A | 3.0 not yet
Supported displays[lower-alpha 9] | 2–3 | 2–4 | 3 | 3 (desktop)
4 (mobile, embedded) | 4 | 2 | 3 | 4
`/drm/radeon`[lower-alpha 10][10][11] |  | N/A |  | N/A
`/drm/amdgpu`[lower-alpha 10][12] | N/A | [13] |  | N/A | [13] |

1. ↑ APU models: A8-7680, A6-7480. CPU only: Athlon X4 845.
2. ↑ A PC would be one node.
3. ↑ An APU combines a CPU and a GPU. Both have cores.
4. ↑ Requires firmware support.
5. ↑ No SSE4. No SSSE3.
6. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
7. ↑ Unified shaders : texture mapping units : render output units
8. ↑ 8.0 8.1 To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
9. ↑ To feed more than two displays, the additional panels must have native DisplayPort support.[9] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
10. ↑ 10.0 10.1 DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

## Graphics API overview

The following table shows the graphics and compute APIs support across AMD GPU microarchitectures. Note that a branding series might include older generation chips.

[ VisualEditor ] [view * talk * edit]

Chip series  | Micro-architecture  | Fab | Supported APIs | AMD support  | Year introduced  | Introduced with

|
|
|
|
|
|

Rendering | Computing
Vulkan[14] | OpenGL[15] | Direct3D | HSA | OpenCL
Wonder | Fixed-pipeline[lower-alpha 1] | 1000nm
800nm  | N/A  | N/A  | N/A  | N/A  | N/A  | Ended  | 1986  |
Mach | 800nm
600nm  | 1991  |
3D Rage | 500nm  | 5.0  | 1996  | 3D Rage
Rage Pro | 350nm  | 1.1  | 6.0  | 1997  | Rage Pro
Rage 128 | 250nm  | 1.2  | 1998  | Rage 128GL/VR
R100 | 180 nm
150 nm  | 1.3  | 7.0  | 2000  | Original "ATI Radeon", as well as Radeon DDR, 7000, 7500, VE, and LE models
R200 | Programmable
pixel & vertex
pipelines  | 150 nm  | 8.1  | 2001  | 8500, 9000, 9200 and 9250
R300 | 150 nm
130 nm
110 nm  | 2.0[lower-alpha 2] | 9.0
11 (FL 9_2)  | 2002  | 9500–9800, X300–X600, X1050
R420 | 130 nm
110 nm  | 9.0b
11 (FL 9_2)  | 2004  | X700–X850
R520 | 90 nm
80 nm  | 9.0c
11 (FL 9_3)  | 2005  | X1300–X1950
R600 | TeraScale 1 | 80 nm
65 nm  | 3.3  | 10.0
11 (FL 10_0)  | ATI Stream | 2007  | HD 2000 series, HD 3410
RV670 | 55 nm  | 10.1
11 (FL 10_1)  | ATI Stream APP[16] | 2007  | HD 3450–3870, Mobility HD 2000 and 3000 series
RV770 | 55 nm
40 nm  | 1.0  | 2008  | HD 4000 series
Evergreen | TeraScale 2 | 40 nm  | 4.5
(Linux 4.2)
[17][18][19][lower-alpha 3] | 11 (FL 11_0)  | 1.2  | 2009  | HD 5000 series
Northern Islands | TeraScale 2
TeraScale 3 | 2010  | HD 6000 series, and IGP 7000 series
Southern Islands | GCN 1st gen | 28 nm  | 1.0  | 4.6
(Mesa 4.5)  | 11 (FL 11_1)
12 (FL11_1)  |  | 1.2
2.0 possible  | Current  | 2012  | HD 7000 series
Sea Islands | GCN 2nd gen | 1.1  | 11 (FL 12_0)
12 (FL 12_0)  | 2.0
(1.2 in MacOS, Linux)
2.1 Beta in Linux ROCm
2.2 possible  | 2013  | Radeon 200 series
Volcanic Islands | GCN 3rd gen | 2014  | Radeon 300 series
Arctic Islands | GCN 4th gen | 14 nm  | 2016  | Radeon 400 series
Vega | GCN 5th gen | 14 nm
7 nm  | 11 (FL 12_1)
12 (FL 12_1)  | 2017  | Radeon Vega series
Navi | RDNA 1st gen | 7 nm  | 2019  | Radeon RX 5000 series

1. ↑ Radeon 7000 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders.
2. ↑ These series do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power-of-two (NPOT) textures.
3. ↑ OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.

[20][21][22]

## Desktop processors with 3D graphics

### APU or Radeon Graphics branded

#### Lynx: "Llano" (2011)

* Socket FM1
* CPU: K10 (also Husky or K10.5) cores with an upgraded Stars architecture, no L3 cache
* L1 cache: 64 KB Data per core and 64 KB Instruction cache per core
* L2 cache: 512 KB on dual-core, 1 MB on tri- and quad-core models
* MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, Cool'n'Quiet, AMD-V
* GPU: TeraScale 2 (Evergreen); all A and E series models feature Redwood-class integrated graphics on die (BeaverCreek for the dual-core variants and WinterPark for the quad-core variants). Sempron and Athlon models exclude integrated graphics.[23]
* List of embedded GPU's
* Support for up to four DIMMs of up to DDR3-1866 memory
* Fabrication 32 nm on GlobalFoundries SOI process; Die size: 228 mm2, with 1.178 billion transistors[24][25]
* 5 GT/s UMI
* Integrated PCIe 2.0 controller
* Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
* Select models support Hybrid Graphics technology to assist a discrete Radeon HD 6450, 6570, or 6670 discrete graphics card. This is similar to the Hybrid CrossFireX technology available in the AMD 700 and 800 chipset series

Model[note 1] | Released  | Fab | Step. | CPU | GPU | DDR3
memory
support  | TDP
(W)  | Box number  | Part number

|
|
|
|
|
|
|
|
|

Cores
(threads) | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost  | L1  | L2
Sempron X2 198 | 2012  | 32 nm SOI  | LN-B0  | 2 (2)  | 2.5  | N/A  | 64 KB inst.
64 KB data

per core  | 2×512 KB  | N/A  | 1600  | 65  | SD198XOJGXBOX  | SD198XOJZ22GX
Athlon II X2 221 | 2012  | 2.8  | AD221XOJGXBOX  | AD221XOJZ22GX
Athlon II X4 631 | 2012  | 4 (4)  | 2.6  | 4×1 MB  | 1866  | AD631XOJGXBOX  | AD631XOJZ43GX
Aug 15, 2011 | 100  | AD631XOJGXBOX  | AD631XWNZ43GX
Athlon II X4 638 | Feb 8, 2012 | 2.7  | 65  | AD638XOJGXBOX  | AD638XOJZ43GX
Athlon II X4 641 | Feb 8, 2012 | 2.8  | 100  | AD641XWNGXBOX  | AD641XWNZ43GX
Athlon II X4 651 | Nov 14, 2011 | 3.0  | AD651XWNGXBOX  | AD651XWNZ43GX
Athlon II X4 651K | 2012  | AD651KWNGXBOX  | AD651KWNZ43GX
E2-3200 | 2011  | 2 (2)  | 2.4  | 2×512 KB  | HD 6370D  | 160:8:4  | 443  | 141.7  | 1600  | 65  | ED3200OJGXBOX  | ED3200OJZ22GX
ED3200OJZ22HX
A4-3300 | Sep 7, 2011 | 2.5  | HD 6410D  | AD3300OJGXBOX
AD3300OJHXBOX  | AD3300OJZ22GX
AD3300OJZ22HX
A4-3400 | Sep 7, 2011 | 2.7  | 600  | 192  | AD3400OJGXBOX
AD3400OJHXBOX  | AD3400OJZ22GX
AD3400OJZ22HX
A4-3420  | Dec 20, 2011 | 2.8  | N/A  | AD3420OJZ22HX
A6-3500 | Aug 17, 2011 | 3 (3)  | 2.1  | 2.4  | 3×1 MB  | HD 6530D  | 320:16:8  | 443  | 283.5  | 1866  | AD3500OJGXBOX  | AD3500OJZ33GX
A6-3600 | Aug 17, 2011 | 4 (4)  | 4×1 MB  | AD3600OJGXBOX  | AD3600OJZ43GX
A6-3620 | Dec 20, 2011 | 2.2  | 2.5  | AD3620OJGXBOX  | AD3620OJZ43GX
A6-3650 | Jun 30, 2011 | 2.6  | N/A  | 100  | AD3650WNGXBOX  | AD3650WNZ43GX
A6-3670K | Dec 20, 2011 | 2.7  | AD3670WNGXBOX  | AD3670WNZ43GX
A8-3800 | Aug 17, 2011 | 2.4  | 2.7  | HD 6550D  | 400:20:8  | 600  | 480  | 65  | AD3800OJGXBOX  | AD3800OJZ43GX
A8-3820 | Dec 20, 2011 | 2.5  | 2.8  | AD3820OJGXBOX  | AD3820OJZ43GX
A8-3850 | Jun 30, 2011 | 2.9  | N/A  | 100  | AD3850WNGXBOX  | AD3850WNZ43GX
A8-3870K | Dec 20, 2011 | 3.0  | AD3870WNGXBOX  | AD3870WNZ43GX

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

1. ↑ Models with "K" suffixes feature an unlocked multiplier and overclockable GPU.

#### Virgo: "Trinity" (2012)

* Fabrication 32 nm on GlobalFoundries SOI process
* Socket FM2
* CPU: Piledriver
* L1 Cache: 16 KB Data per core and 64 KB Instructions per module
* GPU TeraScale 3 (VLIW4)
* Die Size: 246 mm2, 1.303 Billion transistors[27]
* Support for up to four DIMMs of up to DDR3-1866 memory
* 5 GT/s UMI
* GPU (based on VLIW4 architecture) instruction support: DirectX 11, Opengl 4.2, DirectCompute, Pixel Shader 5.0, Blu-ray 3D, OpenCL 1.2, AMD Stream, UVD3
* Integrated PCIe 2.0 controller, and Turbo Core technology for faster CPU/GPU operation when the thermal specification permits
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX, XOP, FMA3, FMA4, F16C,[28] ABM, BMI1, TBM
* Sempron and Athlon models exclude integrated graphics
* Select models support Hybrid Graphics technology to assist a Radeon HD 7350, 7450, 7470, 7550, 7570, 7670 discrete graphics card.[29][30] However, it has been found that this does not always improve 3D accelerated graphics performance.[31][32]

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
memory
support  | TDP
(W)  | Box number  | Part number[33]

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost  | L1  | L2
Sempron X2 240[34] |  | 32 nm  | TN-A1  | [1]2  | 2.9  | 3.3  | 64 KB inst.
per module

16 KB data
per core  | 1 MB  | N/A  | 1600  | 65  |  | SD240XOKA23HJ
Athlon X2 340[35] | Oct 2012  | 3.2  | 3.6  |  | AD340XOKA23HJ
Athlon X4 730  | Oct 1, 2012  | [2]4  | 2.8  | 3.2  | 2×2 MB  | 1866  |  | AD730XOKA44HJ
Athlon X4 740 | Oct 2012  | 3.2  | 3.7  | AD740XOKHJBOX  | AD740XOKA44HJ
Athlon X4 750K | 3.4  | 4.0  | 100  | AD750KWOHJBOX  | AD750KWOA44HJ
FirePro A300 | Aug 7, 2012  | 3.4  | 4.0  | FirePro  | 384:24:8
6 CU  | 760  | 583.6  | 65  |  | AWA300OKA44HJ
FirePro A320 | 3.8  | 4.2  | 800  | 614.4  | 100  |  | AWA320WOA44HJ
A4-5300 | Oct 1, 2012  | [1]2  | 3.4  | 3.6  | 1 MB  | HD 7480D  | 128:8:4
2 CU  | 723  | 185  | 1600  | 65  | AD5300OKHJBOX  | AD5300OKA23HJ
A4-5300B | Oct 2012  |  | AD530BOKA23HJ
A6-5400K | Oct 1, 2012  | 3.6  | 3.8  | HD 7540D  | 192:12:4
3 CU  | 760  | 291.8  | 1866  | AD540KOKHJBOX  | AD540KOKA23HJ
A6-5400B | Oct 2012  |  | AD540BOKA23HJ
A8-5500 | Oct 1, 2012  | [2]4  | 3.2  | 3.7  | 2×2 MB  | HD 7560D  | 256:16:8
4 CU  | 760  | 389.1  | AD5500OKHJBOX  | AD5500OKA44HJ
A8-5500B | Oct 2012  |  | AD550BOKA44HJ
A8-5600K | Oct 1, 2012  | 3.6  | 3.9  | 100  | AD560KWOHJBOX  | AD560KWOA44HJ
A10-5700 | 3.4  | 4.0  | HD 7660D  | 384:24:8
6 CU  | 760  | 583.6  | 65  | AD5700OKHJBOX  | AD5700OKA44HJ
A10-5800K | 3.8  | 4.2  | 800  | 614.4  | 100  | AD580KWOHJBOX  | AD580KWOA44HJ
A10-5800B | Oct 2012  |  | AD580BWOA44HJ

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Richland" (2013)

* Fabrication 32 nm on GlobalFoundries SOI process
* Socket FM2
* Two or four CPU cores based on the Piledriver microarchitecture
* Die Size: 246 mm2, 1.303 Billion transistors[36]
* L1 Cache: 16 KB Data per core and 64 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, AVX, AVX1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core 3.0, NX bit, PowerNow!
* GPU
* TeraScale 3 architecture
* HD Media Accelerator, AMD Hybrid Graphics

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
memory
support  | TDP
(W)  | Box number  | Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost  | L1  | L2
Sempron X2 250[34] |  | 32 nm  | RL-A1  | [1]2  | 3.2  | 3.6  | 64 KB inst.
per module

16 KB data
per core  | 1 MB  | N/A  |  | 65  |  | SD250XOKA23HL
Athlon X2 350[37] |  | 3.5  | 3.9  | 1866  |  | AD350XOKA23HL
Athlon X2 370K  | Jun 2013  | 4.0  | 4.2  | AD370KOKHLBOX  | AD370KOKA23HL
Athlon X4 750 | Oct 2013  | [2]4  | 3.4  | 4.0  | 2×2 MB  |  | AD750XOKA44HL
Athlon X4 760K | Jun 2013  | 3.8  | 4.1  | 100  | AD760KWOHLBOX  | AD760KWOA44HL
FX-670K[38] | Mar 2014 (OEM)  | 3.7  | 4.3  | 65  |  | FD670KOKA44HL
A4-4000 | May 2013  | [1]2  | 3.0  | 3.2  | 1 MB  | HD 7480D  | 128:8:4
2 CU  | 720  | 184.3  | 1333  | AD4000OKHLBOX  | AD4000OKA23HL
A4-4020 | Jan 2014  | 3.2  | 3.4  | AD4020OKHLBOX  | AD4020OKA23HL
A4-6300  | Jul 2013  | 3.7  | 3.9  | HD 8370D  | 760  | 194.5  | 1600  | AD6300OKHLBOX  | AD6300OKA23HL
A4-6300B |  | AD630BOKA23HL
A4-6320 | Dec 2013  | 3.8  | 4.0  | AD6320OKHLBOX  | AD6320OKA23HL
A4-6320B | Mar 2014  |  | AD632BOKA23HL
A4-7300 | Aug 2014  | HD 8470D  | 192:12:4
3 CU  | 800  | 307.2  |  | AD7300OKA23HL
A4 Pro-7300B |  | AD730BOKA23HL
A6-6400B | Jun 4, 2013  | 3.9  | 4.1  | 1866  |  | AD640BOKA23HL
A6-6400K | AD640KOKHLBOX  | AD640KOKA23HL
A6-6420B | Jan 2014  | 4.0  | 4.2  |  | AD642BOKA23HL
A6-6420K | AD642KOKHLBOX  | AD642KOKA23HL
A8-6500T | Sep 18, 2013  | [2]4  | 2.1  | 3.1  | 2×2 MB  | HD 8550D  | 256:16:8
4 CU  | 720  | 368.6  | 45  | AD650TYHHLBOX  | AD650TYHA44HL
A8-6500 | Jun 4, 2013  | 3.5  | 4.1  | HD 8570D  | 800  | 409.6  | 65  | AD6500OKHLBOX  | AD6500OKA44HL
A8-6500B |  | AD650BOKA44HL
A8-6600K | 3.9  | 4.2  | 844  | 432.1  | 100  | AD660KWOHLBOX  | AD660KWOA44HL
A10-6700T | Sep 18, 2013  | 2.5  | 3.5  | HD 8650D  | 384:24:8
6 CU  | 720  | 552.9  | 45  | AD670TYHHLBOX  | AD670TYHA44HL
A10-6700 | Jun 4, 2013  | 3.7  | 4.3  | HD 8670D  | 844  | 648.1  | 65  | AD6700OKHLBOX  | AD6700OKA44HL
A10-6790B | Oct 29, 2013  | 4.0  | 100  | AD679KWOHLBOX  | AD679KWOA44HL
A10-6790K | Oct 28, 2013  |  | AD679BWOA44HL
A10-6800K | Jun 4, 2013  | 4.1  | 4.4  | 2133  | AD680KWOHLBOX  | AD680KWOA44HL
A10-6800B |  | AD680BWOA44HL

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Kabini" (2013, SoC)

* Fabrication 28 nm by GlobalFoundries
* Socket AM1, aka Socket FS1b (AM1 platform)
* 2 to 4 CPU Cores (Jaguar (microarchitecture))
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* SoC with integrated memory, PCIe, 2× USB 3.0, 6× USB 2.0, Gigabit Ethernet, and 2× SATA III (6 Gb/s) controllers
* GPU based on Graphics Core Next (GCN)

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
memory
support  | TDP
(W)  | Box number  | Part number

|
|
|
|
|
|
|
|
|

Cores
(threads) | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost  | L1  | L2
Athlon X4 530 |  | 28 nm  | KB-A1  | 4 (4)  | 2.00  | N/A  | 32 KB inst.
32 KB data

per core  | 2 MB  | N/A  | 1600
single-channel | 25  |  | AD530XJAH44HM
Athlon X4 550 | 2.20  |  | AD550XJAH44HM
Sempron 2650 | Apr 9, 2014  | 2 (2)  | 1.45  | 1 MB  | R3 (HD 8240)  | 128:8:4
2 CU  | 400  | 102.4  | 1333
single-channel | SD2650JAHMBOX  | SD2650JAH23HM
Sempron 3850 | 4 (4)  | 1.30  | 2 MB  | R3 (HD 8280)  | 450  | 115.2  | 1600
single-channel | SD3850JAHMBOX  | SD3850JAH44HM
Athlon 5150 | 1.60  | R3 (HD 8400)  | 600  | 153.6  | AD5150JAHMBOX  | AD5150JAH44HM
Athlon 5350 | 2.05  | AD5350JAHMBOX  | AD5350JAH44HM
Athlon 5370 | Feb 2016  | 2.20  |  | AD5370JAH44HM

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Kaveri" (2014) & "Godavari" (2015)

* Fabrication 28 nm by GlobalFoundries.
* Socket FM2+,[39] support for PCIe 3.0.
* Two or four CPU cores based on the Steamroller microarchitecture.
* Kaveri refresh models have codename Godavari.[40]
* Die Size: 245 mm2, 2.41 Billion transistors.[41]
* L1 Cache: 16 KB Data per core and 96 KB Instructions per module.
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
* Three to eight Compute Units (CUs) based on GCN 2nd gen microarchitecture;[42] 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs).
* Heterogeneous System Architecture-enabled zero-copy through pointer passing.
* SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio.[43]
* Dual-channel (2× 64 Bit) DDR3 memory controller.
* Integrated custom ARM Cortex-A5 co-processor[44] with TrustZone Security Extensions[45] in select APU models, except the Performance APU models.[46]
* Select models support Hybrid Graphics technology by using a Radeon R7 240 or R7 250 discrete graphics card.[47]
* Display controller: AMD Eyefinity 2, 4K Ultra HD support, DisplayPort 1.2 Support.[48]

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
memory
support  | TDP
(W)  | Box number  | Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost  | L1  | L2
Athlon X2 450[37] | Jul 31, 2014  | 28 nm  | KV-A1  | [1]2  | 3.5  | 3.9  | 96 KB inst.
per module

16 KB data
per core  | 1 MB  | N/A  | 1866  | 65  |  | AD450XYBI23JA
Athlon X4 830 | 2018  | [2]4  | 3.0  | 3.4  | 2×2 MB  | 2133  |  | AD830XYBI44JA
Athlon X4 840[37] | Aug 2014  | 3.1  | 3.8  | AD840XYBJABOX  | AD840XYBI44JA
Athlon X4 850 | 2015  | GV-A1  | 3.2  |  |  | AD835XACI43KA
Athlon X4 860K | Aug 2014  | KV-A1  | 3.7  | 4.0  | 95  | AD860KXBJABOX
AD860KWOHLBOX
AD860KXBJASBX  | AD860KXBI44JA
Athlon X4 870K | Dec 2015  | GV-A1  | 3.9  | 4.1  | AD870KXBJCSBX  | AD870KXBI44JC
Athlon X4 880K | Mar 1, 2016  | 4.0  | 4.2  | AD880KXBJCSBX  |
FX-770K[49] | Dec 2014  | KV-A1  | 3.5  | 3.9  | 65  |  | FD770KYBI44JA
A4 Pro-7350B | Jul 31, 2014  | [1]2  | 3.4  | 3.8  | 1 MB  | R5  | 192:12:8
3 CU  | 514  | 197.3  | 1866  |  | AD735BYBI23JA
Pro A4-8350B | Sep 29, 2015  | 3.5  | 3.9  | 256:16:8
4 CU  | 757  | 387.5  |  | AD835BYBI23JC
A6-7400K | Jul 31, 2014  | 3.5  | 3.9  | 756  | 387  | AD740KYBJABOX  | AD740KYBI23JA
A6 Pro-7400B |  | AD740BYBI23JA
A6-7470K | Feb 2, 2016  | GV-A1  | 3.7  | 4.0  | 800  | 409.6  | 2133  | AD747KYBJCBOX  | AD747KYBI23JC
Pro A6-8550B | Sep 29, 2015  |  | AD855BYBI23JC
A8-7500[50][51] | 2014  | KV-A1  | [2]4  | 3.0  | 3.7  | 2×2 MB  | R7  | 384:24:8
6 CU  | 720  | 552.9  |  | AD7500YBI44JA
A8-7600 | Jul 31, 2014  | 3.1  | 3.8  | AD7600YBJABOX  | AD7600YBI44JA
A8 Pro-7600B |  | AD760BYBI44JA
A8-7650K | Jan 7, 2015  | 3.3  | 95  | AD765KXBJABOX
AD765KXBJASBX  | AD765KXBI44JA
A8-7670K | Jul 20, 2015  | GV-A1  | 3.6  | 3.9  | 757  | 581.3  | AD767KXBJCSBX
AD767KXBJCBOX  | AD767KXBI44JC
Pro A8-8650B | Sep 29, 2015  | 3.2  | 65  |  | AD865BYBI44JC
A10-7700K | Jan 14, 2014  | KV-A1  | 3.4  | 3.8  | 720  | 552.9  | 95  | AD770KXBJABOX  | AD770KXBI44JA
A10-7800 | Jul 31, 2014  | 3.5  | 3.9  | 512:32:8
8 CU  | 737.2  | 65  | AD7800YBJABOX  | AD7800YBI44JA
A10 Pro-7800B |  | AD780BYBI44JA
A10-7850K | Jan 14, 2014  | 3.7  | 4.0  | 95  | AD785KXBJABOX  | AD785KXBI44JA
A10 Pro-7850B | Jul 31, 2014  |  | AD785BXBI44JA
A10-7860K | Feb 2, 2016  | GV-A1  | 3.6  | 757  | 775.1  | 65  | AD786KYBJABOX
AD786KYBJCSBX  | AD786KYBI44JC
A10-7870K | May 28, 2015  | 3.9  | 4.1  | 866  | 886.7  | 95  | AD787KXDJCBOX
AD787KXDJCSBX  | AD787KXDI44JC
A10-7890K | Mar 1, 2016  | 4.1  | 4.3  | AD789KXDJCHBX  | AD789KXDI44JC
Pro A10-8750B | Sep 29, 2015  | 3.6  | 4.0  | 757  | 775.1  | 65  |  | AD875BYBI44JC
Pro A10-8850B | 3.9  | 4.1  | 800  | 819.2  | 95  |  | AD885BXBI44JC
Model  | Released  | Fab  | Step.  | [Modules/FPUs]
Cores/threads  | Base  | Boost  | L1  | L2  | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2] | DDR3
memory
support  | TDP
(W)  | Box number  | Part number
Clock rate (GHz)  | Cache[lower-alpha 1]
CPU  | GPU

1. ↑ 1.0 1.1 AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ 2.0 2.1 Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Carrizo" (2016)

* Fabrication: 28 nm by GlobalFoundries
* Socket FM2+ or AM4, support for PCIe 3.0
* Two or four CPU cores based on the Excavator microarchitecture
* Die size: 250.04 mm2, 3.1 billion transistors[52]
* L1 cache: 32 KB data per core and 96 KB instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
* Single- or dual-channel DDR3 or DDR4 memory controller
* Third generation GCN-based GPU (Radeon M300)
* Integrated custom ARM Cortex-A5 coprocessor[44] with TrustZone security extensions[45][46]

Model  | Released  | Fab  | Step.  | Socket  | CPU  | GPU  | Memory
support  | TDP
(W)  | Box number[lower-alpha 1] | Part number

|
|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 2] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 3]
Base  | Boost  | L1  | L2
Athlon X4 835 |  | 28 nm  | CZ-A1  | FM2+  | [2]4  | 3.1  |  | 96 KB inst.
per module

32 KB data
per core  | 2×1 MB  | N/A  | DDR3-2133  | 65  |  | AD835XACI43KA
Athlon X4 845 | Feb 2, 2016  | 3.5  | 3.8  | AD845XYBJCSBX
AD845XACKASBX  | AD845XACI43KA
A6-7480[53] | Oct 2018  | [1]2  | 1 MB  | R5  | 384:24:8
6 CU  | 900  | 691.2  | AD7480ACABBOX  | AD7480ACI23AB
A8-7680[54] | [2]4  | 2×1 MB  | R7  | AD7680ACABBOX  | AD7680ACI43AB
Pro A6-8570E | Oct 2016  | AM4  | [1]2  | 3.0  | 3.4  | 1 MB  | R5  | 256:16:4
4 CU  | 800  | 409.6  | DDR4-2400  | 35  |  | AD857BAHM23AB
Pro A6-8570 | 3.5  | 3.8  | 384:24:6
6 CU  | 1029  | 790.2  | 65  |  | AD857BAGM23AB
Pro A10-8770E | [2]4  | 2.8  | 3.5  | 2×1 MB  | R7  | 847  | 650.4  | 35  |  | AD877BAHM44AB
Pro A10-8770 | 3.5  | 3.8  | 1029  | 790.2  | 65  |  | AD877BAGM44AB
Pro A12-8870E | 2.9  | 512:32:8
8 CU  | 900  | 921.6  | 35  |  | AD887BAHM44AB
Pro A12-8870 | 3.7  | 4.2  | 1108  | 1134.5  | 65  |  | AD887BAUM44AB

1. ↑ With cooler if available.
2. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
3. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Bristol Ridge" (2016)

* Fabrication 28 nm by GlobalFoundries
* Socket AM4, support for PCIe 3.0
* Two or four "Excavator+" CPU cores
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
* Dual-channel DDR4 memory controller
* PCI Express 3.0 x8 (No Bifurcation support, requires a PCI-e switch for any configuration other than x8)
* PCI Express 3.0 x4 as link to optional external chipset
* 4x USB 3.1 Gen 1
* Storage: 2x SATA and 2x NVMe or 2x PCI Express
* Third Generation GCN based GPU[55] with hybrid VP9 decoding

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR4
memory
support  | TDP
(W)  | Box number[lower-alpha 1] | Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 2] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 3]
Base  | Boost  | L1  | L2
Athlon X4 940[56] | Jul 27, 2017  | 28 nm  | BR-A1  | [2]4  | 3.2  | 3.6  | 96 KB inst.
per module

32 KB data
per core  | 2×1 MB  | N/A  | 2400  | 65  | AD940XAGABBOX  | AD940XAGM44AB
Athlon X4 950[57] | 3.5  | 3.8  | AD950XAGABBOX  | AD950XAGM44AB
Athlon X4 970[58] | 3.8  | 4.0  | AD970XAUABBOX  | AD970XAUM44AB
A6-9400[59] | Mar 16, 2019  | [1]2  | 3.4  | 3.7  | 1 MB  | R5  | 192:12:4
3 CU  | 720  | 276.4  | AD9400AGABBOX  | AD9400AGM23AB
A6-9500E[60] | Sep 5, 2016  | 3.0  | 3.4  | 256:16:4
4 CU  | 800  | 409.6  | 35  | AD9500AHABBOX  | AD9500AHM23AB
Pro A6-9500E[61] | Oct 3, 2016  |  | AD950BAHM23AB
A6-9500[62] | Sep 5, 2016  | 3.5  | 3.8  | 384:24:6
6 CU  | 1029  | 790.2  | 65  | AD9500AGABBOX  | AD9500AGM23AB
Pro A6-9500[63] | Oct 3, 2016  |  | AD950BAGM23AB
A6-9550[64] | Jul 27, 2017  | 3.8  | 4.0  | 256:16:4
4 CU  | 800  | 409.6  | AD9550AGABBOX  | AD9550AGM23AB
A8-9600[65] | Sep 5, 2016  | [2]4  | 3.1  | 3.4  | 2×1 MB  | R7  | 384:24:6
6 CU  | 900  | 691.2  | AD9600AGABBOX  | AD9600AGM44AB
Pro A8-9600[66] | Oct 3, 2016  |  | AD960BAGM44AB
A10-9700E[67] | Sep 5, 2016  | 3.0  | 3.5  | 847  | 650.4  | 35  | AD9700AHABBOX  | AD9700AHM44AB
Pro A10-9700E[68] | Oct 3, 2016  |  | AD970BAHM44AB
A10-9700[69] | Sep 5, 2016  | 3.5  | 3.8  | 1029  | 790.2  | 65  | AD9700AGABBOX  | AD9700AGM44AB
Pro A10-9700[70] | Oct 3, 2016  |  | AD970BAGM44AB
A12-9800E[71] | Sep 5, 2016  | 3.1  | 3.8  | 512:32:8[72]
8 CU  | 900  | 921.6  | 35  | AD9800AHABBOX  | AD9800AUM44AB
Pro A12-9800E[73] | Oct 3, 2016  |  | AD980BAHM44AB
A12-9800[74] | Sep 5, 2016  | 3.8  | 4.2  | 1108  | 1134.5  | 65  | AD9800AUABBOX  | AD9800AUM44AB
Pro A12-9800[75] | Oct 3, 2016  |  | AD980BAUM44AB

1. ↑ With cooler if available.
2. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
3. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Raven Ridge" (2018)

Main article: Engineering:Ryzen

* Fabrication 14 nm by GlobalFoundries
* Transistors: 4.94 billion
* Die size: 210 mm2
* Socket AM4
* Zen CPU cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual-channel DDR4 memory controller
* Fifth generation GCN based GPU
* Video Core Next (VCN) 1.0

Template:AMD Zen based desktop APUs

#### "Picasso" (2019)

Main article: Engineering:Ryzen

* Fabrication 12 nm by GlobalFoundries
* Transistors: 4.94 billion
* Die size: 210 mm2
* Socket AM4
* Zen+ CPU cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual-channel DDR4 memory controller
* Fifth generation GCN based GPU
* Video Core Next (VCN) 1.0

Template:AMD Zen+ based desktop APUs

#### "Renoir" (2020)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC
* Socket AM4
* Up to eight Zen 2 CPU cores
* Dual-channel DDR4 memory controller

Template:AMD Ryzen 4000G series

#### "Cezanne" (2021)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC
* Socket AM4
* Up to eight Zen 3 CPU cores
* Dual-channel DDR4 memory controller

Template:AMD Ryzen 5000 desktop APUs

### Non APU or Radeon Graphics branded

#### "Raphael" (2022)

Main article: Engineering:Ryzen

* Fabrication 5 nm (CCD) and 6 nm (cIOD) by TSMC
* Socket AM5
* Up to sixteen Zen 4 CPU cores
* Dual-channel DDR5 memory controller
* Basic iGPU

Template:AMD Ryzen 7000 Series

#### "Phoenix" (2024)

Template:AMD Ryzen 8000 desktop APUs

## Server APUs

### Opteron X2100-series "Kyoto" (2013) & "Steppe Eagle" (2016)

* Fabrication 28 nm
* Socket FT3 (BGA)
* 4 CPU Cores (Jaguar & Puma microarchitecture)
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* Single-channel DDR3 memory controller
* Turbo Dock Technology, C6 and CC6 low power states
* GPU based on 2nd generation Graphics Core Next (GCN) architecture

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
memory
support  | TDP
(W)  | Part number  | Release
price
(USD)

|
|
|
|
|
|
|
|
|

Cores
(threads) | Clock
(GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2
X1150[76] | May 29, 2013[77] | 28 nm  |  | 4 (4)  | 2.0  | 32 KB inst.
32 KB data

per core  | 2 MB  | N/A  | 1600  | 9-17  | OX1150IPJ44HM  | $64
X2150 | 1.9  | R3 (HD 8400)  | 128:8:4
2 CU  | 266-600  | 28.9  | 11-22  | OX2150IAJ44HM  | $99
X2170 | Sep 1, 2016  |  | 2.4  | R5  | 655-800  | 153.6  | 1866  | 11-25  | OX2170IXJ44JB  |

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### Opteron X3000-series "Toronto" (2017)

* Fabrication 28 nm
* Socket FP4 (BGA)
* Two or Four CPU cores based on the Excavator microarchitecture[78][79]
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
* Dual-channel DDR4 memory controller
* GPU based on 3rd generation Graphics Core Next (GCN) architecture

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR4
memory
support  | TDP
(W)  | Part number  | Release
price
(USD)

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock rate (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock
(MHz)  | Processing
power
(GFLOPS)[lower-alpha 2]
Base  | Boost | L1  | L2
X3216[79][80] | June 2017  | 28 nm  | 01h  | [1]2  | 1.6  | 3.0  | 96 KB inst.
per module

32 KB data
per core  | 1 MB  | R5  | 256:16:4
4 CU  | 800  | 409.6  | 1600  | 12-15  | OX3216AAY23KA  | OEM for HP
X3418[79][81] |  | [2]4  | 1.8  | 3.2  | 2 MB  | R6  | 384:24:6
6 CU  | 614.4  | 2400  | 12-35  | OX3418AAY43KA
X3421[79][82] | June 2017  | 2.1  | 3.4  | R7  | 512:32:8
8 CU  | 819.2  | OX3421AAY43KA

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

## Mobile processors with 3D graphics

### APU or Radeon Graphics branded

#### Sabine: "Llano" (2011)

* Fabrication 32 nm on GlobalFoundries SOI process
* Socket FS1
* Upgraded Stars (AMD 10h architecture) codenamed Husky CPU cores (K10.5) with no L3 cache, and with Redwood-class integrated graphics on die
* L1 Cache: 64 KB Data per core and 64 KB Instructions per core(BeaverCreek for the dual-core variants and WinterPark for the quad-core variants)
* Integrated PCIe 2.0 controller
* GPU: TeraScale 2
* Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
* Support for 1.35 V DDR3L-1333 memory, in addition to regular 1.5 V DDR3 memory specified
* 2.5 GT/s UMI
* MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
* PowerNow!

Template:Sort-under

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2  | L3
E2-3000M | 2011

6/14

| 32 nm  | B0  | 2 (2)  | 1.8  | 2.4  | 64 KB inst.
64 KB data

per core  | 2× 512KB  | N/A  | HD 6380G  | 160:8:4  | 400  | 128  | 1333  | 35  | EM3000DDX22GX
|  |  |  |
A4-3300M | 2011

6/14

| 1.9  | 2.5  | 2× 1MB  | HD 6480G  | 240:12:4  | 444  | 213.1  | 35  | AM3300DDX23GX
A4-3305M | December 7, 2011  | 2× 512KB  | 160:8:4  | 593  | 189.7  | AM3305DDX22GX
A4-3310MX | 2011

6/14

| 2.1  | 2× 1MB  | 240:12:4  | 444  | 213.1  | 45  | AM3310HLX23GX
A4-3320M | December 7, 2011  | 2.0  | 2.6  | 35  | AM3320DDX23GX
A4-3330MX | 2.2  | 45  | AM3330HLX23GX
A4-3330MX |  | 2.3  | 2× 512KB  | 160:8:4  | 593  | 189.7  | AM3330HLX23HX
|  |  |  |
A6-3400M | 2011

6/14

| 4 (4)  | 1.4  | 2.3  | 4× 1MB  | HD 6520G  | 320:16:8  | 400  | 256  | 35  | AM3400DDX43GX
A6-3410MX | 1.6  | 1600  | 45  | AM3410HLX43GX
A6-3420M | December 7, 2011  | 1.5  | 2.4  | 1333  | 35  | AM3420DDX43GX
A6-3430MX | 1.7  | 1600  | 45  | AM3430HLX43GX
|  |
A8-3500M | 2011

6/14

| 1.5  | 2.4  | HD 6620G  | 400:20:8  | 444  | 355.2  | 1333  | 35  | AM3500DDX43GX
A8-3510MX | 1.8  | 2.5  | 1600  | 45  | AM3510HLX43GX
A8-3520M | December 7, 2011  | 1.6  | 1333  | 35  | AM3520DDX43GX
A8-3530MX | 2011

6/14

| 1.9  | 2.6  | 1600  | 45  | AM3530HLX43GX
A8-3550MX | December 7, 2011  | 2.0  | 2.7  | AM3550HLX43GX

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### Comal: "Trinity" (2012)

An AMD A10-4600M APU

* Fabrication 32 nm on GlobalFoundries SOI process
* Socket FS1r2, FP2
* Based on the Piledriver architecture
* L1 Cache: 16 KB Data per core and 64 KB Instructions per module
* GPU: TeraScale 3 (VLIW4)
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
* Memory support: 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3 memory specified (Dual-channel)
* 2.5 GT/s UMI
* Transistors: 1.303 billion
* Die size: 246 mm2

Model number  | Released  | Fab  | Step.  | Socket  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config[note 1] | Clock

(MHz)

| Turbo

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

A4-4355M | September 27, 2012  | 32 nm  | TN-A1  | FP2  | [1]2  | 1.9  | 2.4  | 64 KB inst.
per module

16 KB data
per core  | 1  | HD 7400G  | 192:12:4
3 CU  | 327  | 424  | 125.5  | 1333  | 17  | AM4355SHE23HJ
A6-4455M | May 15, 2012  | 2.1  | 2.8  | 2  | HD 7500G  | 256:16:8
4 CU  | 167.4  | AM4455SHE24HJ
A8-4555M | September 27, 2012  | [2]4  | 1.6  | 2.4  | 2×

2MB

| HD 7600G  | 384:24:8
6 CU  | 320  | 245.7  | 19  | AM4555SHE44HJ
A8-4557M[83] | Mar

2013

| 1.9  | 2.8  | HD 7000  | 256:16:8
4 CU  | 497  | 655  | 254.4  | (L)1600  | 35  | AM4557DFE44HJ
A10-4655M | May 15, 2012  | 2.0  | 2.8  | HD 7620G  | 384:24:8
6 CU  | 360  | 496  | 276.4  | 1333  | 25  | AM4655SIE44HJ
A10-4657M[83] | Mar

2013

| 2.3  | 3.2  | HD 7000  | 497  | 686  | 381.6  | (L)1600  | 35  | AM4657DFE44HJ
|  |  |  |
A4-4300M | May 15, 2012  | FS1r2  | [1]2  | 2.5  | 3.0  | 1  | HD 7420G  | 128:8:4
2 CU  | 480  | 655  | 122.8  | 1600  | AM4300DEC23HJ
A6-4400M | 2.7  | 3.2  | HD 7520G  | 192:12:4
3 CU  | 496  | 685  | 190.4  | AM4400DEC23HJ
A8-4500M | [2]4  | 1.9  | 2.8  | 2×

2MB

| HD 7640G  | 256:16:8
4 CU  | 253.9  | AM4500DEC44HJ
A10-4600M | 2.3  | 3.2  | HD 7660G  | 384:24:8
6 CU  | 380.9  | AM4600DEC44HJ

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

1. ↑ Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs

#### "Richland" (2013)

* Fabrication 32 nm on GlobalFoundries SOI process
* Socket FS1r2, FP2
* Elite Performance APU.[84][85]
* CPU: Piledriver architecture
* L1 Cache: 16 KB Data per core and 64 KB Instructions per module
* GPU: TeraScale 3 (VLIW4)
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core

Model number  | Released  | Fab  | Step.  | Socket  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config[note 1] | Clock

(MHz)

| Turbo

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

A4-5145M | 2013/5  | 32 nm  | RL-A1  | FP2  | [1]2  | 2.0  | 2.6  | 64 KB inst.
per module

16 KB data
per core  | 1  | HD 8310G  | 128:8:4
2 CU  | 424  | 554  | 108.5  | (L)1333  | 17  | AM5145SIE44HL
A6-5345M | 2.2  | 2.8  | HD 8410G  | 192:12:4
3 CU  | 450  | 600  | 172.8  | AM5345SIE44HL
A8-5545M | [2]4  | 1.7  | 2.7  | 4  | HD 8510G  | 384:28:8
6 CU  | 554  | 345.6  | 19  | AM5545SIE44HL
A10-5745M | 2.1  | 2.9  | HD 8610G  | 533  | 626  | 409.3  | 25  | AM5745SIE44HL
|  |  |
A4-5150M | 2013 Q1  | FS1r2  | [1]2  | 2.7  | 3.3  | 1  | HD 8350G  | 128:8:4
2 CU  | 533  | 720  | 136.4  | 1600  | 35  | AM5150DEC23HL
A6-5350M | 2.9  | 3.5  | HD 8450G  | 192:12:4
3 CU  | 204.6  | AM5350DEC23HL
A6-5357M | 2013/5  | FP2  | (L)1600  | AM5357DFE23HL
A8-5550M | 2013 Q1  | FS1r2  | [2]4  | 2.1  | 3.1  | 4  | HD 8550G  | 256:16:8
4 CU  | 515  | 263.6  | 1600  | AM5550DEC44HL
A8-5557M | 2013/5  | FP2  | 554  | 283.6  | (L)1600  | AM5557DFE44HL
A10-5750M | 2013 Q1  | FS1r2  | 2.5  | 3.5  | HD 8650G  | 384:24:8
6 CU  | 533  | 409.3  | 1866  | AM5750DEC44HL
A10-5757M | 2013/5  | FP2  | 600  | 460.8  | (L)1600  | AM5757DFE44HL

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

1. ↑ Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs

#### "Kaveri" (2014)

* Fabrication 28 nm
* Socket FP3
* Up to 4 Steamroller x86 CPU cores with 4 MB of L2 cache.[86]
* L1 Cache: 16 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
* Three to eight Compute Units (CUs) based on Graphics Core Next (GCN)[42] microarchitecture; 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs)
* AMD Heterogeneous System Architecture (HSA) 2.0
* SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio[43]
* Dual-channel (2x64-bit) DDR3 memory controller
* Integrated custom ARM Cortex-A5 co-processor[44] with TrustZone Security Extensions[45]

Model number  | Released  | Fab  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Turbo

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

A6-7000 | June 2014  | 28 nm  | [1]2  | 2.2  | 3.0  | 96 KB inst.
per module

16 KB data
per core  | 1  | R4  | 192:12:3
3 CU  | 494  | 533  | 189.6  | 1333  | 17  | AM7000ECH23JA
A6 PRO - 7050B | 533  | N/A  | 204.6  | 1600  | AM705BECH23JA
|  |  |
A8-7100 | [2]4  | 1.8  | 3.0  | 2× 2 MB  | R5  | 256:16:4
4 CU  | 450  | 514  | 230.4  | 1600  | 20  | AM7100ECH44JA
A8 PRO - 7150B | 1.9  | 3.2  | 553  | N/A  | 283.1  | AM715BECH44JA
A10-7300 | R6  | 384:24:8
6 CU  | 464  | 533  | 356.3  | AM7300ECH44JA
A10 PRO - 7350B | 2.1  | 3.3  | 533  | N/A  | 424.7  | AM735BECH44JA
FX-7500 | R7  | 498  | 553  | 382.4  | FM7500ECH44JA
|  |  |
A8-7200P | 2.4  | 3.3  | R5  | 256:16:4
4 CU  | 553  | 626  | 283.1  | 1866  | 35  | AM740PDGH44JA
A10-7400P | 2.5  | 3.4  | R6  | 384:24:8
6 CU  | 576  | 654  | 442.3  | AM740PDGH44JA
FX-7600P | 2.7  | 3.6  | R7  | 512:32:8
8 CU  | 600  | 686  | 614.4  | 2133  | FM760PDGH44JA

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Carrizo" (2015)

* Fabrication 28 nm
* Socket FP4
* Up to 4 Excavator x86 CPU cores
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
* GPU based on Graphics Core Next 1.2

Model number  | Released  | Fab  | CPU  | GPU  | DDR

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

A6-8500P | June 2015  | 28 nm  | [1]2  | 1.6  | 3.0  | 96 KB inst.
per module

32 KB data
per core  | 1  | R5  | 256:16:4
4 CU  | 800  | 409.6  | 3)1600  | 12-

| AM850PAAY23KA
PRO A6-8500B | AM850BAAY23KA
PRO A6-8530B | Q3 2016  | 2.3  | 3.2  | 4)1866  | AM853BADY23AB
|  |  |  |  |
A8-8600P | June 2015  | [2]4  | 1.6  | 3.0  | 2×

1MB

| R6  | 384:24:8
6 CU  | 720  | 552.9  | 3)2133  | AM860PAAY43KA
PRO A8-8600B | AM860BAAY43KA
A10-8700P | 1.8  | 3.2  | 800  | 614.4  | AM870PAAY43KA
PRO A10-8700B | AM870BAAY43KA
PRO A10-8730B | Q3 2016  | 2.4  | 3.3  | R5  | 720  | 552.9  | 4)1866  | AM873BADY44AB
A10-8780P | December 2015  | 2.0  | 3.3  | R8  | 512:32:8
8 CU  |  |  | 3)?  | AM878PAIY43KA
FX-8800P | June 2015  | 2.1  | 3.4  | R7  | 800  | 819.2  | 4)2133  | FM880PAAY43KA
PRO A12-8800B | FM880BAAY43KA
PRO A12-8830B | Q3 2016  | 2.5  | 3.4  | 384:24:8
6 CU  | 758  | 582.1  | 4)1866  | AM883BADY44AB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Bristol Ridge" (2016)

* Fabrication 28 nm
* Socket FP4[87]
* Two or four "Excavator+" x86 CPU cores
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
* GPU based on Graphics Core Next 1.2 with VP9 decoding

Model number  | Released  | Fab  | CPU  | GPU  | DDR4

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

Pro A6-9500B | October 24, 2016  | 28 nm  | [1]2  | 2.3  | 3.2  | 96 KB inst.
per module

32 KB data
per core  | 1  | R5  | 256:16:4
4 CU  | 800  | 409.6  | 1866  | 12-

|  |  |  |
Pro A8-9600B | October 24, 2016  | [2]4  | 2.4  | 3.3  | 2× 1 MB  | R5  | 384:24:6
6 CU  | 720  | 552.9  | 1866  | 12–

A10-9600P | June 2016  | AM960PADY44AB
A10-9620P[88] | 2017 (OEM)  | 2.5  | 3.4  | 758  | 582.1  |
Pro A10-9700B | October 24, 2016  | R7  |
A12-9700P | June 2016  | AM970PADY44AB
Pro A8-9630B | October 24, 2016  | 2.6  | 3.3  | R5  | 800  | 614.4  | 2400  | 25–

A10-9630P | June 2016  | AM963PAEY44AB
Pro A10-9730B | October 24, 2016  | 2.8  | 3.5  | R7  | 900  | 691.2  |
A12-9730P | June 2016  | AM973PAEY44AB
|  |  |
Pro A12-9800B | October 24, 2016  | 2.7  | 3.6  | R7  | 512:32:8
8 CU  | 758  | 776.1  | 1866  | 12–

[1] FX-9800P
A12-9720P[89][90] | June 2016
2017 (OEM) | FM980PADY44AB

Pro A12-9830B | October 24, 2016  | 3.0  | 3.7  | 900  | 921.6  | 2400  | 25–

FX-9830P | June 2016  | FM983PAEY44AB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Raven Ridge" (2017)

Main article: Engineering:Ryzen

* Fabrication 14 nm by GlobalFoundries
* Transistors: 4.94 billion
* Socket FP5
* Die size: 210 mm2
* Zen CPU cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Fifth generation GCN-based GPU

Model  | Release
date  | CPU  | GPU  | Memory support | TDP | Part number

|
|
|
|
|
|

Cores
(threads)  | Clock rate (GHz)  | Cache[lower-roman 1] | Model  | Config[lower-roman 2] | Clock  | Processing
power
(GFLOPS)[lower-roman 3]
Base | Boost | L1 | L2 | L3
Athlon Pro 200U [92] | 2019  | 2 (4)  | 2.3  | 3.2  | 64 KB inst.
32 KB data
per core  | 512 KB
per core  | 4 MB  | Vega 3  | 192:12:4
3 CU  | 1000 MHz  | 384  | DDR4-2400
dual-channel | 12–25W  | YM200UC4T2OFB
Athlon 300U [93] | January 6, 2019  | 2.4  | 3.3  | YM300UC4T2OFG
Ryzen 3 2200U [94] | January 8, 2018  | 2.5  | 3.4  | 1100 MHz  | 422.4  | YM2200C4T2OFB
Ryzen 3 3200U [95] | January 6, 2019  | 2.6  | 3.5  | 1200 MHz  | 460.8  | YM3200C4T2OFG
Ryzen 3 2300U [96] | January 8, 2018  | 4 (4)  | 2.0  | 3.4  | Vega 6  | 384:24:8
6 CU  | 1100 MHz  | 844.8  | YM2300C4T4MFB
Ryzen 3 Pro 2300U [97] | May 15, 2018  | YM230BC4T4MFB
Ryzen 5 2500U [98] | October 26, 2017  | 4 (8)  | 3.6  | Vega 8  | 512:32:16
8 CU  | 1126.4  | YM2500C4T4MFB
Ryzen 5 Pro 2500U [99] | May 15, 2018  | YM250BC4T4MFB
Ryzen 5 2600H [100] | September 10, 2018  | 3.2  | DDR4-3200
dual-channel | 35–54W  | YM2600C3T4MFB
Ryzen 7 2700U [101] | October 26, 2017  | 2.2  | 3.8  | Vega 10  | 640:40:16
10 CU  | 1300 MHz  | 1664  | DDR4-2400
dual-channel | 12–25W  | YM2700C4T4MFB
Ryzen 7 Pro 2700U [102] | May 15, 2018  | YM270BC4T4MFB
Ryzen 7 2800H [103] | September 10, 2018  | 3.3  | Vega 11  | 704:44:16
11 CU  | 1830.4  | DDR4-3200
dual-channel | 35–54W  | YM2800C3T4MFB

v * d * e

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[91]
2. ↑ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
3. ↑ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Picasso" (2019)

Main article: Engineering:Ryzen

* Fabrication 12 nm by GlobalFoundries
* Socket FP5
* Die size: 210 mm2
* Up to four Zen+ CPU cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual-channel DDR4 memory controller
* Fifth generation GCN-based GPU

Template:AMD Zen+ based mobile APUs

#### "Renoir" (2020)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC[104][105][106]
* Socket FP6
* Die size: 156 mm2
* 9.8 billion transistors on one single 7 nm monolithic die[107]
* Up to eight Zen 2 CPU cores
* L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
* L2 cache: 512 KB per core.
* Fifth generation GCN-based GPU
* Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
* All the CPUs support 16 PCIe 3.0 lanes.

##### U

Template:AMD Ryzen Mobile 4000U series

##### H

Template:AMD Ryzen Mobile 4000H series

#### "Lucienne" (2021)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC
* Socket FP6
* Die size: 156 mm2
* Up to eight Zen 2 CPU cores
* Fifth generation GCN-based GPU (7 nm Vega)

Template:AMD Ryzen Mobile 5000 Zen 2 based series

#### "Cezanne" (2021)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC
* Socket FP6
* Die size: 180 mm2
* Up to eight Zen 3 CPU cores
* L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
* L2 cache: 512 KB per core.
* Fifth generation GCN-based GPU
* Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
* All the CPUs support 16 PCIe 3.0 lanes.

##### U

Template:AMD Cezanne U

##### H

Template:AMD Cezanne H

#### "Barceló" (2022)

Main article: Engineering:Ryzen

* Fabrication 7 nm by TSMC
* Socket FP6
* Die size: 180 mm2
* Up to eight Zen 3 CPU cores
* L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
* L2 cache: 512 KB per core.
* Fifth generation GCN-based GPU
* Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
* All the CPUs support 16 PCIe 3.0 lanes.

Template:AMD Barceló

#### "Rembrandt" (2022)

Main article: Engineering:Ryzen

* Fabrication 6 nm by TSMC
* Socket FP7
* Die size: 210 mm2
* Up to eight Zen 3+ CPU cores
* Second generation RDNA-based GPU

Template:AMD Ryzen Mobile 6000 series

#### "Phoenix" (2024)

Main article: Engineering:Ryzen

* Fabrication 4 nm by TSMC
* Up to eight Zen 4 CPU cores
* Dual-channel DDR5 or LPDDR5x memory controller
* RDNA3 iGPU
* XDNA accelerator

#### "Dragon Range" (2023)

Main article: Engineering:Ryzen

* Fabrication 5 nm (CCD) and 6 nm (cIOD) by TSMC
* Up to sixteen Zen 4 CPU cores
* Dual-channel DDR5 memory controller
* Basic RDNA2 iGPU

## Ultra-mobile APUs

### Brazos: "Desna", "Ontario", "Zacate" (2011)

* Fabrication 40 nm by TSMC
* Socket FT1 (BGA-413)
* Based on the Bobcat microarchitecture[108]
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
* PowerNow!
* DirectX 11 integrated graphics with UVD 3.0
* Z-series denote Desna; C-series denote Ontario; and the E-series denotes Zacate
* 2.50 GT/s UMI (PCIe 1.0 ×4)

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Turbo

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2
Z-01 | June 1, 2011  | 40 nm  | B0  | 2 (2)  | 1.0  | N/A  | 32KB inst.
32KB data

per core  | 2× 512KB  | HD 6250  | 80:8:4  | 276  | N/A  | 44.1  | 1066  | 5.9  | XMZ01AFVB22GV
|  |  |
C-30 | January 4, 2011  | 1 (1)  | 1.2  | 512KB  | 9  | CMC30AFPB12GT
C-50 | 2 (2)  | 1.0  | 2× 512KB  | CMC50AFPB22GT
C-60  | August 22, 2011  | C0  | 1.33  | HD 6290  | 400  | CMC60AFPB22GV
|  |  |  |
E-240 | January 4, 2011  | B0  | 1 (1)  | 1.5  | N/A  | 512KB  | HD 6310  | 500  | N/A  | 80  | 1066  | 18  | EME240GBB12GT
E-300 | August 22, 2011  | 2 (2)  | 1.3  | 2×

512KB

| 488  | 78  | EME300GBB22GV
E-350 | January 4, 2011  | 1.6  | 492  | 78.7  | EME350GBB22GT
E-450 | August 22, 2011  | B0
C0  | 1.65  | HD 6320  | 508  | 600  | 81.2  | 1333  | EME450GBB22GV

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### Brazos 2.0: "Ontario", "Zacate" (2012)

* Fabrication 40 nm by TSMC
* Socket FT1 (BGA-413)
* Based on the Bobcat microarchitecture[108]
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
* PowerNow!
* DirectX 11 integrated graphics
* C-series denote Ontario; and the E-series denotes Zacate
* 2.50 GT/s UMI (PCIe 1.0 ×4)

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Turbo

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2  | L3
C-70 | September 15, 2012  | 40 nm  | C0  | 2 (2)  | 1.0  | 1.33  | 32 KB inst.
32 KB data

per core  | 2× 512KB  | N/A  | HD 7290  | 80:8:4  | 276  | 400  | 44.1  | 1066  | 9  | CMC70AFPB22GV
|  |  |  |  |
E1-1200 | June 6, 2012  | C0  | 1.4  | N/A  | HD 7310  | 500  | N/A  | 80  | 1066  | 18  | EM1200GBB22GV
E1-1500  | January 7, 2013  | 1.48  | 529  | 84.6  |
E2-1800 | June 6, 2012  | 1.7  | HD 7340  | 523  | 680  | 83.6  | 1333  | EM1800GBB22GV
E2-2000  | January 7, 2013  | 1.75  | 538  | 700  | 86  |

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### Brazos-T: "Hondo" (2012)

* Fabrication 40 nm by TSMC
* Socket FT1 (BGA-413)
* Based on the Bobcat microarchitecture[108]
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* Found in tablet computers
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
* PowerNow!
* DirectX 11 integrated graphics
* 2.50 GT/s UMI (PCIe 1.0 ×4)

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
Memory
support  | TDP (W)  | Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock (MHz)  | GFLOPS[lower-alpha 2]
L1  | L2
Z-60 | October 9, 2012  | 40 nm  | C0  | 2 (2)  | 1.0  | 32KB inst.
32KB data

per core  | 2× 512 KB  | HD 6250  | 80:8:4  | 276  | 44.1  | 1066  | 4.5  | XMZ60AFVB22GV

1. ↑ AMD in its technical documentation uses KB, which it defines as "kilobyte" and as equal to 1024 B (i.e., 1 KiB), and MB, which it defines as "megabyte" and as equal to 1024 KB (1 MiB).[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### "Kabini", "Temash" (2013)

* Fabrication 28 nm by TSMC
* Socket FT3 (BGA)
* 2 to 4 CPU Cores (Jaguar (microarchitecture))
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* Turbo Dock Technology, C6 and CC6 low power states
* GPU based on Graphics Core Next (GCN)
* AMD Eyefinity multi-monitor for up to two displays

#### Temash, Elite Mobility APU

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3L

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Turbo

(MHz)

L1  | L2

(MB)

A4-1200 | May 23, 2013  | 28 nm  | KB-A1  | 2 (2)  | 1.0  | N/A  | 32 KB inst.
32 KB data

per core  | 1  | HD 8180  | 128:8:4
2 CU  | 225  | N/A  | 1066  | 4  | AT1200IFJ23HM
A4-1250 | HD 8210  | 300  | 1333  | 8  | AT1250IDJ23HM
A4-1350 | 4 (4)  | 2  | 1066  | AT1350IDJ44HM
A6-1450 | 1.4  | HD 8250  | 400  | AT1450IDJ44HM

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

#### Kabini, Mainstream APU

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3L

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

L1  | L2

(MB)

| L3
E1-2100 | May 2013  | 28 nm  | KB-A1  | 2 (2)  | 1.0  | 32KB inst.
32KB data

per core  | 1  | N/A  | HD 8210  | 128:8:4
2 CU  | 300  | 1333  | 9  | EM2100ICJ23HM
E1-2200 | Feb 2014  | 1.05  | EM2200ICJ23HM
E1-2500 | May 2013  | 1.4  | HD 8240  | 400  | 15  | EM2500IBJ23HM
E2-3000 | 1.65  | HD 8280  | 450  | 1600  | EM3000IBJ23HM
E2-3800 | Feb 2014  | 4  | 1.3  | 2  | EM3800IBJ44HM
A4-5000 | May 2013  | 1.5  | HD 8330  | 497  | AM5000IBJ44HM
A4-5100 | Feb 2014  | 1.55  | AM5100IBJ44HM
A6-5200 | May 2013  | 2.0  | HD 8400  | 600  | 25  | AM5200IAJ44HM
A4 Pro-3340B | Nov 2014  | 2.2  | HD 8240  | 400  | AM334BIAJ44HM

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

### "Beema", "Mullins" (2014)

* Fabrication 28 nm by GlobalFoundries
* Socket FT3b (BGA)
* CPU: 2 to 4 (Puma cores)
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* GPU based on Graphics Core Next (GCN)
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* Intelligent Turbo Boost
* Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution

#### Mullins, Tablet/2-in-1 APU

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3L

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Turbo

(MHz)

L1  | L2

(MB)

| L3
E1 Micro-6200T | Q2 2014  | 28 nm  | ML-A1  | 2 (2)  | 1.0  | 1.4  | 32 KB inst.
32 KB data

per core  | 1  | N/A  | R2  | 128:8:4
2 CU  | 300  | 600  | 1066  | 3.95  | EM620TIWJ23JB
A4 Micro-6400T | 4 (4)  | 1.6  | 2  | R3  | 350  | 686  | 1333  | 4.5  | AM640TIVJ44JB
A10 Micro-6700T | 1.2  | 2.2  | R6  | 500  | N/A  | AM670TIVJ44JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

#### Beema, Notebook APU

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3 Memory support  | TDP (W)  | Part number

|
|
|
|
|
|
|
|

Cores (threads) [FPUs] | Clock (GHz)  | Turbo (GHz)  | Cache[lower-alpha 1] | Model  | Config  | Clock (MHz)  | Turbo (MHz)
L1  | L2 (MB)  | L3
E1-6010 | Q2 2014  | 28 nm  | ML-A1  | 2 (2)  | 1.35  | N/A  | 32 KB inst. 32 KB data per core  | 1  | N/A  | R2  | 128:8:4
2 CU  | 300  | 600  | (L)1333  | 10  | EM6010IUJ23JB
E1-6015[109] | Q2 2015  | 1.4  |
E2-6110 | Q2 2014  | 4 (4)  | 1.5  | 2  | (L)1600  | 15  | EM6110ITJ44JB
A4-6210 | 1.8  | R3  | 350  | 686  | AM6210ITJ44JB
A4-6250J[110] | 2.0  | 25
A6-6310 | 1.8  | 2.4  | R4  | 300  | 800  | (L)1866  | 15  | AM6310ITJ44JB
A8-6410 | 2.0  | R5  | AM6410ITJ44JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

### "Carrizo-L" (2015)

* Fabrication 28 nm by GlobalFoundries
* Socket FT3b (BGA), FP4 (μBGA)[111]
* CPU: 2 to 4 (Puma+ cores)
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* GPU based on Graphics Core Next (GCN)
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* Intelligent Turbo Boost
* Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution
* All models except A8-7410 available in both laptop and all-in-one desktop versions

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3
Memory
support  | TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads)
[FPUs] | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock  | Turbo

(MHz)

L1  | L2

(MB)

E1-7010 | May 2015  | 28 nm  | ML-A1  | 2  | 1.5  | N/A  | 32 KB inst.
32 KB data

per core  | 1  | R2  | 128:8:4
2 CU  |  | 400  | (L)1333  | 10  | EM7010IUJ23JB
EM7010JCY23JB
EM7010JCY23JBD
E2-7110 | 4  | 1.8  | 2  | R2  |  | 600  | (L)1600  | 12–25  | EM7110ITJ44JB
EM7110JBY44JB
EM7110JBY44JBD
A4-7210 | 2.2  | R3  |  | 686  | AM7210ITJ44JB
AM7210JBY44JBD
A6-7310 | 2.0  | 2.4  | R4  |  | 800  | (L)1866  | AM7310ITJ44JB
AM7310JBY44JB
AM7310JBY44JBD
A8-7410 | 2.2  | 2.5  | R5  |  | 847  | 15  | AM7410JBY44JB
A4 PRO-3350B | May 2016  | 2.0  | 2.4  | R4  |  | 800  | 1600  | AM335BITJ44JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

### "Stoney Ridge" (2016)

* Fabrication 28 nm by GlobalFoundries
* Socket FP4[87] / FT4
* 2 "Excavator+" x86 CPU cores
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* Single-channel DDR4 memory controller
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
* GPU based on Graphics Core Next 3rd Generation with VP9 decoding

Model number  | Released  | Fab  | CPU  | GPU  | DDR4

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|

[Modules/FPUs]

Cores/threads

| Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| GFLOPS[lower-alpha 2]
L1  | L2

(MB)

E2-9000e  | November 2016  | 28 nm  | [1]2  | 1.5  | 2.0  | 96 KB inst.
per module

32 KB data
per core  | 1  | R2  | 128:8:4
2 CU  | 600  | 153.6  | 1866  | 6  | EM900EANN23AC
E2-9000  | June 2016  | 1.8  | 2.2  | 10  | EM9000AKN23AC
E2-9010 | 2.0  | 2.2  | 10–15  | EM9010AVY23AC
A4-9120 | Q2 2017  | 2.2  | 2.5  | R3  | 655  | 167.6  | 2133  | 10–15  | AM9120AYN23AC
A4-9125 | Q2 2018  | 2.3  | 2.6  | 686  | 175.6  | AM9125AYN23AC
A4-9120C | January 6, 2019  | 1.6  | 2.4  | R4  | 192:12:8
3 CU  | 600  | 230.4  | 1866  | 6  | AM912CANN23AC
A6-9200e  | November 2016  | 1.8  | 2.7  | 2133  | AM920EANN23AC
A6-9200  | 2.0  | 2.8  | 10  | AM9200AKN23AC
A6-9210 | June 2016  | 2.4  | 2.8  | 10–15  | AM9210AVY23AC
A6-9220 | Q2 2017  | 2.5  | 2.9  | 655  | 251.5  | 10–15  | AM9220AYN23AC
A6-9225 | Q2 2018  | 2.6  | 3.0  | 686  | 263.4  | AM9225AYN23AC
A6-9220C | January 6, 2019  | 1.8  | 2.7  | R5  | 720  | 276.4  | 1866  | 6  | AM922CANN23AC
A9-9400  | November 2016  | 2.4  | 3.2  | 800  | 307.2  | 2133  | 10  | AM9400AKN23AC
A9-9410 | June 2016  | 2.9  | 3.5  | 10–25  | AM9410AFY23AC
A9-9420 | Q2 2017  | 3.0  | 3.6  | 847  | 325.2  | AM9420AYN23AC
A9-9425 | Q2 2018  | 3.1  | 3.7  | 900  | 345.6  | AM9425AYN23AC
A9-9430[112] | Q2 2017  | 3.2  | 3.5  | 847  | 325.2  | 2400  | 25  | AD9430AJN23AC
|  |  |
Pro A4-4350B | Q1 2018  | 2.5  | 2.9  | 655  | 251.5  | 2133  | 15  |
Pro A4-5350B | Q1 2020  | 3.0  | 3.6  | 847  | 325.2  |
Pro A6-7350B | Q1 2018  |
Pro A6-8350B | Q1 2020  | 3.1  | 3.7  | 900  | 345.6  |

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### "Dalí" (2020)

* Fabrication 14 nm by GlobalFoundries
* Socket FP5
* Two Zen CPU cores
* Over 30% die size reduction over predecessor (Raven Ridge)
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual-channel RAM

Template:AMD Dalí Mobile

### "Pollock" (2020)

* Fabrication 14 nm by GlobalFoundries
* Socket FT5
* Two Zen CPU cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Single-channel RAM

Template:AMD Pollock Mobile

### "Mendocino" (2022)

Main article: Engineering:Ryzen

Template:AMD Athlon Mobile 7020 series

## Embedded APUs

### G-Series

#### Brazos: "Ontario" and "Zacate" (2011)

* Fabrication 40 nm
* Socket FT1 (BGA-413)
* CPU microarchitecture: Bobcat[113]
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
* GPU microarchitecture: TeraScale 2 (VLIW5) "Evergreen"
* Memory support: single-channel, support up to two DIMMs of DDR3-1333 or DDR3L-1066
* 5 GT/s UMI

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2
G-Series T24L  | March 1, 2011
May 23, 2011  | 40 nm  | B0  | 1 (1)  | 0.8
1.0  | 32 KB inst.
32 KB data

per core  | 512 KB  | N/A  | 1066  | 5  | GET24LFPB12GTE
GET24LFQB12GVE
G-Series T30L  | March 1, 2011
May 23, 2011  | 1.4  | 18  | GET30LGBB12GTE
GET30LGBB12GVE
G-Series T48L  | March 1, 2011
May 23, 2011  | 2 (2)  | 2 × 512 KB  | GET48LGBB22GTE
GET48LGBB22GVE
|  |  |
G-Series T16R  | June 25, 2012  | B0  | 1 (1)  | 0.615  | 512 KB  | HD 6250  | 80:8:4  | 276  | 44.1  | (L)1066  | 4.5  | GET16RFWB12GVE
G-Series T40R  | May 23, 2011  | 1.0  | 280  | 44.8  | 1066  | 5.5  | GET40RFQB12GVE
G-Series T40E  | 2 (2)  | 2 × 512 KB  | 6.4  | GET40EFQB22GVE
G-Series T40N  | January 19, 2011
May 23, 2011  | HD 6250
HD 6290  | 9  | GET40NFPB22GTE
GET40NFPB22GVE
G-Series T40R  | May 23, 2011  | 1 (1)  | 512 KB  | HD 6250  | 5.5  | GET40RFSB12GVE
G-Series T44R  | January 19, 2011
May 23, 2011  | 1.2  | 9  | GET44RFPB12GTE
GET44RFPB12GVE
G-Series T48E  | June 25, 2012  | 2 (2)  | 1.4  | 2 × 512 KB  | 18  | GET48EGBB22GVE
G-Series T48N  | January 19, 2011
May 23, 2011  | HD 6310  | 500
520  | 80
83.2  | GET48NGBB22GTE
GET48NGBB22GVE
G-Series T52R  | January 19, 2011
May 23, 2011  | 1 (1)  | 1.5  | 512 KB  | 500  | 80  | 1066
1333  | GET52RGBB12GTE
GET52RGBB12GVE
G-Series T56E  | June 25, 2012  | 2 (2)  | 1.65  | 2 × 512 KB  | HD 6250  | 275  | 44  | 1333  | GET56EGBB22GVE
G-Series T56N  | January 19, 2011
May 23, 2011  | 1.6
1.65  | HD 6310
HD 6320  | 500  | 80  | 1066
1333  | GET56NGBB22GTE
GET56NGBB22GVE

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Kabini" (2013, SoC)

* Fabrication 28 nm
* Socket FT3 (769-BGA)[114]
* CPU microarchitecture: Jaguar
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support. No support for FMA (Fused Multiply-Accumulate). Trusted Platform Module (TPM) 1.2 support
* GPU microarchitecture: Graphics Core Next (GCN) with Unified Video Decoder 3 (H.264, VC-1, MPEG2, etc.)
* Single channel DDR3-1600, 1.25 and 1.35 V voltage level support, support for ECC memory
* Integrates Controller Hub functional block, HD audio, 2 SATA channels, USB 2.0 and USB 3.0 (except GX-210JA)

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Junction temperature (°C)  | Part number

|
|
|
|
|
|
|
|
|

Cores
(threads) | Clock

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

GX-210UA  | Unknown  | 28 nm  | B0  | 2 (2)  | 1.0  | 32 KB inst.
32 KB data

per core  | 1  | N/A  | 1333  | 8.5  | 0-90  | GE210UIGJ23HM
GX-210JA  | July 30, 2013  | HD 8180E  | 128:8:4
2 CU  | 225  | 57.6  | 1066  | 6  | GE210JIHJ23HM
GX-209HA  | Unknown  | HD 8400E  | 600  | 153.6  | 9  | -40-105  | GE209HISJ23HM
GX-210HA  | June 1, 2013  | HD 8210E  | 300  | 76.8  | 1333  | 0-90  | GE210HICJ23HM
GX-217GA  | 1.65  | HD 8280E  | 450  | 115.2  | 1600  | 15  | GE217GIBJ23HM
GX-411GA  | Unknown  | 4 (4)  | 1.1  | 2  | HD 8210E  | 300  | 76.8  | 1066  | -40-105  | GE411GIRJ44HM
GX-415GA  | June 1, 2013  | 1.5  | HD 8330E  | 500  | 128  | 1600  | 0-90  | GE415GIBJ44HM
GX-416RA  | 1.6  | N/A  | GE416RIBJ44HM
GX-420CA  | 2.0  | HD 8400E  | 128:8:4
2 CU  | 600  | 153.6  | 25  | GE420CIAJ44HM

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Steppe Eagle" (2014, SoC)

* Fabrication 28 nm
* Socket FT3b (769-BGA)
* CPU microarchitecture: Puma
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Junction temperature (°C)  | Part number

|
|
|
|
|
|
|
|
|

Cores
(threads)
[FPUs] | Clock

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

GX-210JC  | June 4, 2014  | 28 nm  | ML-A1  | 2 (2) [1]  | 1.0  | 32 KB inst.
32 KB data

per core  | 1  | R1E  | 128:8:4
2 CU  | 267  | 68.3  | 1600  | 6  | -40-105  | GE210JIZJ23JB
GX-212JC  | 1.2  | R2E  | 300  | 76.8  | 1333  | 0-90  | GE212JIYJ23JB
GX-216HC  | 1.6  | R4E  | 1066  | 10  | -40-105  | GE216HHBJ23JB
GX-222GC  | 2.2  | R5E  | 655  | 167.6  | 1600  | 15  | 0-90  | GE222GITJ23JB
GX-412HC  | 4 (4) [2]  | 1.2  | 2  | R3E  | 300  | 76.8  | 1333  | 7  | GE412HIYJ44JB
GX-424CC  | 2.4  | R5E  | 497  | 127.2  | 1866  | 25  | GE424CIXJ44JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Crowned Eagle" (2014, SoC)

* Fabrication 28 nm
* Socket FT3b (769-BGA)
* CPU microarchitecture: Puma
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* no GPU

Model  | Released  | Fab  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Junction

temperature

(°C)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads)
[FPUs] | Clock

(GHz)

| Cache[lower-alpha 1]
L1  | L2

(MB)

GX-224PC  | June 4, 2014  | 28 nm  | 2 (2) [1]  | 2.4  | 32 KB inst.
32 KB data

per core  | 1  | N/A  | 1866  | 25  | 0-90  | GE224PIXJ23JB
GX-410VC  | 4 (4) [2]  | 1.0  | 2  | 1066  | 7  | -40-105  | GE410VIZJ44JB
GX-412TC  | 1.2  | 1600  | 6  | 0-90  | GE412TIYJ44JB
GX-420MC  | 2.0  | 17.5  | GE420MIXJ44JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]

#### LX-Family (2016, SoC)

* Fabrication 28 nm
* Socket FT3b (769-BGA)
* 2 Puma x86 cores with 1MB shared L2 cache
* L1 Cache: 32 KB Data per core and 32 KB Instructions per core
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
* GPU microarchitecture: Graphics Core Next (GCN) (1CU) with support for DirectX 11.2
* Single channel 64-bit DDR3 memory with ECC
* Integrated Controller Hub supports: PCIe® 2.0 4×1, 2 USB3 + 4 USB2 ports, 2 SATA 2.0/3.0 ports

Model  | Released  | Fab  | Step.  | CPU  | GPU  | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

Cores
(threads)
[FPUs] | Clock

(GHz)

| Cache[lower-alpha 1] | Model  | Config  | Clock

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

GX-208JL  | February 23, 2016  | 28 nm  | ML-A1  | 2  | 0.8  | 32 KB inst.
32 KB data

per core  | 1  | R1E  | 64:4:1
1 CU  | 267  | 34.1  | 1333  | 6  | GE208JIVJ23JB
GX-210HL  | 2017  | 1.0  | 1066  | 7  | GE208HIZJ23JB
GX-210JL  | February 23, 2016  | 1333  | 6  | GE210JIVJ23JB
GX-210KL  | 2017  | 4.5  | GE210KIVJ23JB
GX-215GL  | February 23, 2016  | 1.5  | 497  | 63.6  | 1600  | 15  | GE215GITJ23JB
GX-218GL  | 1.8  | GE218GITJ23JB

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### I-Family: "Brown Falcon" (2016, SoC)

* Fabrication 28 nm
* Socket FP4[115]
* 2 or 4 Excavator x86 cores with 1MB shared L2 cache
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
* GPU microarchitecture: Graphics Core Next (GCN) (up to 4 CUs) with support for DirectX 12
* Dual channel 64-bit DDR4 or DDR3 memory with ECC
* 4K × 2K H.265 decode capability and multi format encode and decode
* Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports

Model | Released  | Fab | CPU | GPU | Memory
support | TDP

(W)

| Part number

|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model | Config[note 1] | Clock

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

GX-217GI  | February 23, 2016  | 28 nm | [1] 2 | 1.7 | 2.0 | 96 KB inst.
per module

32 KB data
per core | 1 | R6E | 256:16:4
4 CU | 758 | 388 | DDR3/DDR4-1600 | 15 | GE217GAAY23KA
GX-420GI[116] | 2016 | [2] 4 | 2.0 | 2.2 | 2 | R6E

R7E | 256:16:4
4 CU

384:24:4
6 CU | 758

626 | 388

480.7 | DDR4-1866 | 16.1 | GE420GAAY43KA

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### J-Family: "Prairie Falcon" (2016, SoC)

* Fabrication 28 nm
* Socket FP4[117]
* 2 "Excavator+" x86 cores with 1MB shared L2 cache
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
* GPU microarchitecture: Radeon R5E Graphics Core Next (GCN) (up to 3 CUs) with support for DirectX 12
* Single channel 64-bit DDR4 or DDR3 memory
* 4K × 2K H.265 decode capability with 10-bit compatibility and multi format encode and decode
* Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports

Model | Released  | Fab | CPU | GPU | Memory
support | TDP

(W)

| Junction temperature (°C) | Part number

|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model | Config[note 1] | Clock

(MHz)

| Turbo | Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

GX-212JJ  | 2018  | 28 nm | [1] 2 | 1.2 | 1.6 | 96 KB inst.
per module

32 KB data
per core | 1 | R1E | 64:4:1
1 CU | 600 | N/A | 76.8 | DDR3-1333
DDR4-1600 | 6–

| 0-90 | GE212JAWY23AC
GX-215JJ  | 2017 | 1.5 | 2.0 | R2E | 128:8:2
2 CU | 153.6 | DDR3-1600
DDR4-1866 | GE215JAWY23AC
GX-220IJ  | 2018 | 2.0 | 2.2 | 10–

| GE220IAVY23AC
GX-224IJ  | 2017 | 2.4 | 2.8 | R4E | 192:12:3
3 CU | 230.4 | DDR3-1866
DDR4-2133 | GE224IAVY23AC

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### R-Series

#### Comal: "Trinity" (2012)

* Fabrication 32 nm
* Socket FP2 (BGA-827), FS1r2
* CPU microarchitecture: Piledriver
* L1 Cache: 16 KB Data per core and 64 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[28] ABM, BMI1, TBM
* GPU microarchitecture: TeraScale 3 (VLIW4) "Northern Islands"
* Memory support: dual-channel 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3
* 2.5 GT/s UMI
* Die size: 246 mm2; Transistors: 1.303 billion
* OpenCL 1.1 and OpenGL 4.2 support

Model  | Released  | Fab | Step. | CPU | GPU | DDR3

Memory
support

| TDP

(W)

| Part number

|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model | Config[note 1] | Clock

(MHz)

| Turbo

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

R-252F  | May 21, 2012  | 32 nm  | B0 | [1] 2 | 1.9 | 2.4 | 64 KB inst.
per module

16 KB data
per core | 1 | HD 7400G | 192:12:4
3 CU | 333 | 417 | 127.8 | 1333 | 17 | RE252FSHE23HJE
R-260H  | 2.1 | 2.6 | 2? | HD 7500G | 256:16:8
4 CU | 327 | 424 | 167.4 | RE260HSHE24HJE
R-268D  | 2.5 | 3.0 | 1 | HD 7420G | 192:12:4
3 CU | 470 | 640 | 180.4 | 1600 | 35 | RE268DDEC23HJE
R-272F  | 2.7 | 3.2 | HD 7520G | 497 | 686 | 190.8 | RE272FDEC23HJE
R-452L  | [2] 4 | 1.6 | 2.4 | 2 × 2 MB | HD 7600G | 256:16:8
4 CU | 327 | 424 | 167.4 | 19 | RE452LSHE44HJE
R-460H  | 1.9 | 2.8 | HD 7640G | 497 | 655 | 254.4 | 35 | RE460HDEC44HJE
R-460L  | 2.0 | HD 7620G | 384:24:8
6 CU | 360 | 497 | 276.4 | 1333 | 25 | RE460LSIE44HJE
R-464L  | 2.3 | 3.2 | HD 7660G | 497 | 686 | 381.6 | 1600 | 35 | RE464LDEC44HJE

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Bald Eagle" (2014)

* Fabrication 28 nm
* Socket FP3
* Up to 4 Steamroller x86 cores[118]
* L1 Cache: 16 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[28] ABM, BMI1, TBM
* GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 11.1 and OpenGL 4.2
* Dual channel DDR3 memory with ECC
* Unified Video Decode (UVD) 4.2 and Video Coding Engine (VCE) 2.0

Model  | Released  | Fab | CPU | GPU | DDR3

Memory
support

| TDP

(W)

| Junction temperature (°C) | Part number

|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model | Config[note 1] | Clock

(MHz)

| Turbo

(MHz)

| Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

RX-219NB  | May 20, 2014  | 28 nm | [1] 2 | 2.2 | 3.0 | 96 KB inst.
per module

16 KB data
per core | 1 | N/A | 1600 | 15-

| 0-100 | RE219NECH23JA
RX-225FB  | R4 | 192:12:4
3 CU | 464 | 533 | 178.1 | RE225FECH23JA
RX-425BB  | [2] 4 | 2.5 | 3.4 | 4 | R6 | 384:24:8
6 CU | 576 | 654 | 442.3 | 1866 | 30-

| RE425BDGH44JA
RX-427BB  | 2.7 | 3.6 | R7 | 512:32:8
8 CU | 600 | 686 | 614.4 | 2133 | 30-

| RE427BDGH44JA
RX-427NB  | N/A  | RE427NDGH44JA

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

#### "Merlin Falcon" (2015, SoC)

* Fabrication 28 nm
* Socket FP4
* Up to 4 Excavator x86 cores[119]
* L1 Cache: 32 KB Data per core and 96 KB Instructions per module
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
* GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 12
* Dual channel 64-bit DDR4 or DDR3 memory with ECC
* Unified Video Decode (UVD) 6 (4K H.265 and H.264 decode) and Video Coding Engine (VCE) 3.1 (4K H.264 encode)
* Dedicated AMD Secure Processor supports secure boot with AMD Hardware Validated Boot (HVB)
* Integrated FCH featuring PCIe 3.0 USB3.0, SATA3, SD, GPIO, SPI, I2S, I2C, UART

Model | Released  | Fab | Stepping | CPU | GPU | Memory
support | TDP

(W)

| Junction temperature (°C) | Part number

|
|
|
|
|
|
|
|
|

[Modules/FPUs]
Cores/threads | Clock

(GHz)

| Turbo

(GHz)

| Cache[lower-alpha 1] | Model | Config[note 1] | Clock

(GHz)

| Turbo | Processing
power
(GFLOPS)[lower-alpha 2]
L1  | L2

(MB)

| L3
RX-216TD  | October 21, 2015  | 28 nm |  | [1] 2 | 1.6 | 3.0 | 96 KB inst.
per module

32 KB data
per core | 1 | N/A | N/A | DDR3/DDR4-1600 | 12-

| 0-90 | RE216TAAY23KA
RX-216GD  |  | R5 | 256:?:?
4 CU | 0.8 | N/A | 409.6 | RE216GAAY23KA
RX-416GD  |  |  | [2] 4 | 2.4 | 2 | R6 | 384:?:?
6 CU | 0.72 | 552.9 | 15 | -40-105 | RE416GATY43KA
RX-418GD  | October 21, 2015 |  | 1.8 | 3.2 | 384:?:?
6 CU | 0.8 | 614.4 | DDR3-2133
DDR4-2400 | 12-

| 0-90 | RE418GAAY43KA
RX-421BD  |  | 2.1 | 3.4 | R7 | 512:?:?
8 CU | 819.2 | RE421BAAY43KA
RX-421ND  |  | N/A | RE421NAAY43KA

1. ↑ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[26]
2. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

### 1000-Series

#### V1000-Family: "Great Horned Owl" (2018, SoC)

* Fabrication 14 nm by GlobalFoundries
* Up to 4 Zen cores
* Socket FP5
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual channel DDR4 memory with ECC
* Fifth generation GCN based GPU

Template:AMD V1000 series

#### R1000-Family: "Banded Kestrel" (2019, SoC)

* Fabrication 14 nm by GlobalFoundries
* Up to 2 Zen cores
* Socket FP5
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
* Dual channel DDR4 memory with ECC
* Fifth generation GCN based GPU

Template:AMD R1000 series

### 2000-Series

#### V2000-Family: "Grey Hawk" (2020, SoC)

* Fabrication 7 nm by TSMC
* Up to 8 Zen 2 cores
* Fifth generation GCN based GPU

Template:AMD V2000 series

#### R2000-Family: "River Hawk" (2022, SoC)

* Fabrication 12 nm by GlobalFoundries
* Up to 4 Zen+ cores
* MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core

Template:AMD Ryzen Embedded R2000 Series

## Custom APUs

As of May 1, 2013, AMD opened the doors of their "semi-custom" business unit.[120] Since these chips are custom-made for specific customer needs, they vary widely from both consumer-grade APUs and even the other custom-built ones. Some notable examples of semi-custom chips that have come from this sector include the chips from the PlayStation 4 and Xbox One.[121] So far the size of the integrated GPU in these semi-custom APUs exceed by far the GPU size in the consumer-grade APUs.

Template:AMD custom APU

## See also

* List of AMD chipsets
* List of AMD FX microprocessors
* List of AMD graphics processing units
* Ryzen

## Notes

1. ↑ 1.0 1.1 1.2 1.3 1.4 Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs

## References

1. ↑ "AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks". 31 May 2016. https://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks. Retrieved 3 January 2020.
2. ↑ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). November 20, 2014. Retrieved February 16, 2015.
3. ↑ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. https://www.techarp.com/guides/mobile-cpu-comparison-guide/5/. Retrieved 13 December 2017.
4. ↑ 4.0 4.1 "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/. Retrieved 6 June 2017.
5. ↑ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3. Retrieved 7 February 2018.
6. ↑ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands. Retrieved 20 November 2017.
7. ↑ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture", AMD, http://meseec.ce.rit.edu/551-projects/fall2014/3-4.pdf, retrieved 13 August 2016
8. ↑ "A technical look at AMD's Kaveri architecture". Semi Accurate. http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/. Retrieved 6 July 2014.
9. ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. http://support.amd.com/en-us/search/faq/154. Retrieved 8 December 2014.
10. ↑ Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". http://airlied.livejournal.com/68805.html. Retrieved 16 January 2016.
11. ↑ "Radeon feature matrix". freedesktop.org. http://xorg.freedesktop.org/wiki/RadeonFeature/. Retrieved 10 January 2016.
12. ↑ Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU". http://www.x.org/wiki/Events/XDC2015/Program/deucher_zhou_amdgpu.pdf. Retrieved 16 January 2016.
13. ↑ 13.0 13.1 Michel Dänzer (17 November 2016). "[ANNOUNCE xf86-video-amdgpu 1.2.0"]. lists.x.org. https://lists.x.org/archives/xorg-announce/2016-November/002741.html.
14. ↑ "Conformant Products - The Khronos Group Inc". The Khronos Group. https://www.khronos.org/conformance/adopters/conformant-products/vulkan.
15. ↑ "Conformant Products - The Khronos Group Inc". The Khronos Group. https://www.khronos.org/conformance/adopters/conformant-products/opengl.
16. ↑ "GPU-Tech.org - Catalyst 11.10 WHQL - First official Battlefield 3 driver for Radeon cards". http://www.gpu-tech.org/content.php/177-Catalyst-11-10-WHQL-First-official-Battlefield-3-driver-for-Radeon-graphics-cards.
17. ↑ "AMD Radeon Software Crimson Edition Beta". AMD. https://support.amd.com/en-us/kb-articles/pages/amd-radeon-software-crimson-edition-beta.aspx. Retrieved 2018-04-20.
18. ↑ "Mesamatrix". mesamatrix.net. https://mesamatrix.net/. Retrieved 2018-04-22.
19. ↑ "RadeonFeature". X.Org Foundation. https://www.x.org/wiki/RadeonFeature/. Retrieved 2018-04-20.
20. ↑ "Graphics Core Next: The Southern Islands Architecture". Tom's Hardware. 2011-12-21. http://www.tomshardware.com/reviews/radeon-hd-7970-benchmark-tahiti-gcn,3104-2.html. Retrieved 2013-06-26.
21. ↑ "AMD Clarifies 2013 Radeon Plans". Tom's Hardware. 2013-02-20. http://www.tomshardware.com/news/AMD-Sea-Islands-Radeon-GPU,21136.html. Retrieved 2013-06-26.
22. ↑ "Radeon VEGA Frontier Edition". AMD. 2017-05-30. http://pro.radeon.com/en-us/product/radeon-vega-frontier-edition/. Retrieved 2017-06-30.
23. ↑ "AMD launches A-Series and the first 32nm Athlon II X4 CPUs". http://www.cpu-world.com/news_2011/2011081701_AMD_launches_A-Series_and_the_first_32nm_Athlon_II_X4_CPUs.html.
24. ↑ Theo Valich (May 28, 2012). "AMD Comes Clean on Transistor Numbers With FX, Fusion Processors". http://www.brightsideofnews.com/news/2012/5/28/amd-comes-clean-on-transistor-numbers-with-fx2c-fusion-processors.aspx.
25. ↑ Anand Lal Shimpi (September 27, 2012). "AMD A10-5800K & A8-5600K Review: Trinity on the Desktop, Part 1". http://www.anandtech.com/show/6332/amd-trinity-a10-5800k-a8-5600k-review-part-1.
26. ↑ 26.00 26.01 26.02 26.03 26.04 26.05 26.06 26.07 26.08 26.09 26.10 26.11 26.12 26.13 26.14 26.15 26.16 26.17 26.18 26.19 26.20 26.21 26.22 26.23 26.24 26.25 26.26 26.27 26.28 26.29 26.30 26.31 26.32 26.33 "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors". AMD Technical Documentation. AMD Developer Central: Advanced Micro Devices, Inc.. April 15, 2017. p. 25. http://developer.amd.com/wordpress/media/2017/11/54945_PPR_Family_17h_Models_00h-0Fh.pdf.
27. ↑ "Trinity Improvements Include Updated Piledriver Cores and VLIW4 GPUs". May 4, 2012. http://www.pcper.com/news/Processors/Trinity-Improvements-Include-Updated-Piledriver-Cores-and-VLIW4-GPUs-0.
28. ↑ 28.0 28.1 28.2 "AMD detonates Trinity: Behold Bulldozer's second coming - ExtremeTech". https://www.extremetech.com/computing/129363-amd-detonates-trinity-behold-bulldozers-second-coming.
29. ↑ "AMD Trinity On The Desktop: A10, A8, And A6 Get Benchmarked!—Trinity: Coming Soon To A Desktop Near You". http://www.tomshardware.co.uk/a10-5800k-a8-5600k-a6-5400k,review-32463.html.
30. ↑ "AMD Trinity for Desktops. Part 1: Graphics Core". X-bit labs. September 27, 2012. http://www.xbitlabs.com/articles/graphics/display/amd-trinity-graphics.html.
31. ↑ "Review: AMD A10-5800K Dual Graphics evaluation—CPU". October 4, 2012. http://hexus.net/tech/reviews/cpu/46157-amd-a10-5800k-dual-graphics-evaluation/.
32. ↑ "The AMD A8-3850 Review: Llano on the Desktop". http://www.anandtech.com/show/4476/amd-a83850-review/6.
33. ↑ "Product Search Results—Bottom Line Telecommunications". Bottom Line Telecommunications Corporation. http://www.shopblt.com/cgi-bin/s.cgi?s_max=100&order_id=239797834&s_mfg=AMD.
34. ↑ 34.0 34.1 "AMD Sempron CPU". https://www.amd.com/en-us/products/processors/desktop/sempron-cpu.
35. ↑ Альберт Шаповалов (September 10, 2014). "Обзор и тестирование процессора AMD Athlon X2 340" (in ru). http://ru.gecid.com/cpu/amd_athlon_x2_340/?s=all.
36. ↑ "AMD A10-6800K and A10-6700 "Richland" APU Review". https://wccftech.com/review/amd-a10-6800k-a10-6700-richland-apu-review/.
37. ↑ 37.0 37.1 37.2 "AMD Athlon Processors". https://www.amd.com/en-us/products/processors/desktop/athlon-cpu.
38. ↑ btarunr (March 23, 2014). "AMD FX-670K CPU Shows Up in the Wild". http://www.techpowerup.com/199179/amd-fx-670k-cpu-shows-up-in-the-wild.html.
39. ↑ Anton Shilov (May 30, 2013). "AMD's Next-Gen "Kaveri" APUs Will Require New Mainboards". http://www.xbitlabs.com/news/cpu/display/20130530232155_AMD_s_Next_Gen_Kaveri_APUs_Will_Require_New_Mainboards.html.
40. ↑ "AMD Godavari core". http://www.cpu-world.com/Cores/Godavari.html.
41. ↑ "AMD Kaveri A10-7850K and A8-7600 review: Was it worth the wait for the first true heterogeneous chip?". https://www.extremetech.com/computing/174632-amd-kaveri-a10-7850k-and-a8-7600-review-was-it-worth-the-wait-for-the-first-true-heterogeneous-chip.
42. ↑ 42.0 42.1 Hassan Mujtaba (July 4, 2013). "AMD Kaveri APU Architecture Detailed". http://wccftech.com/amd-kaveri-apu-architecture-detailed-generation-apu-featuring-steamroller-gcn-cores/.
43. ↑ 43.0 43.1 "A technical look at AMD's Kaveri architecture". SemiAccurate. January 15, 2014. http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/.
44. ↑ 44.0 44.1 44.2 "AMD to add ARM processors to boost chip security". June 14, 2012. https://arstechnica.com/information-technology/2012/06/amd-to-add-arm-processors-to-boost-chip-security/.
45. ↑ 45.0 45.1 45.2 "AMD and ARM Fusion redefine beyond x86". http://technewspedia.com/amd-and-arm-fusion-redefine-beyond-x86/.
46. ↑ 46.0 46.1 "Carrizo presentation, page 12 - Carrizo is the 1st ARM Trustzone capable performance APU". http://www.ps-philgeps.gov.ph/home/images/BAD/PHILIPPINES_PS-DBM Event July 15, 2016.pdf.
47. ↑ "AMD A10-7850K Graphics Performance". February 14, 2014. http://www.techspot.com/review/781-amd-a10-7850k-graphics-performance/.
48. ↑ "AMD A8-7600 Kaveri APU review - The Embedded GPU - HSA & hUMA". January 14, 2014. http://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,3.html.
49. ↑ Gennadiy Shvets (October 18, 2014). "HP offers desktop PCs with AMD FX-770K Kaveri processor". http://en.ofweek.com/new-products/HP-offers-desktop-PCs-with-AMD-FX-770K-Kaveri-processor-19708.
50. ↑ "ASRock - FM2+ CPU Support List". https://www.asrock.com/support/cpu.asp?s=FM2+.
51. ↑ "AMD APU A8-7500 CPU怎么样？". http://www.pc811.com/tuijian/26613.html.
52. ↑ "AMD Details Carrizo APUs Energy Efficient Design at Hot Chips 2015 – 28nm Bulk High Density Design With 3.1 Billion Transistors, 250mm2 Die". August 26, 2015. https://wccftech.com/amd-carrizo-apu-architecture-hot-chips/.
53. ↑ "AMD quietly launches new Carrizo APU: A8-7680 processor". October 26, 2018. https://www.reddit.com/r/hardware/comments/9rmj8t/amd_quietly_launches_new_carrizo_apu_a87680/.
54. ↑ Cutress, Ian (October 28, 2018). "Day of the Dead: AMD Releases new Carrizo FM2+ APU, the A8-7680". https://www.anandtech.com/show/13524/amd-new-carrizo-fm2-apu-a8-7680.
55. ↑ Cutress, Ian (September 23, 2016). "AMD 7th Gen Bristol Ridge and AM4 Analysis". http://www.anandtech.com/show/10705/amd-7th-gen-bristol-ridge-and-am4-analysis-a12-9800-b350-a320-chipset.
56. ↑ "7th Gen AMD Athlon™ X4 940". https://www.amd.com/en/product/2081.
57. ↑ "7th Gen AMD Athlon™ X4 940". https://www.amd.com/en/product/2076.
58. ↑ "7th Gen AMD Athlon™ X4 940". https://www.amd.com/en/product/2071.
59. ↑ "AMD A6-Series A6-9400 - AD9400AGM23AB / AD9400AGABBOX". https://www.cpu-world.com/CPUs/Bulldozer/AMD-A6-Series A6-9400.html.
60. ↑ "7th Gen A6-9500E APU". https://www.amd.com/en/product/2091.
61. ↑ "7th Gen AMD PRO A6-9500E APU". https://www.amd.com/en/product/6186.
62. ↑ "7th Gen A6-9500 APU". https://www.amd.com/en/product/2096.
63. ↑ "7th Gen AMD PRO A6-9500 APU". https://www.amd.com/en/product/6181.
64. ↑ "7th Gen A6-9550 APU". https://www.amd.com/en/product/2086.
65. ↑ "7th Gen A8-9600 APU". https://www.amd.com/en/product/2101.
66. ↑ "7th Gen AMD PRO A8-9600 APU". https://www.amd.com/en/product/6191.
67. ↑ "7th Gen A10-9700E APU". https://www.amd.com/en/product/2106.
68. ↑ "7th Gen AMD PRO A10-9700E APU". https://www.amd.com/en/product/6166.
69. ↑ "7th Gen A10-9700 APU". https://www.amd.com/en/product/2111.
70. ↑ "7th Gen AMD PRO A10-9700 APU". https://www.amd.com/en/product/6161.
71. ↑ "7th Gen A12-9800E APU". https://www.amd.com/en/product/2116.
72. ↑ Sang-ho, Lee (September 19, 2016). "AMD Final Heavy Equipment X Carrier ZEN Bristol Ridge A12-9800 platform change". BodNara Korea. https://translate.google.com/translate?sl=auto&tl=en&js=y&prev=_t&hl=en&ie=UTF-8&u=http://www.bodnara.co.kr/bbs/article.html?num=134612&mn;=4&edit-text=.
73. ↑ "7th Gen AMD PRO A12-9800E APU". https://www.amd.com/en/product/6176.
74. ↑ "7th Gen A12-9800 APU". https://www.amd.com/en/product/2121.
75. ↑ "7th Gen AMD PRO A12-9800 APU". https://www.amd.com/en/product/6171.
76. ↑ "AMD Opteron X1150 - OX1150IPJ44HM". https://www.cpu-world.com/CPUs/Jaguar/AMD-Opteron X series X1150.html.
77. ↑ "AMD Launches the AMD Opteron X-Series Family: the Industry's Highest Performance Small Core x86 Server Processors". AMD (Press release). May 29, 2013. Archived from the original on August 22, 2024. Retrieved November 13, 2023.
78. ↑ Kennedy, Patrick (June 5, 2017). "New HPE ProLiant MicroServer Gen10 Powered by AMD Opteron X3000 APUs". https://www.servethehome.com/new-hpe-proliant-microserver-gen10-powered-amd-opteron-x3000-apus/.
79. ↑ 79.0 79.1 79.2 79.3 "Opteron Family". https://www.amd.com/en/opteron.
80. ↑ "AMD Opteron X3216 - OX3216AAY23KA". https://www.cpu-world.com/CPUs/Bulldozer/AMD-Opteron X3000 series X3216.html.
81. ↑ "AMD Opteron X3418 - OX3418AAY43KA". https://www.cpu-world.com/CPUs/Bulldozer/AMD-Opteron X3000 series X3418.html.
82. ↑ "AMD Opteron X3421 - OX3421AAY43KA". https://www.cpu-world.com/CPUs/Bulldozer/AMD-Opteron X3000 series X3421.html.
83. ↑ 83.0 83.1 "AMD lists A8-4557M and A10-4657M mobile APUs". http://www.cpu-world.com/news_2013/2013031901_AMD_lists_A8-4557M_and_A10-4657M_mobile_APUs.html.
84. ↑ "AMD intros 35W Richland mobile APUs". March 12, 2013. http://techreport.com/news/24482/amd-intros-35w-richland-mobile-apus.
85. ↑ Poeter, Damon. (March 12, 2013) AMD Bakes New Interface Capabilities Into Richland APUs | News & Opinion
86. ↑ "AMD Kaveri APU with SteamrollerB Core Features 20% CPU and 30% GPU Performance Uplift over Richland – Platform Details Unveiled | TechNationNews.com". http://www.technationnews.com/2013/11/24/amd-kaveri-apu-with-steamrollerb-core-features-20-cpu-and-30-gpu-performance-uplift-over-richland-platform-details-unveiled/.
87. ↑ 87.0 87.1 Cutress, Ian (June 1, 2016). "AMD Announces 7th Generation APU". http://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks.
88. ↑ "AMD A10-9620P SoC - Benchmarks and Specs". https://www.notebookcheck.net/AMD-A10-9620P-SoC-Benchmarks-and-Specs.234384.0.html.
89. ↑ "AMD A12-9720P SoC - Benchmarks and Specs". https://www.notebookcheck.net/AMD-A12-9720P-SoC-Benchmarks-and-Specs.234448.0.html.
90. ↑ "HP Pavilion 17 - HP® Official Store". http://store.hp.com/us/en/pdp/hp-pavilion-laptop
17z-touch-optional-1gz59av-1.
91. ↑ "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). AMD Technical Documentation. AMD Developer Central: Advanced Micro Devices, Inc.. 2017-04-15. p. 25. http://developer.amd.com/wordpress/media/2017/11/54945_PPR_Family_17h_Models_00h-0Fh.pdf. Retrieved 2019-11-01.
92. ↑ "AMD Athlon™ PRO 200U Mobile Processor with Radeon™ Vega 3 Graphics". https://www.amd.com/en/product/8201.
93. ↑ "AMD Athlon™ 300U Mobile Processor with Radeon™ Vega 3 Graphics". https://www.amd.com/en/products/apu/amd-athlon-300u.
94. ↑ "AMD Ryzen™ 3 2200U". https://www.amd.com/en/products/apu/amd-ryzen-3-2200u.
95. ↑ "AMD Ryzen™ 3 3200U Mobile Processor with Radeon™ Vega 3 Graphics". https://www.amd.com/en/products/apu/amd-ryzen-3-3200u.
96. ↑ "AMD Ryzen™ 3 2300U". https://www.amd.com/en/products/apu/amd-ryzen-3-2300u.
97. ↑ "AMD Ryzen™ 3 PRO 2300U". https://www.amd.com/en/products/apu/amd-ryzen-3-pro-2300u.
98. ↑ "AMD Ryzen™ 5 2500U". https://www.amd.com/en/products/apu/amd-ryzen-5-2500u.
99. ↑ "AMD Ryzen™ 5 PRO 2500U". https://www.amd.com/en/products/apu/amd-ryzen-5-pro-2500u.
100. ↑ "AMD Ryzen™ 5 2600H Mobile Processor with Radeon™ Vega 8 Graphics". https://www.amd.com/en/products/apu/amd-ryzen-5-2600h.
101. ↑ "AMD Ryzen™ 7 2700U". https://www.amd.com/en/products/apu/amd-ryzen-7-2700u.
102. ↑ "AMD Ryzen™ 7 PRO 2700U". https://www.amd.com/en/products/apu/amd-ryzen-7-pro-2700u.
103. ↑ "AMD Ryzen™ 7 2800H Mobile Processor with Radeon™ RX Vega 11 Graphics". https://www.amd.com/en/products/apu/amd-ryzen-7-2800h.
104. ↑ Cutress, Ian (January 6, 2020). "AMD Ryzen 4000 Mobile APUs: 7nm, 8-core on both 15W and 45W, Coming Q1". AnandTech. https://www.anandtech.com/show/15324/amd-ryzen-4000-mobile-apus-7nm-8core-on-both-15w-and-45w-coming-q1.
105. ↑ Alcorn, Paul (January 7, 2020). "AMD Launches Threadripper 3990X and Ryzen 4000 'Renoir' APUs". Tom's Hardware. https://www.tomshardware.com/news/amd-launches-threadripper-3990x-and-ryzen-4000-renoir-apus.
106. ↑ Gartenberg, Chaim (January 6, 2020). "AMD's 7nm Ryzen 4000 CPUs are here to take on Intel's 10nm Ice Lake laptop chips". The Verge. https://www.theverge.com/2020/1/6/21054007/amd-7nm-ryzen-4000-cpu-ces-2020-intel-competition-laptop-processors-zen-2.
107. ↑ "AMD "Renoir" die Shot Pictured". March 16, 2020. https://www.techpowerup.com/264801/amd-renoir-die-shot-pictured.
108. ↑ 108.0 108.1 108.2 Shimpi, Anand Lal. "Previewing AMD's Brazos, Part 1: More Details on Zacate/Ontario and Fusion". http://www.anandtech.com/show/4003/previewing-amds-brazos-part-1-more-details-on-zacateontario-and-fusion/2.
109. ↑ "Archived copy". http://h10032.www1.hp.com/ctg/Manual/c04655538.
110. ↑ "HP ProDesk 405 G2 Microtower-PC". https://store.hp.com/GermanyStore/Merch/Product.aspx?id=J4B15EA&opt=ABD&sel=PBDT.
111. ↑ Cutress, Ian. "AMD's Carrizo-L APUs Unveiled: 12-25W Quad Core Puma+". http://www.anandtech.com/show/9246/amds-carrizo-l-apus-unveiled-12-25w-quad-core-puma.
112. ↑ "HP Pavilion Desktops - HP® Official Store". http://store.hp.com/us/en/pdp/hp-pavilion-desktop-570-a135m.
113. ↑ "Welcome to AMD - Processors - Graphics and Technology - AMD". https://www.amd.com/us/press-releases/Pages/apu-embedded-systems-2011jan19.aspx.
114. ↑ "Embedded Products - High Performance GPU - AMD". https://www.amd.com/en-us/products/embedded/processors/g-series.
115. ↑ Family Product Brief amd.com
116. ↑ "AMD G-Series GX-420GI - GE420GAAY43KA". Cpu-world.com. July 6, 2022. http://www.cpu-world.com/CPUs/Bulldozer/AMD-G-Series GX-420GI.html.
117. ↑ J Family Product Brief amd.com
118. ↑ 'nd Generation R Series Product Brief amd.com
119. ↑ Merlin Falcon Product Brief amd.com
120. ↑ "AMD Establishes Semi-Custom Business Unit to Create Tailored Products with Customer-Specific IP". http://www.xbitlabs.com/news/other/display/20130501231534_AMD_Establishes_Semi_Custom_Business_Unit_to_Create_Tailored_Products_with_Customer_Specific_IP.html.
121. ↑ "Three for three: How AMD won the war for the heart of next-gen consoles". June 15, 2013. http://www.polygon.com/2013/6/15/4431474/amd-xbox-one-ps4-wii-u-e3-1023.

## External links

* AMD Accelerated Processing Units official website
* Technical specification AMD products
* AMD products and technologies

* v
* t
* e

AMD processors

Lists|

* Microprocessors
* Microarchitectures
* Chipsets
* Sockets
* Duron
* Athlon
* XP
* Athlon 64
* X2
* Sempron
* Phenom
* Ryzen
* Turion
* Opteron
* FX
* APUs

Microarchitectures|

| IA-32 (32-bit)|

* K5
* K6
* Athlon/K7

|

x86-64 desktop|

* K8
* K9
* K10 (aka 10h)
* 15h
* Bulldozer
* Piledriver
* Steamroller
* Excavator
* Zen
* 1st gen.
* Zen+
* Zen 2
* Zen 3

x86-64 low-power|

* Bobcat (aka 14h)
* 16h
* Jaguar
* Puma

ARM64|

* K12 (aka 12h)

Current products|

| x86-64 (64-bit)|

* Athlon
* Ryzen
* Threadripper
* Epyc

|

Discontinued|

| Early x86 (16-bit)|

* Am286

|

IA-32 (32-bit)|

* Am386
* Am486
* Am5x86
* K5
* K6
* K6-2
* K6-III
* Athlon
* XP
* MP
* Duron
* Geode

x86-64 (64-bit)|

* Athlon 64
* X2
* II
* Sempron
* Turion
* Phenom
* II
* FX
* Opteron
* A-series APUs

Other|

* Am9080
* Am2900
* list
* Am29000
* Alchemy
* MIPS32

* v
* t
* e

AMD sockets and chipsets

AMD sockets

| Desktop sockets|

* Super Socket 7
* Slot A (1999)
* Socket A (2000)
* 754 (2003)
* 939 (2004)
* 940 (2003)
* AM2 (2006)
* AM2+ (2007)
* AM3 (2009)
* AM3+ (2011)
* FM1 (2011)
* FM2 (2012)
* FM2+ (2014)
* AM1 (2014)
* AM4 (2016)
* TR4 (2017)
* sTRX4 (2019)

|

Mobile sockets|

* Socket A
* 563
* 754
* S1 (2006)
* FT1 (2011)
* FP2 (2012)
* FS1
* FT3
* FP3 (2014)
* FP4 (2015)
* FP5 (2019)
* FP6 (2020)

Server sockets|

* Socket A
* 940
* F (2006)
* F+
* G3 (never)
* G34 (2010)
* C32 (2010)
* SP3 (2017)

Motherboard chipsets List of AMD chipsets

| ATI chipsets|

* IGP 300 series/RX380
* Radeon Xpress 200
* CrossFire Xpress 3200
* Radeon Xpress 1250

|

AMD chipsets|

* 480X/570X/580X
* 690 Series
* 7-Series
* 8-Series
* 9-Series
* Fusion Controller Hubs
* AM4 chipsets
* TR4 chipsets
* sTRX4 chipsets

* v
* t
* e

AMD graphics

Radeon-brand
List of GPUs (GPU features template) and List of APUs (APU features template)

| Fixed pipeline|

* Wonder
* Mach
* Rage
* All-in-Wonder (before 2000)

|

Vertex and fragment shaders|

* R100
* R200
* R300
* R400
* R500
* All-in-Wonder (after 1999)

Unified shaders|

| TeraScale|

* HD 2000
* HD 3000
* HD 4000
* HD 5000
* HD 6000

|

Unified shaders & memory|

| GCN|

* HD 7000
* HD 8000
* Rx 200
* Rx 300
* RX 400
* RX 500
* RX Vega
* 600

|

RDNA|

* RX 5000

Current technologies and software

| Audio/Video acceleration|

* Unified Video Decoder (UVD)
* Video Coding Engine (VCE)
* Video Core Next (VCN)
* TrueAudio

|

GPU technologies|

* Eyefinity
* FreeSync
* PowerTune
* CrossFire
* Hybrid Graphics
* HyperMemory
* HyperZ
* HSA

Software|

| Current|

* AMD Radeon Software
* HD3D
* AMDGPU
* CodeXL
* GPU PerfStudio
* GPUOpen
* TressFX
* HLSL2GLSL

|

Obsolete|

* AMD APP SDK
* Catalyst
* Close to Metal
* CodeAnalyst
* Mantle

Other brands and products

| Workstations & Supercomputers|

* Radeon Pro
* Radeon Instinct
* FireGL/FirePro
* FireMV
* FireStream

|

Consoles|

* Flipper (GameCube)
* Xenos (Xbox 360)
* Hollywood (Wii)
* Liverpool (PlayStation 4)
* Durango (Xbox One)
* Neo (PlayStation 4 Pro)
* Scorpio (Xbox One X)
* Atari VCS (2019)

0.00

(0 votes)

Original source: https://en.wikipedia.org/wiki/List of AMD processors with 3D graphics. Read more

|

Retrieved from "https://handwiki.org/wiki/index.php?title=Engineering:List_of_AMD_processors_with_3D_graphics&oldid=4212548"
*[v]: View this template
*[t]: Discuss this template
*[e]: Edit this template