Quite Universal Circuit Simulator

Qucs Logo

Screenshot of Qucs

Original author(s)| Michael Margraf, Stefan Jahn et al.
Initial release| 8 December 2003
(22 years ago) (2003-12-08)
Stable release|

0.0.19 / 22 January 2017
(9 years ago) (2017-01-22)

Preview release|

0.0.20-rc2 / 23 May 2019; 6 years ago (2019-05-23)[1]

Written in| C++
Operating system| Linux, macOS, Solaris, FreeBSD, Windows
Type| EDA
License| GPL-2.0-or-later
Website| qucs.sourceforge.net

Quite Universal Circuit Simulator (Qucs) is a free-software electronics circuit simulator software application released under GPL. It offers the ability to set up a circuit with a graphical user interface and simulate the large-signal, small-signal and noise behaviour of the circuit. Originally, Qucs was composed of a circuit simulator "qucs-core", now Qucsator, and a GUI for schematic entry and plotting. The usage patterns, as well as the emphasis on RF design, were inspired by some commercial tools of the time. Later, support for other simulators has been added to cover VHDL, Verilog and SPICE engines to some extent. At this stage both devices and circuits were specific to the targeted simulator or specific versions thereof.[2] In particular, neither was Qucsator based on SPICE, nor did a SPICE based simulator replace Qucsator at any given time. In the meantime, Qucs has been forked to accommodate specific needs, most notably Caneda and Qucs-S.

Today, Qucs ships a list of analog and digital components including sub-circuits for use with a variety of simulators. It is intended to be much simpler to use and handle than other circuit simulators like gEDA or PSPICE. The current roadmap aims to decouple schematic representation, device modelling and preferred simulator choices by means of adopting concepts from the IEEE1364 industry standard.

## Contents

* 1 Analysis types
* 2 Features
* 3 Tool suite
* 4 Components
* 5 Transistor models
* 6 Qucs-S
* 7 See also
* 8 References
* 9 External links

## Analysis types

Analysis types include S-parameter (including noise), AC (including noise), DC, transient analysis, harmonic balance (not yet finished), digital simulation (VHDL and Verilog-HDL) and parameter sweeps.

## Features

Qucs has a graphical interface for schematic capture. Simulation data can be represented in various types of diagrams, including Smith chart, cartesian, tabular, polar, Smith-polar combination, 3D cartesian, locus curve, timing diagram and truth table.

The documentation offers many tutorials, reports and a technical description of the simulator.

Other features include the transmission line calculator, filter synthesis, Smith chart tool for power and noise matching, attenuator design synthesis, device model and subcircuit library manager, optimizer for analog designs, the Verilog-A interface, support for multiple languages (GUI and internal help system), subcircuit (including parameters) hierarchy, data post-processing using equations and symbolically defined nonlinear and linear devices.

## Tool suite

Qucs consists of several standalone programs interacting with each other through a GUI.

The GUI is used to create schematics, setup simulations, display simulation results, writing VHDL code, etc.

The analog simulator, gnucsator, is a command line program which is run by the GUI in order to simulate the schematic which you previously setup. It reads a netlist file augmented with commands, performs simulations, and finally produces a dataset file. It can also report errors.

The GUI includes a text editor which can display netlists and simulation logging information. It is handy to edit files related to certain components (e.g. SPICE netlists, or Touchstone files).

A filter synthesis application can help design various types of filters.

The transmission line calculator can be used to design and analyze different types of transmission lines (e.g. microstrips, coaxial cables).

A component library manager gives access to models for real life devices (e.g. transistors, diodes, bridges, opamps). These are usually implemented as macros. The library can be extended by the user.

The attenuator synthesis application can be used to design various types of passive attenuators.

The command line conversion program tool is used by the GUI to import and export datasets, netlists and schematics from and to other CAD/EDA software. The supported file formats as well as usage information can be found on the manpage of qucsconv.

Additionally, the GUI can steer other EDA tools. Analog and mixed simulations can be performed by simulators that read the Qucsator netlist format. For purely digital simulations (via VHDL) the program FreeHDL[3] or Icarus-Verilog can be used. For circuit optimization (minimization of a cost function), ASCO[4] may be invoked.

## Components

The following categories of components are provided:

* Lumped components (resistors, inductors, capacitors, amplifier, phase shifters, etc.)
* Sources
* Probes
* Transmission lines
* Nonlinear components (diodes, transistors, etc.)
* Digital components
* File containers (S-parameter datasets, SPICE netlists)
* Paintings

There is also a component library that includes various standard components available in the market (bridges, diodes, varistors, LEDs, JFETs, MOSFETs and so on).

## Transistor models

Qucs supports transistor models, some need to be added by hand. Some have been tested, these include

* FBH-HBT
* HICUM L0 v1.12
* HICUM L0 v1.2
* HICUM L2 v2.1
* HICUM L2 v2.22
* HICUM L2 v2.23
* MESFET (Curtice, Statz, TOM-1 and TOM-2)
* SGP (SPICE Gummel-Poon)
* MOSFET
* JFET
* EPFL-EKV MOSFET v2.6.

## Qucs-S

Qucs-S[5] is a fork of Qucs that supports the SPICE-compatible simulator backends of Ngspice, Xyce, SpiceOpus, in addition to Qucsator. Version 2 was released in August 19, 2023.[6]

## See also

* Comparison of EDA software
* List of free electronics circuit simulators

## References

1. ↑ "Release qucs-0.0.20-rc2 · Qucs/Qucs". https://github.com/Qucs/qucs/releases/tag/qucs-0.0.20-rc2.
2. ↑ Brinson, Mike (2006). "A Tutorial: Transient Domain Flip-Flop Models for Mixed-Mode Simulation". https://qucs.sourceforge.net/docs/tutorial/ffmodels.pdf.
3. ↑ "FreeHDL index Page". Freehdl.seul.org. http://www.freehdl.seul.org/.
4. ↑ "ASCO project :: homepage". Asco.sourceforge.net. http://asco.sourceforge.net/.
5. ↑ https://ra3xdh.github.io/ Qucs with Spice
6. ↑ "Qucs-S 2.0.0". ra3xdh. https://github.com/ra3xdh/qucs_s/releases/tag/2.0.0.

## External links

* Official website
* FreeHDL home page
* Icarus Verilog home page
* Win32 Binaries for Qucs and freehdl

* v
* t
* e

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Proprietary|

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File formats|

* 3MF
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* ACIS
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Old|

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