Duolog

Duolog TechnologiesIndustry| EDA

|

Fate| Acquired
Founded| 1999
Headquarters| Dublin, Ireland

Key people

| Ray Bulger, CEO; David Murray, CTO; Norman Walsh, COO
Website| www.duolog.com

Duolog Technologies was an Irish-based company that developed electronic design automation tools that assist with the integration[1] of complex System-on-Chip (SoC), ASIC and FPGA designs. In 2014, Duolog was acquired[2] by ARM Holdings plc, a multinational semiconductor and software design company headquartered in Cambridge, United Kingdom.

## Overview

Duolog was founded in 1999[3] and headquartered in Dublin, Ireland. Duolog provided design services to semiconductor companies as well as developing Semiconductor Intellectual Property Cores (IP) for wireless technologies including IEEE 802.11 (Wi-Fi) and IEEE 802.15.4 Zigbee. Duolog also developed software tools to assist semiconductor design teams to integrate the various IP components that make up their systems. These tools were based on the IP-XACT industry standard. IP-XACT is an XML format that defines and describes electronic components and their associated designs. The IP-XACT standard was originally developed by the SPIRIT Consortium and later taken over by Accellera and the IEEE.

## References

1. ↑ "ESL provider launches register management tool | EE Times". http://www.eetimes.com/document.asp?doc_id=1304809.
2. ↑ "ARM Concludes its Acquisition of Duolog Technologies - ARM" (in en-US). https://www.arm.com/about/newsroom/arm-concludes-its-acquisition-of-duolog-technologies.php.
3. ↑ Ireland, Enterprise. "Enterprise Ireland Annual Report & Accounts 2005 - Duolog Technologies - Page 1 of 1" (in en). https://www.enterprise-ireland.com/annualreport2005/section4sub4_1.html.

## External links

* Official Duolog website

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Programmable logic

Concepts|

* ASIC
* SoC
* FPGA
* Logic block
* CPLD
* EPLD
* PLA
* PAL
* GAL
* PSoC
* Reconfigurable computing
* Xputer
* Soft microprocessor
* Circuit underutilization
* High-level synthesis
* Hardware acceleration

Languages|

* Verilog
* A
* AMS
* VHDL
* AMS
* VITAL
* SystemVerilog
* DPI
* SystemC
* AHDL
* Handel-C
* PSL
* UPF
* PALASM
* ABEL
* CUPL
* OpenVera
* C to HDL
* Flow to HDL
* MyHDL
* JHDL
* ELLA

Companies|

* Accellera
* Actel
* Achronix
* AMD
* Aldec
* Atmel
* Cadence
* Cypress
* Duolog
* Forte
* Intel
* Altera
* Lattice
* National
* Mentor Graphics
* Microsemi
* Signetics
* Synopsys
* Magma
* Virage Logic
* Texas Instruments
* Tabula
* Xilinx

Products|

| Hardware|

* iCE
* Stratix
* Virtex

|

Software|

* Intel Quartus Prime
* Xilinx ISE
* Xilinx Vivado
* ModelSim
* VTR
* Simulators

IP|

| Proprietary|

* ARC
* ARM Cortex-M
* LEON
* LatticeMico8
* MicroBlaze
* PicoBlaze
* Nios
* Nios II

|

Open-source|

* JOP
* LatticeMico32
* OpenCores
* OpenRISC
* 1200
* RISC-V
* Zet

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