Core Multiplexing Technology

Core Multiplexing Technology was a term that appeared in some Intel BIOSes, but was never confirmed or marketed. The last mentions of it were removed in BIOS revision 1304 on Intel's B975XBX motherboard in 2006.

## Details

A subset of traditional applications are often difficult to parallelize and make use of additional CPU hardware available on the platform, restraining applications to use only one CPU. Core Multiplexing Technology would allow for a process to be split into multiple threads at compilation time and execution time by the introduction of speculative multithreading.

Much in the same way a branch predictor allows for a processor to speculate on the outcome of a branch operation without actually performing the operation, speculative multithreading allows for the processor to speculate deeper, executing entire branches of code on an additional core. Most of the implementation is done in software, with the compiler rearranging code to take better use of a multithreaded platform, which allows Simultaneous multithreading (SMT) and multi-core systems (or a combination of the two) to take advantage of the technology. But, because the data dependencies of speculative multithreading, and the necessity to manage inter-thread dependent data, hardware implementation must be taken into consideration.

Core Multiplexing Technology was thought to leverage Intel's Advanced Smart Cache technology of the Core 2 chips, allowing two cores to share a single L2 cache. It also was thought to resize the cache between the two processors if one was idle by allowing the two cores to share data to manage inter-thread dependent data.

## See also

* 3Server
* Apulet
* BINAC

## External Resources

* Intel Research on Speculative Multithreading
* Coverage of Core Multiplexing Technology BIOS Option

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