IBM Rivina

Short description: Microprocessor built by IBM

POWER, PowerPC, and Power ISA architectures

NXP (formerly Freescale and Motorola)

* PowerPC e series (2006)
* e200
* e300
* e500
* e600
* e5500
* e6500

* Qor series (2008)
* QorIQ
* Qorivva

IBM

* POWER series (1990)
* POWER1
* POWER2
* POWER3
* POWER4
* POWER5
* POWER6
* POWER7
* POWER8
* POWER9
* POWER10

* PowerPC series (1992)
* 6xx
* 4xx
* 7xx
* 74xx
* 970
* A2 (2010)
* A2I
* A2O
* RAD series (1997)
* RAD6000
* RAD750
* RAD5500

* RS64 series (1996)

IBM/Nintendo

* Gekko
* Broadway
* Espresso

Other

* #808080">Titan
* PWRficient
* Cell
* Xenon
* X704

Related links

* OpenPOWER Foundation
* AIM alliance
* RISC
* Blue Gene
* Power.org
* PAPR
* PReP
* CHRP
* AltiVec

Cancelled in gray, historic in italic

* v
* t
* e

Rivina is an experimental 64-bit PowerPC microprocessor built by IBM in 2000. It was the successor to "guTS" (Gigahertz Unit Test Site) and the purpose of both was to build a processor able to reach very high frequencies. They were the first microprocessors to reach and surpass the 1 GHz mark.

Project work was conducted by fewer than twenty engineers over a course of two years. The idea was to use aggressive circuit design techniques, a carefully crafted floorplan and microarchitecture while keeping a short six stage pipeline. While guTS only supported a subset of about 100, mainly integer instructions, of the PowerPC instruction set, Rivina used the complete 64-bit PowerPC specification including dual precision floating point and address translation. guTS had a small single cycle 4 kB L1 cache, and Rivina used a two-cycle, two set associative 64 kB cache instead.

The processor comprised over 19 million transistors, manufactured using IBM's CMOS 7S, 0.22 μm copper fabrication process. It was able to reach 1.15 GHz, dissipating 112 watts at 101 °C.

## References

* Rivina 1.15GHz 64-bit PowerPC Processor
* Custom circuit design as a driver of microprocessor performance, IBM.com

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