Nintendo 64 technical specifications

Short description: Overview of the technical specifications of the Nintendo 64

This article describes the processor, memory, and other components of the 1996 Nintendo 64 home video game console.

## Contents

* 1 Components
* 2 Central processing unit
* 3 Reality coprocessor
* 4 Memory
* 5 Video
* 6 See also
* 7 References

## Components

The Nintendo 64 motherboard, showing CPU, RCP, and RDRAM

* CPU: 64-bit NEC VR4300 (MIPS R4300i) with 24 KB L1 cache, running at 93.75 MHz.
* Performance: 125 MIPS (million instructions per second), 93.75 MFLOPS (million floating-point operations per second).[1]
* GPU: 64-bit Reality Coprocessor, running at 62.5 MHz and over half a billion arithmetic operations per second, capable of dual-issuing scalar and vector operations under the right circumstances.[2] It is a microcode-reprogrammable T&L GPU,[3] composed of two integrated processors: the Reality Signal Processor (RSP) and the Reality Display Processor (RDP).[4]
* Video Interface (VI) reads data from the frame buffer using a fixed time interval, and sends it to the DA (digital-to-analog) converter (video DAC) to produce the video output.
* Audio Interface (AI) reads data from the audio buffer using a fixed time interval, and sends it to the 4 channel DA (digital-to-analog) converter (audio DAC) to produce the sound output.
* Parallel Interface (PI) handles configuration and data transfers between parallel devices via the cartridge and extension ports.
* Serial Interface (SI) handles communication between serial devices (game controllers and accessories) via the PIF (peripheral interface) chip.
* RDRAM Interface (RI) configures the dynamic memory modules.
* Microprocessor Interface (MI) handles interruptions and other hardware parameters.
* Hardware features: texture mapping with perspective correction,[5] anti-aliasing,[4] Z-buffering,[6] bilinear filtering,[7] trilinear filtering,[5] Gouraud shading, 8-bit alpha blending, level of detail management,[6] colour keying, YUV to RGB texture conversion.
* Peak fillrate (by RDP pipeline configuration, or mode):
* 31.25 megapixels/second (texturing, perspective correction, bilinear filtering, translucency, Z-buffering, mipmapping, fog; denoted two-cycle mode).
* 62.5 MP/s (texturing, perspective correction, bilinear filtering, translucency, Z-buffering; denoted one-cycle mode).
* 125–250 MP/s (fill mode, copy mode).[7]
* Audio: 16-bit, stereo, CD quality.[6]
* Number of ADPCM voices: 16–24 channels with pitch-shifting PCM, up to 100 PCM channels theoretically possible.[6]
* Sampling frequency: 44.1 kHz or 48 kHz, selectable.
* 4 (4.5) MB 250 MHz (500 MHz effective) RDRAM (Rambus DRAM)[8] on a shared 9-bit bus with 562.5 MB/s peak bandwidth, upgradable to 8 (9) MB with Expansion Pak. Differing memory countings are due to the 9th bit only being available to the RCP for tasks such as anti-aliasing or Z-buffering.
* ROM cartridge (Nintendo 64 Game Pak) bus usually running at 5.4 MB/s, theoretical maximum of 62.5 MB/s
* Resolution: 240p (320×240), 288p (384×288), 480i (640×480), 576i (720×576), widescreen via letterboxing or anamorphic compression.
* Color palette: 16,777,216 (24-bit color depth), 2,097,152 possible colors (21-bit color) on screen.[6]

## Central processing unit

CPU-NUS VR4300 central processing unit

The Nintendo 64's central processing unit (CPU) is the NEC VR4300,[9] a licensed variant of the 64-bit MIPS Technologies R4300i, itself a cost-reduced derivative of the MIPS R4200. Built by NEC on a 350 nm process, the VR4300 is a RISC 5-stage scalar in-order execution processor, internal 24 KB direct-mapped[10] L1 cache (16 KB for instructions, 8 KB for data). Although a floating-point unit exists as a logical coprocessor, it shares the integer arithmetic adder and shifter, meaning that floating-point instructions will stall the integer pipeline.[11] The 120-pin 1.7 million transistor CPU is manufactured at a process size of 350 nm and has a die area of 45 mm2. It dissipates close to 1.8 watts (figure given for a stock 100 MHz VR4300 part), and is cooled passively by an aluminum heatspreader that makes contact with a steel heat sink above.

With a clock rate of 93.75 MHz, the N64's VR4300 is generally considered to be the most powerful console CPU of the fifth generation of video game consoles.[12] Except for its narrower 32-bit system bus, the VR4300 retains the computational abilities of the 64-bit MIPS R4200,[9] though few titles take advantage of 64-bit data precision operations. N64 game titles generally use faster and more compact 32-bit data-operations,[13][self-published source] as these are sufficient to generate 3D scene data for the console's RSP (Reality Signal Processor) unit. In addition, 32-bit code executes faster and requires less storage space, which came at a premium with contemporary technology. The CPU is constrained by a 562.5 MB/s bus to the system RAM, and in order to access the RAM, the CPU must go through the Reality Coprocessor (RCP), and can not use DMA to do so as the RCP can. This issue is further compounded by the RDRAM's high access latency.

Programs emulating the Nintendo 64 benefit from the scarcity of 64-bit operations in the game's executable code, especially when running with a 32-bit machine architecture as a host. Most of these emulators perform the majority of calculations at 32-bit precision and trap the few subroutines that actually make use of 64-bit instructions.[13][self-published source]

## Reality coprocessor

RCP-NUS "Reality Coprocessor"

Nintendo 64's graphics and audio duties are performed by the 64-bit SGI coprocessor, named the Reality Coprocessor, or RCP. The RCP is a 62.5 MHz chip split internally into two major components, the Reality Display Processor (RDP) and the Reality Signal Processor (RSP). Each area communicates with the other by way of a 128-bit internal data bus that provides 1.0 GB/s of bandwidth. The RCP was developed by SGI's Nintendo Operations department, led by engineer Dr. Wei Yen (who later founded ArtX in 1997).[14] The RCP was manufactured by NEC, using its 350 nm 3LM CMOS process, which NEC had introduced in 1994. The processor contains 2.6 million transistors manufactured using this process. The 160-pin processor has a die size of 81 Template:Mm2, giving it a transistor density of over 32,000 per Template:Mm2.[15] Thermal dissipation is rated at 2.8 watts.

The RSP is a MIPS R4000-based 128-bit integer vector processor. It is able to address only its 4 kiB instruction and 4 kiB data local storages, and lacks the facility for system tasks such as interrupts. It is programmable through microcode, allowing the chip's functions to be significantly altered by each software title if necessary, to allow for different types of work, precision, and workloads. A number of microcodes were provided by Nintendo,[16][17] while a few companies, such as Rare and Factor 5, would later develop their own microcodes. The RSP performs transform, clipping, and lighting calculations, and triangle setup.

Instead of a discrete sound processor, the RSP frequently performs audio functions, although the CPU can be tasked with this as well. It can play back most types of audio (dependent on software codecs) including uncompressed PCM, MP3, MIDI, and tracker music. The RSP is theoretically capable of a maximum of 100 channels of PCM at a time, but only in a case where all system resources are devoted to audio. It has a maximum sampling rate of 48 kHz with 16-bit audio. In practice, however, storage limitations caused by the ROM cartridge format limit the audio size and thus quality.[18] Some game titles are designed for higher quality audio when storage expansions are available, as with F-Zero X Expansion Kit.[19][20]

The Reality Display Processor is a fixed-pipeline rasterizer and pixel drawing engine (including Z-buffering).[4] The RDP performs in-order rasterization and drawing or texturing of pixels in the framebuffer, with a separate memory frontend both directly accessing memory, and moving data to and from the local storage texture cache.

The system RAM is connected to the RCP via a 562.5 MB/s bus. The CPU accesses RAM through the RCP's memory map using the system address/data bus. The RCP has DMA controllers in many of its interfaces, and its internal bus arbiter handles priorities between them. The RCP, like the CPU, is passively cooled by an aluminum heatspreader that makes contact with a steel heat sink above.

## Memory

Rambus RDRAM18-NUS, early 2-chip variant

The final major component in the system is the random-access memory, or RAM. Following its design heritage in SGI supercomputing, the Nintendo 64 implemented a unified memory architecture (UMA), instead of having separate banks of memory for CPU, audio, and video, as seen on its competitors. The RAM itself consists of 4.5 megabytes of Rambus RDRAM, fabricated by NEC, of which only 4 MB are visible to the CPU; the rest is used exclusively by the RCP for tasks such as anti-aliasing and Z-buffering.[21] System RAM is expandable to a total of 8 MB with the Expansion Pak. The RAM has a 9-bit data bus at 250 MHz; as RDRAM transfers data at both the rising and falling edge of the signal (a technique also known as DDR), it provides the system with 562.5 MB/s peak bandwidth, shared between CPU and RCP.

Rambus technology was quite new at the time and offered Nintendo a way to provide a large amount of bandwidth at a relatively low cost. The narrow bus makes board design easier and cheaper than the higher width data buses required for high bandwidth out of slower-clocked RAM types (such as VRAM or EDO DRAM); this way, the N64 mainboard could be designed with only 2 layers. However, RDRAM, at the time, came with a very high access latency. The combination of high bandwidth and high latency meant that significant effort was required from developers to achieve optimal results.[18] Early N64 revisions use two 18 Mbit RAM chips; in ca. 1998 these were replaced with a single 36 Mbit chip, same as was used on the Expansion Pak.

The Nintendo 64 Game Pak solid state ROM cartridges were much faster than contemporary CD-ROM drives, a strength that allowed developers to stream data from them in real-time as if they were additional RAM, thus freeing the system's memory to handle other things.[22][clarification needed] This was a common practice for developers of many games, such as Nintendo EAD's Super Mario 64[23] or Factor 5's Indiana Jones and the Infernal Machine.[24]

## Video

The system allows for video output in two formats: composite video[25] and S-Video. This is accomplished through the proprietary "MULTI OUT" connector on the rear of the system, which was carried over from the SNES and later reused on the GameCube. Although the digital-to-analog converter chip used in early models had the capability to produce RGB video, it was not connected by default for this purpose, and later revisions lacked the pin connections for this purpose entirely.

The system came bundled with a composite cable (labeled Stereo A/V cable by Nintendo). Available separately (and included with the system in the UK)[citation needed] were a RF modulator and switch set (for connection to older televisions) and an official S-Video cable, although the latter was only sold at retail stores in Japan. In the U.S., the official S-Video cable could only be ordered direct from Nintendo of America, while in PAL territories, no S-Video cable was officially sold altogether. Furthermore, Nintendo omitted several components from the S-Video signal path in PAL consoles, meaning that using an unmodified NTSC S-Video cable will result in an overbright, garish image, or no image at all.

The system supports standard-definition resolutions up to 480i (576i for PAL units). Few games make use of this mode, and most of those which do also require use of the Expansion Pak RAM upgrade. Most games instead use the system's low-definition 240p (288p for PAL models) modes. A number of games also support widescreen display ratios using either anamorphic widescreen or letterboxing. Games with support for this include Banjo-Tooie, Donkey Kong 64, GoldenEye 007, 007: The World Is Not Enough, Jet Force Gemini, Perfect Dark, Starshot, Turok 2, Turok 3, Mission Impossible, Hybrid Heaven, and South Park.[citation needed]

## See also

* Nintendo 64 programming characteristics

## References

1. ↑ MIPS RISC Microprocessors, MIPS Technologies
2. ↑ https://ultra64.ca/files/documentation/silicon-graphics/SGI_Nintendo_64_RSP_Programmers_Guide.pdf, page 23
3. ↑ The Nintendo 64 is one of the greatest gaming devices of all time, Kinja
4. ↑ 4.0 4.1 4.2 "Is Ultra 64 as Good as Silicon Graphics Claims?". Next Generation (Imagine Media) (14): 6–11. February 1996.
5. ↑ 5.0 5.1 "Nintendo 64". Electronic Gaming Monthly (Ziff Davis) (86): 56–57. September 1996.
6. ↑ 6.0 6.1 6.2 6.3 6.4 Next Generation, issue 24 (December 1996), page 74
7. ↑ 7.0 7.1 RDP Programming, Nintendo 64 Programming Manual, Nintendo of America
8. ↑ "Ultra 64 Tech Specs". Next Generation (Imagine Media) (14): 40. February 1996.
9. ↑ 9.0 9.1 "Main specifications of VR4300TM-series". NEC. http://www.nec.co.jp/press/en/9711/1401-01.html.
10. ↑ "R4300i MICROPROCESSOR". mips. http://www.mips.com/media/files/archives/R4300i Product Information.pdf.
11. ↑ "User's Manual. VR4300™, VR4305™, VR4310™ 64-bit Microprocessor". NEC. 2000. pp. 47, 208, 637, 639. http://datasheets.chipdb.org/NEC/Vr-Series/Vr43xx/U10504EJ7V0UMJ1.pdf.
12. ↑ "Gaming consoles". http://www.ssagsg.org/LearningSpace/EntertainmentGaming/GamingConsoles.htm#5th_generation_gaming_consoles.
13. ↑ 13.0 13.1 "N64, God of all systems". Google Groups. July 26, 1997. http://groups.google.com/group/rec.games.video.nintendo/msg/01765b0b98de9908.
14. ↑ "It's Alive!". IGN. March 12, 1999. http://www.ign.com/articles/1999/03/13/its-alive-3.
15. ↑ "Reality Co-Processor − The Power In Nintendo64". Silicon Graphics. http://www.hotchips.org/wp-content/uploads/hc_archives/hc09/3_Tue/HC9.S10/HC9.10.2.pdf.
16. ↑ "Archived copy". https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro25/index25.1.html.
17. ↑ "Microcode". http://n64devkit.square7.ch/qa/graphics/ucode.htm.
18. ↑ 18.0 18.1 "Nintendo 64". http://www.videogameconsolelibrary.com/pg90-n64.htm.
19. ↑ "Summary history of F-Zero". IGN. http://guides.ign.com/guides/480123/page_12.html.
20. ↑ Schneider, Peer (25 August 2003). "Guides: F-Zero GX Guide (History)". IGN. http://guides.ign.com/guides/480123/page_12.html.
21. ↑ Nintendo 64 Architecture - a Practical Analysis, Rodrigo Copetti.
22. ↑ "Nintendo Reveals New Details on 64DD at N64 Developer's Conference". Nintendo of America. 1997. https://www.nintendo.com/newsroom/articles/64dd.html.
23. ↑ "Summary of Panel Discussion at Shoshinkai". Nintendo of America. https://www.nintendo.com/newsroom/features/show/panel.html.
24. ↑ "Bringing Indy to N64 (Infernal Machine)". IGN. 2000-11-09. http://ign64.ign.com/articles/087/087602p1.html.
25. ↑ "Nintendo Support: Nintendo 64 AV to TV Hookup". Nintendo. https://www.nintendo.com/consumer/systems/nintendo64/hook_avtotv.jsp.

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