Tick–tock model

Short description: Production model by Intel

Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick). It was replaced by the process–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. As a general engineering model, tick–tock is a model that refreshes one side of a binary system each release cycle.

## Contents

* 1 History
* 2 Roadmap
* 2.1 Pentium 4 / Core roadmap
* 2.2 Atom roadmap
* 2.3 Both
* 3 See also
* 4 References
* 5 External links

## History

Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture.[1] These occurred roughly every year to 18 months.[2] In 2014, Intel created a "tock refresh" of a tock in the form of a smaller update to the microarchitecture[3] not considered a new generation in and of itself.

In March 2016, Intel announced in a Form 10-K report that it deprecated the tick–tock cycle in favor of a three-step process–architecture–optimization model, under which three generations of processors are produced under a single manufacturing process, with the third generation out of three focusing on optimization.[4] The first optimization of the Skylake architecture was Kaby Lake. Intel then announced a second optimization, Coffee Lake,[5] making a total of four generations at 14 nm.[6]

## Roadmap

### Pentium 4 / Core roadmap

Pentium 4 / Core roadmap  Change
(step)  | Fabri­cation
process | Micro-
architecture | Code names
for step  | Intel
Generation
Desktop  | Intel
Generation
Xeon  | Intel Microcode
shortcut(s)
Desktop/WS[7][8] | Intel Microcode
shortcut(s)
Xeon/Server  | Release
date  | Processors

|
|
|
|
|
|
|
|
|

8P/4P Server  | 4P/2P Server/WS | Embedded Xeon  | 1P Xeon  | Enthusiast/WS | Desktop  | Mobile
Tick
(new fabrica-
tion process) | 65 nm  | P6, NetBurst | Yonah (P6),
Presler (NetBurst),
Cedar Mill (NetBurst)  | N/A  | 1995-11-1 (P6),
2000-11-20 (NetBurst)  | N/A  | N/A  | N/A  | Presler (NetBurst)  | Cedar Mill (NetBurst)  | Yonah (P6)
Tock
(new micro-
architecture) | Core | Merom[9] | 2006-07-27[10][11] | Tigerton  | Woodcrest
Clovertown  | Kentsfield | Conroe  | Merom
Tick  | 45 nm  | Penryn | 2007-11-11[12] | Dunnington  | Harpertown  | Yorkfield | Wolfdale | Penryn
Tock  | Nehalem | Nehalem | 1  | N/A  | NHM[13] | N/A  | 2008-11-17[14] | Beckton | Gainestown | Lynnfield  | Bloomfield | Lynnfield | Clarksfield
Tick  | 32 nm  | Westmere | 1  | WSM[13] | 2010-01-04[15][16] | Westmere-EX  | Westmere-EP | N/A  | Gulftown | Clarkdale | Arrandale
Tock  | Sandy Bridge | Sandy Bridge | 2  | 1  | SNB  | JKT (Jaketown)  | 2011-01-09[17] | (Skipped)[18] | Sandy Bridge-EP | Gladden  | Sandy Bridge  | Sandy Bridge-E  | Sandy Bridge | Sandy Bridge-M
Tick  | 22 nm[19] | Ivy Bridge  | 3  | 2  | IVB  | IVT (Ivytown)  | 2012-04-29  | Ivy Bridge-EX[20] | Ivy Bridge-EP[20] | Gladden  | Ivy Bridge  | Ivy Bridge-E[21] | Ivy Bridge  | Ivy Bridge-M
Tock  | Haswell | Haswell | 4  | 3  | HSW, CRW (Crystal Well)
with Iris Pro[22][23] | HSX  | 2013-06-02  | Haswell-EX  | Haswell-EP  | N/A  | Haswell-DT  | Haswell-E  | Haswell-DT[24] | Haswell-MB (notebooks)
Haswell-LP (ultrabooks)[24]
Refresh  | Haswell Refresh,
Devil's Canyon[25] | 4  | N/A  | HSW, CRW (Crystal Well)
with Iris Pro[22][23] | N/A  | 2014-05-11,
2014-06-02  | No server version released  | Devil's Canyon  | No mobile version
released
Tick (Process)  | 14 nm[19] | Broadwell[26] | 5  | 4  | BDW  | BDX  | 2014-09-05  | Broadwell-EX[27] | Broadwell-EP[27] | Broadwell-DE  | Broadwell-DT  | Broadwell-E  | Broadwell-DT  | Broadwell-H
Broadwell-U
Broadwell-Y
Tock (Architecture)  | Skylake[26] | Skylake[26] | 6  | 5  | SKL  | SKX  | 2015-08-05[28] | Skylake-SP  | Skylake-DE  | Skylake-DT/H  | Skylake-X  | Skylake | Skylake-H
Skylake-U
Skylake-Y
Optimization
(Refresh)
[4][29][30][31] | Kaby Lake[32] | 7  | 6  | KBL  | N/A  | 2017-01-03[33] | Only 1P server (Xeon E3) version released  | Kaby Lake-DT/H
cores: 4 (4/8)  | Kaby Lake-X[34] | Kaby Lake | Kaby Lake-H
Kaby Lake-U
Kaby Lake-Y
Kaby Lake R[35][36] | 8  | N/A  | KBL-R  | 2017-08-21[36] | Only mobile version released  | Kaby Lake R
Coffee Lake | 8, 9[37] | E-2xxx  | CFL  | 2017-10-05[38] | Cascade Lake-SP
Cooper Lake (Q2'20)  | Cascade Lake-AP | Coffee Lake-DT/H
cores: 6 (12)  | Skylake-X Refresh  | Coffee Lake-S
Coffee Lake-R | Coffee Lake-H
Coffee Lake-U
Coffee Lake-H Refresh
Whiskey Lake,
Amber Lake[39] | 8  | N/A  | WHL
AML  | 2018-08-28[39] | Only mobile version released  | Whiskey Lake-U
Amber Lake-Y
Comet Lake[40] | 10  | CML  | 2019-08-21[40] | No server version released  | Comet Lake-W | Comet Lake-S | Comet Lake-H
Comet Lake-U
Architecture  | Cypress Cove[41] | Rocket Lake[41] | 11  | RKL  | 2021-03-30[42] | N/A  | Rocket Lake-S  | N/A
Process  | 10 nm | Palm Cove  | Cannon Lake  | 8  | CNL  | 2018-05-16[43] | Only mobile version released  | Cannon Lake-U
Architecture  | Sunny Cove  | Ice Lake[44] | 10  | 3  | ICL  | 2019-08-01[45] | Ice Lake-SP (1H21)[46] | N/A  | Ice Lake-U
Ice Lake-Y
Optimization[31] | Willow Cove  | Tiger Lake[31] | 11  | N/A  | TGL  | 2020-09-02[47] | Only mobile version released  | Tiger Lake-H35
Tiger Lake-UP3
Tiger Lake-UP4
Architecture  | Intel 7 | Golden Cove | Alder Lake | 12  | ADL  | 2021-11-04  | No server / WS version released  | Alder Lake-S  | Alder Lake-HX
Alder Lake-H
Alder Lake-P
Alder Lake-U
Sapphire Rapids[48] | N/A  | 4  | N/A  | SPR  | 2023-01-10  | Sapphire Rapids-SP  | TBA  | Only server / WS version released
Optimization  | Raptor Cove  | Raptor Lake | 13  | N/A  | RPL  | N/A  | 2022-10-20  | No server / WS version released  | Raptor Lake-S  | Raptor Lake-HX
Raptor Lake-H
Raptor Lake-P
Raptor Lake-U
Emerald Rapids | N/A  | 5  | N/A  | EMR  | 2023  | Emerald Rapids-SP  | TBA  | Only server / WS version released
Tick  | Intel 4[49] | Redwood Cove  | Meteor Lake[50] | 14  | N/A  | MTL  | N/A  | 2023-12-14  | No server / WS version released  | TBA
Tick  | Intel 3 | Granite Rapids[51] | N/A  | 6  | N/A  | GNR  | 2024  | Granite Rapids-SP  | TBA  | Only server / WS version released
Tick  | Intel 20A  | Lion Cove  | Arrow Lake[52] | 15  | N/A  | ARL  | N/A  | 2024  | No server / WS version released  | TBA
Tick  | Intel 18A  | TBA  | Lunar Lake  | 16  | N/A  | LNL  | N/A  | 2025  | No server / WS version released  | TBA
Change
(step)  | Fabri­cation
process | Micro-
architecture | Code names
for step  | Intel
Generation
Desktop  | Intel
Generation
Xeon  | Intel Microcode
shortcut(s)
Desktop/WS[7][8] | Intel Microcode
shortcut(s)
Xeon/Server  | Release
date  | 8P/4P Server  | 4P/2P Server/WS | Embedded Xeon  | 1P Xeon  | Enthusiast/WS | Desktop  | Mobile
Processors

### Atom roadmap

With Silvermont Intel tried to start Tick-Tock in Atom architecture but problems with the 10 nm process did not allow to do this. In the table below instead of Tick-Tock steps Process-Architecture-Optimization are used. There is no official confirmation that Intel uses Process-Architecture-Optimization for Atom but it allows us to understand what changes happened in each generation.

Atom roadmap[53] Change  | Fabri­cation
process | Micro-
architecture
(Abbr.)[13] | Code names
for step  | Release
date  | Processors/SoCs

|
|
|
|
|

MID, Smartphone  | Tablet  | Netbook  | Nettop  | Embedded  | Server  | CE
Process / Architecture  | 45 nm  | Bonnell (BNL)  | Bonnell | 2008  | Silverthorne  | N/A  | Diamondville  | N/A  | N/A  | N/A
Optimization  | Bonnell | 2010  | Lincroft  | Pineview  | Tunnel Creek
Stellarton  | N/A  | Sodaville
Groveland
Process  | 32 nm  | Saltwell  | 2011  | Medfield (Penwell & Lexington) & Clover Trail+ (Cloverview)  | Clover Trail (Cloverview)  | Cedar Trail (Cedarview)  | N/A  | Centerton & Briarwood  | Berryville
Process / Architecture  | 22 nm  | Silvermont (SLM)  | Silvermont | 2013  | Merrifield (Tangier)[54] & Moorefield (Anniedale)[55] & Slayton  | Bay Trail-T
(Valleyview)  | Bay Trail-M
(Valleyview)  | Bay Trail-D
(Valleyview)  | Bay Trail-I
(Valleyview)  | Avoton
Rangeley  | Unknown
Process  | 14 nm[53] | Airmont  | 2014  | Binghamton & Riverton  | Cherry Trail-T (Cherryview)[56] | Braswell[57] | Denverton
Cancelled | Unknown
Architecture  | Goldmont[58]
(GLM)  | Goldmont | 2016  | Broxton  Cancelled | Broxton  Cancelled
Apollo Lake  | Apollo Lake  | Apollo Lake  | Unknown  | Denverton  | Unknown
Architecture  | Goldmont Plus
(GLM+, GLP)  | Goldmont Plus | 2017  | Unknown  | Gemini Lake  | Gemini Lake  | Gemini Lake  | Unknown  | Unknown  | Unknown
Optimization  | Goldmont Plus | 2019  | Unknown  | Gemini Lake Refresh  | Gemini Lake Refresh  | Gemini Lake Refresh  | Unknown  | Unknown  | Unknown
Process / Architecture  | 10 nm | Tremont | Tremont | 2020  | Unknown  | Jasper Lake  | Jasper Lake  | Jasper Lake  | Elkhart Lake  | Snow Ridge  | Unknown
Architecture  | Intel 7 | Gracemont | Gracemont | 2021  | Unknown  | Unknown  | Alder Lake & Raptor Lake (hybrid)  | Unknown  | Unknown
Process / Architecture  | Intel 4  | Crestmont  | Crestmont  | 2023  | Unknown  | Unknown  | Meteor Lake[59] (hybrid)  | Sierra Forest-AP  | Unknown

Note: There is further the Xeon Phi. It has up to now undergone four development steps with a current top model that got the code name Knights Landing (shortcut: KNL;[13] the predecessor code names all had the leading term Knights in their name) that is derived from the Silvermont architecture as used for the Intel Atom series but realized in a shrunk 14 nm (FinFET) technology.[60] In 2018, Intel announced that Knights Landing and all further Xeon Phi CPU models were discontinued.[61] However, Intel's Sierra Forest and subsequent Atom-based Xeon CPUs are likely a spiritual successor to Xeon Phi.

### Both

* v
* t
* e

Intel processors

Discontinued

BCD oriented (4-bit)|

* 4004 (1971)
* 4040 (1974)

pre-x86 (8-bit)|

* 8008 (1972)
* 8080 (1974)
* 8085 (1977)

Early x86 (16-bit)|

* 8086 (1978)
* 8088 (1979)
* 80186 (1982)
* 80188 (1982)
* 80286 (1982)

x87 (external FPUs)|

8/16-bit databus
8087 (1980)
16-bit databus
80187
80287
80387SX
32-bit databus
80387DX
80487

IA-32 (32-bit)|

* 80386
* SX
* 376
* EX
* 80486
* SX
* DX2
* DX4
* SL
* RapidCAD
* OverDrive
* A100/A110
* Celeron (1998)
* M
* D (2004)
* Pentium
* Original P5
* OverDrive
* Pro
* II
* II OverDrive
* III
* 4
* M
* Dual-Core
* some Core
* Solo
* Duo
* Tolapai

x86-64 (64-bit)|

* Celeron
* D
* Dual-Core
* Pentium
* 4
* D
* Extreme Edition
* Dual-Core
* some Core
* 2
* some i7

Other|

CISC
iAPX 432
Itanium
RISC
i860
i960
StrongARM
XScale

Current

IA-32 (32-bit)|

* Atom
* CE
* SoC
* Quark

x86-64 (64-bit)|

* Atom
* CE
* SoC
* Celeron
* Pentium
* Core
* i3
* i5
* i7
* i9
* M
* Xeon
* E3
* E5
* E7
* D
* Phi

Lists

* Celeron
* Pentium
* Pro
* II
* III
* 4
* D
* M
* Core
* Core
* 2
* i3
* i5
* i7
* i9
* M
* Atom
* Xeon
* Itanium

Related

* Tick–tock model
* Chipsets
* GPUs
* GMA
* HD and Iris Graphics
* PCHs
* SCHs
* ICHs
* PIIXs
* Stratix
* Codenames

Microarchitectures

x86|

| P5|

800 nm

600 nm
P54C
350 nm
P54CS
P55C
250 nm
Tillamook

|

P6, Pentium M,
Enhanced Pentium M|

500 nm

350 nm

Klamath
250 nm
Mendocino
Dixon
Tonga
Covington
Deschutes
Katmai
Drake
Tanner
180 nm
Coppermine
Coppermine T
Timna
Cascades
130 nm
Tualatin
Banias
90 nm
Dothan
Stealey
Tolapai
Canmore
65 nm
Yonah
Sossaman

NetBurst|

180 nm
Willamette
Foster
130 nm
Northwood
Gallatin
Prestonia
90 nm
Tejas and Jayhawk
Prescott
Smithfield
Nocona
Irwindale
Cranford
Potomac
Paxville
65 nm
Cedar Mill
Presler
Dempsey
Tulsa

Core|

65 nm
Merom-L
Merom
Conroe-L
Allendale
Conroe
Kentsfield
Woodcrest
Clovertown
Tigerton

45 nm
Penryn
Penryn-QC
Wolfdale
Yorkfield
Wolfdale-DP
Harpertown
Dunnington

Nehalem|

45 nm
Auburndale
Beckton (Nehalem-EX)
Bloomfield
Clarksfield
Gainestown (Nehalem-EP)
Havendale
Jasper Forest
Lynnfield

32 nm
Arrandale
Clarkdale
Gulftown (Westmere-EP)
Westmere-EX

Sandy Bridge|

32 nm
Sandy Bridge
Sandy Bridge-E
Gladden

22 nm
Ivy Bridge
Ivy Bridge-EP
Ivy Bridge-EX

Haswell|

22 nm
Haswell

14 nm
Broadwell

Skylake|

14 nm
Skylake
Kaby Lake (Amber Lake • Whiskey Lake)
Coffee Lake
Cascade Lake
Comet Lake

Palm Cove|

10 nm
Cannon Lake

Sunny Cove|

14 nm
Cooper Lake

10 nm
Ice Lake

Willow Cove|

14 nm
Rocket Lake

10 nm
Tiger Lake
Sapphire Rapids

Golden Cove|

7 nm
Alder Lake
Granite Rapids

Atom|

| Bonnell
Saltwell|

45 nm
Silverthorne
Diamondville
Pineview
Lincroft
Tunnel Creek
Stellarton
Sodaville
Groveland

32 nm
Cedarview
Penwell
Cloverview
Berryville
Centerton

|

Silvermont
Airmont|

22 nm
Valleyview
Tangier
Anniedale

14 nm
Cherryview

Goldmont|

14 nm
Goldmont
Goldmont Plus

Tremont|

10 nm
Tremont
Gracemont

## See also

* List of Intel CPU microarchitectures
* Transient execution CPU vulnerability

## References

1. ↑ "Intel Tick–Tock Model". Intel Corporation. http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html.
2. ↑ "Intel tick–tock model". Intel Corporation. http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html. "A yearly product cadence moves the industry forward in a predictable fashion that can be planned in advance."
3. ↑ "Intel Haswell Refresh Processors Codenamed Devil's Canyon - Launching in Mid 2014 With Unlocked Design and Improved TIM". Wccftech.com. 2014-03-20. http://wccftech.com/intel-haswell-refresh-processors-codenamed-devils-canyon-launching-mid-2014-unlocked-design-improved-tim/.
4. ↑ 4.0 4.1 "Intel's 'Tick–Tock' Seemingly Dead, Becomes 'Process–Architecture–Optimization'". http://www.anandtech.com/show/10183/intels-tick-tock-seemingly-dead-becomes-process-architecture-optimization.
5. ↑ "Intel Official News on Twitter". Twitter. https://twitter.com/intelnews/status/829773829471744000.
6. ↑ "Intel's 8th-gen 'Coffee Lake' chips reuse 14nm process as other Core CPUs ease into new tech". PC World. http://www.pcworld.com/article/3168827/components-processors/intels-8th-gen-coffee-lake-chips-reuse-14nm-process-as-other-core-cpus-ease-into-new-tech.html.
7. ↑ 7.0 7.1 Intel Releases Linux CPU Microcodes To fix Meltdown & Spectre Bugs by Lawrence Abrams on January 11, 2018
8. ↑ 8.0 8.1 Linux* Processor Microcode Data File Version 20180312 on 3/12/2018
9. ↑ Crothers, Brooke (2009-02-10). "Intel moves up rollout of new chips | Nanotech - The Circuits Blog". http://news.cnet.com/8301-13924_3-10160673-64.html.
10. ↑ "Intel CEO: Latest Platforms, Processors Form New Foundations For Digital Entertainment And Wireless Computing". Intel Corporation. http://www.intel.com/pressroom/archive/releases/20060105corp.htm.
11. ↑ "Intel Unveils World's Best Processor". Intel.com (Press release). Intel Corporation.
12. ↑ "Intel Unveils 16 Next-Generation Processors, Including First Notebook Chips Built on 45nm Technology". Intel.com (Press release). Intel Corporation. January 7, 2008.
13. ↑ 13.0 13.1 13.2 13.3 "X86 / Amd64 library". 25 October 2021. https://github.com/gz/rust-x86/blob/master/x86data/perfmon_data/mapfile.csv.
14. ↑ "Intel Launches Fastest Processor on the Planet". Intel.com (Press release). Intel Corporation. November 17, 2008.
15. ↑ Bohr, Mark (February 10, 2009). "Intel 32nm Technology". Intel Corporation. http://download.intel.com/pressroom/kits/32nm/westmere/Mark_Bohr_32nm.pdf.
16. ↑ "Revolutionizing How We Use Technology—Today and Beyond". Logic Technology Development, Intel Corporation. http://www.intel.com/technology/architecture-silicon/32nm/index.htm.
17. ↑ Crothers, Brooke (November 15, 2010). "Intel Sandy Bridge chip coming January 5". http://news.cnet.com/8301-13924_3-20022893-64.html.
18. ↑ Pop, Sebastian (April 9, 2012). "Intel Ivy Bridge CPU Range Complete by Next Year". http://news.softpedia.com/news/Intel-Ivy-Bridge-CPU-Range-Complete-by-Next-Year-263451.shtml.
19. ↑ 19.0 19.1 Bohr, Mark; Mistry, Kaizad (May 2011). "Intel's Revolutionary 22 nm Transistor Technology". Intel Corporation. http://download.intel.com/newsroom/kits/22nm/pdfs/22nm-Details_Presentation.pdf.
20. ↑ 20.0 20.1 Novakovic, Nebojsa (April 9, 2012). "Ivy Bridge EP and EX coming up in a year's time – the multi-socket platform heaven". VR Zone AP Pte. Ltd.. http://vr-zone.com/articles/ivy-bridge-ep-and-ex-coming-up-in-a-year-s-time--the-multi-socket-platform-heaven/15488.html.
21. ↑ Knight, Shawn (March 19, 2012). "Ivy Bridge-E Delayed Until Second Half of 2013". http://www.techspot.com/news/47849-ivy-bridge-e-delayed-until-second-half-of-2013.html.
22. ↑ 22.0 22.1 Products formerly Crystal Well at Intel web page
23. ↑ 23.0 23.1 What is Crystalwell? by Matt Egan on OCT 31, 2013 at macworld.com
24. ↑ 24.0 24.1 "Leaked specifications of Haswell GT1/GT2/GT3 IGP". 2012-05-20. http://technewspedia.com/leaked-specifications-of-haswell-gt1gt2gt3-igp.
25. ↑ "Intel Core i7-4790K: Devils Canyon mit bis zu 4,4 GHz, ohne verlöteten Deckel" (in de). June 3, 2014. http://www.golem.de/news/intel-core-i7-4790k-devils-canyon-mit-bis-zu-4-4-ghz-aber-ohne-verloeteten-deckel-1406-106846.html.
26. ↑ 26.0 26.1 26.2 Demerjian, Charlie (March 31, 2011). "After Intel's Haswell comes Broadwell". Stone Arch Networking Services, Inc.. http://semiaccurate.com/2011/03/31/after-intels-haswell-comes-broadwell-sk/.
27. ↑ 27.0 27.1 Shilov, Anton (August 21, 2015). "Intel to release 22-core Xeon E5 v4 'Broadwell-EP' late in 2015". http://www.kitguru.net/components/cpu/anton-shilov/intel-to-release-22-core-xeon-e5-v4-broadwell-ep-late-in-2015-company/.
28. ↑ Carey, Gabe (July 7, 2015). "The wait for Skylake is almost over, first desktop chips likely to hit August 5". http://www.digitaltrends.com/computing/unlocked-intel-skylake-s-processors-reportedly-coming-august-5th/.
29. ↑ "Intel 14nm Kaby Lake "Skylake Refresh" Platform Detailed – Launching in 2H 2016, 256 MB eDRAM H-Series and 91W K-Series Unveiled". July 2015. http://wccftech.com/intel-14nm-kaby-lake-haswell-refresh-platform-detailed-launching-2h-2016-256-mb-edram-hseries-91w-kseries-unveiled/. "The Kaby Lake platform will be similar to Skylake platform that launches this year and will act as a platform refresher"
30. ↑ "Intel Releasing 14nm Kaby Lake Processor in 2016 Ahead of 10nm Cannonlake". 2015-07-08. http://www.legitreviews.com/intel-releasing-14nm-kaby-lake-processor-in-2016-ahead-of-10nm-cannonlake_168841/. "We have long known that Intel was planning a 'Skylake Refresh' that has always been on the roadmap between Skylake and Cannonlake, but it appears that refresh might be going by the code name Kaby lake now."
31. ↑ 31.0 31.1 31.2 Mujtaba, Hassan (January 20, 2016). "Intel's Cannonlake CPUs To Be Succeeded By 10nm Ice Lake Family in 2018 and 10nm Tiger Lake Family in 2019". WCCFTech.com. http://wccftech.com/intel-10nm-cannonlake-ice-lake-tiger-lake-cpu/.
32. ↑ Bright, Peter (July 15, 2015). "Intel confirms tick–tock shattering Kaby Lake processor as Moore's Law falters". https://arstechnica.com/gadgets/2015/07/intel-confirms-tick-tock-shattering-kaby-lake-processor-as-moores-law-falters/. "the switch to 10nm manufacturing has been delayed until the second half of 2017."
33. ↑ Walton, Jarred (January 4, 2017). "Intel's Kaby Lake: Everything you need to know". http://www.pcgamer.com/intels-kaby-lake-everything-you-need-to-know/. "Today marks the official launch date of the desktop S-series 7th Generation Core processors..."
34. ↑ "Intel Core X-series Processors Product Specifications". Intel ARK (Product Specs). https://ark.intel.com/products/series/123588/Intel-Core-X-series-Processors.
35. ↑ Products formerly Kaby Lake R
36. ↑ 36.0 36.1 Ngo, Allen (August 21, 2017). "Intel Core i5-8250U, i5-8350U, i7-8550U, and i7-8650U Kaby Lake-R series launches today". https://www.notebookcheck.net/Intel-Core-i5-8250U-i5-8350U-i7-8550U-and-i7-8650U-Kaby-Lake-R-series-launches-today.241768.0.html. "Intel Core i5-8250U, i5-8350U, i7-8550U, and i7-8650U Kaby Lake-R launches today (Source: Intel)"
37. ↑ "Products formerly Coffee Lake". https://ark.intel.com/products/codename/97787/Coffee-Lake.
38. ↑ "Intel Unveils the 8th Gen Intel Core Processor Family for Desktop, Featuring Intel's Best Gaming Processor Ever | Intel Newsroom". Intel Newsroom. https://newsroom.intel.com/news-releases/intel-unveils-8th-gen-intel-core-processor-family-desktop/.
39. ↑ 39.0 39.1 "New 8th Gen Intel Core Processors Optimize Connectivity, Great Performance, Battery Life for Laptops | Intel Newsroom". Intel Newsroom. https://newsroom.intel.com/news/new-8th-gen-intel-core-processors-optimized-connectivity-great-performance-long-battery-life-laptops/.
40. ↑ 40.0 40.1 "Intel Expands 10th Gen Intel Core Mobile Processor Family, Offering Double Digit Performance Gains" (in en-US). https://newsroom.intel.com/news/intel-expands-10th-gen-intel-core-mobile-processor-family-offering-double-digit-performance-gains/.
41. ↑ 41.0 41.1 "Intel Previews 11th Gen Core Rocket Lake: Core i9-11900K and Z590, Coming Q1". 2021-01-11. https://www.anandtech.com/show/16390/intel-previews-11th-gen-core-rocket-lake-core-i911900k-and-z590-coming-q1.
42. ↑ "11th Gen Intel Core: Unmatched Overclocking, Game Performance" (in en-US). https://simplecore.intel.com/newsroom/news/11th-gen-intel-core-unmatched-performance/.
43. ↑ Tyson, Mark. "Intel Core i3-8121U 10nm processor hits ARK database". https://hexus.net/tech/news/cpu/118217-intel-core-i3-8121u-10nm-processor-hits-ark-database/.
44. ↑ Eassa, Ashraf (January 18, 2016). "What's the Name of Intel's Third 10-Nanometer Chip? This Fool has learned the code name of the follow-on to Intel's Icelake processor.". http://www.fool.com/investing/general/2016/01/18/what-is-the-name-of-intels-third-10-nanometer-chip.aspx.
45. ↑ "Intel Launches First 10th Gen Intel Core Processors: Redefining the Next Era of Laptop Experiences". https://newsroom.intel.com/news/intel-launches-first-10th-gen-intel-core-processors-redefining-next-era-laptop-experiences/.
46. ↑ "Intel Confirms 10nm Ice Lake Xeon Production Has Started". https://www.anandtech.com/show/16380/intel-confirms-10nm-ice-lake-xeon-production-has-started.
47. ↑ "Intel Launches World's Best Processor for Thin-and-Light Laptops: 11th Gen Intel Core". https://newsroom.intel.com/news-releases/11th-gen-tiger-lake-evo/.
48. ↑ "Intel Confirms 10nm Ice Lake Xeon Production Has Started". https://www.anandtech.com/show/16380/intel-confirms-10nm-ice-lake-xeon-production-has-started.
49. ↑ Tyson, Mark (2012-05-15). "Intel currently developing 14nm, aiming towards 5nm chips". http://hexus.net/tech/news/cpu/39381-intel-currently-developing-14nm-aiming-towards-5nm-chips/.
50. ↑ James, Dave (2021-03-23). "Meteor Lake, Intel's first 7nm CPU, to tape in before July this year and release in 2023" (in en-US). https://www.pcgamer.com/intel-meteor-lake-tape-/.
51. ↑ "Intel reveals the design of Alder Lake, Sapphire Rapids, Meteor Lake and Granite Rapids CPUs" (in en-US). https://videocardz.com/newz/intel-reveals-the-design-of-alder-lake-sapphire-rapids-meteor-lake-and-granite-rapids-cpus.
52. ↑ "Intel Client & Server CPU Roadmap Updates: Meteor Lake In 2023, 20A & 18A Powered Xeons & Core Chips Beyond 2024". 17 February 2022. https://wccftech.com/intel-client-server-cpu-roadmap-updates-meteor-lake-in-2023-20a-18a-powered-xeons-core-chips-beyond-2024/.
53. ↑ 53.0 53.1 Lal Shimpi, Anand (May 6, 2013). "Intel's Silvermont Architecture Revealed: Getting Serious About Mobile". http://www.anandtech.com/show/6936/intels-silvermont-architecture-revealed-getting-serious-about-mobile.
54. ↑ Hiroshige, Goto. "Intel Products for Tablets & SmartPhones". http://pc.watch.impress.co.jp/video/pcw/docs/569/575/p2.pdf.
55. ↑ "Import Data and Price of Anniedale". https://www.zauba.com/import-anniedale-hs-code.html.
56. ↑ Kazuaki Kasahara (November 30, 2012). "アウトオブオーダーと最新プロセスを採用する今後のAtom" (in ja). http://pc.watch.impress.co.jp/docs/column/ubiq/20121130_576105.html.
57. ↑ "Products (Formerly Braswell)". Intel Corporation. http://ark.intel.com/products/codename/66094/Braswell#@All.
58. ↑ Smith, Ryan; Cutress, Ian (29 April 2016). "Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Canceled". http://www.anandtech.com/show/10288/intel-broxton-sofia-smartphone-socs-cancelled.
59. ↑ James, Dave (2021-03-23). "Meteor Lake, Intel's first 7nm CPU, to tape in before July this year and release in 2023" (in en-US). https://www.pcgamer.com/intel-meteor-lake-tape-/.
60. ↑ Intel veröffentlicht Xeon Phi mit bis zu 7 Teraflops
61. ↑ "Product Change Notification 116378 - 00". https://qdms.intel.com/dm/i.aspx/9C54A9A7-BF37-4496-B268-BD2746EA54D3/PCN116378-00.pdf.

## External links

* "Intel Tick–Tock Model of Architecture & Silicon Cadence". Intel Corporation. http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html.
* Intel Tick–Tock Model at IDF 2009, Anandtech.com
* "Intel Tick–Tock Model at IDF 2011" (PDF). Intel Corporation. p. 21. http://download.intel.com/newsroom/kits/idf/2011_fall/pdfs/Kirk_Skaugen_DCSG_MegaBriefing.pdf#page=21.

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