Memory protection unit

A memory protection unit (MPU), is a computer hardware unit that provides memory protection. It is usually implemented as part of the central processing unit (CPU).[1] MPU is a trimmed down version of memory management unit (MMU) providing only memory protection support. It is usually implemented in low power processors that require only memory protection and do not need the full-fledged feature of a memory management unit like virtual memory management.[2][3]

## Overview

The MPU allows the privileged software to define memory regions and assign memory access permission and memory attributes to each of them. Depending on the implementation of the processor, the number of supported memory regions will vary. The MPU on ARMv8-M processors supports up to 16 regions. The memory attributes define the ordering and merging behaviors of these regions, as well as caching and buffering attributes. Cache attributes can be used by internal caches, if available, and can be exported for use by system caches.[4]

MPU monitors transactions, including instruction fetches and data accesses from the processor, which can trigger a fault exception when an access violation is detected. The main purpose of memory protection is to prevent a process from accessing memory that has not been allocated to it. This prevents a bug or malware within a process from affecting other processes, or the operating system itself.[4]

## See also

* Memory management unit
* Memory protection

## References

1. ↑ "ARM Technical Reference Manual - About the MPU". http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/Chdecfea.html.
2. ↑ "FreeRTOS MPU". https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html.
3. ↑ "KeyStone Architecture - Memory Protection Unit (MPU)". http://www.ti.com/lit/pdf/sprugw5.
4. ↑ 4.0 4.1 "ARM Memory Protection Unit". https://documentation-service.arm.com/static/5ef61f08dbdee951c1ccdd48?token=.

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Hazards|

* Data dependency
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Out-of-order|

* Tomasulo algorithm
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Speculative|

* Branch prediction
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Parallelism|

| Level|

* Bit
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* Core
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* Arithmetic logic unit (ALU)
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|

Logic|

* Combinational
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Registers|

* Processor register
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Control unit|

* Instruction unit
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Datapath|

* Multiplexer
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Circuitry|

* Integrated circuit
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Power
management|

* PMU
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resource protection|

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Memory management

* Memory management as a function of an operating system

Manual memory management|

* Static memory allocation
* C dynamic memory allocation
* new and delete (C++)

Virtual memory|

* Demand paging
* Page table
* Paging
* Virtual memory compression

Hardware|

* Memory management unit
* Translation lookaside buffer

Garbage collection|

* Boehm garbage collector
* Concurrent mark sweep collector
* Finalizer
* Garbage
* Garbage-first collector
* Mark-compact algorithm
* Reference counting
* Tracing garbage collection
* Strong reference
* Weak reference

Memory segmentation|

* Protected mode
* Real mode
* Virtual 8086 mode
* x86 memory segmentation

Memory safety|

* Buffer overflow
* Buffer over-read
* Dangling pointer
* Stack overflow

Issues|

* Fragmentation
* Memory leak
* Unreachable memory

Other|

* Automatic variable
* International Symposium on Memory Management
* Region-based memory management

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