Register memory architecture

In computer engineering, a register–memory architecture is an instruction set architecture that allows operations to be performed on (or from) memory, as well as registers.[1] If the architecture allows all operands to be in memory or in registers, or in combinations, it is called a "register plus memory" architecture.[1] In a register–memory approach one of the operands for ADD operation may be in memory, while the other is in a register. This differs from a load/store architecture (used by RISC designs such as MIPS) in which both operands for an ADD operation must be in registers before the ADD.[1]

Examples of register memory architecture are IBM System/360, its successors, and Intel x86.[1] Examples of register plus memory architecture are VAX and the Motorola 68000 series.[1]

## See also

* Load/store architecture
* Addressing mode

## References

1. ↑ 1.0 1.1 1.2 1.3 1.4 Michael J. Flynn (1995). Computer architecture: pipelined and parallel processor design. p. 9-12. ISBN 0867202041.

0.00

(0 votes)

|

Retrieved from "https://handwiki.org/wiki/index.php?title=Register_memory_architecture&oldid=108600"