Repeat instruction

Short description: Machine instruction executing another instruction repeatedly

Template:Machine code In computer instruction set architectures (ISA), a repeat instruction is a machine language instruction which repeatedly executes another instruction a fixed number of times, or until some condition is met.

Since it is an instruction that operates on other instructions like the execute instruction, it has been classified as a meta-instruction.[1]

## Computer models

The Univac 1103 (1953) includes a repeat instruction (op code mnemonic: RPjnw) which executes the following instruction a fixed number of times, possibly incrementing one or both of the address fields of that instruction.[2] This compensates for the architecture's lack of index registers.[3]

The GE-600/Honeywell 6000 series (1964) supports a single-instruction repeat (RPT), a double-instruction repeat (RPTD), and a linked-list repeat (RPL).[4][5]

The x86 ISA, starting with the 8086, includes a series of special-purpose repeat instructions (REP(∅/E/Z/NE/NZ)) which are called "repeat string opcode prefixes" and may only be applied to a small number of string instructions (INS, OUTS, MOVS, LODS, STOS, CMPS, SCAS). These instructions repeat an operation and decrement a counter until it is zero, or may also stop when a certain condition is met.[6]

The Texas Instruments TMS320 digital signal processor (1983) includes an instruction for repeating a single-cycle instruction or two single-cycle instruction in parallel (RPT) and an instruction for repeating a block of instructions (RPTC). These use special block-repeat counter registers (BRC0, BRC1).[7]

The Motorola 68010 has a single instruction repeat called "loop mode." It accelerates loops consisting of one of 33 loopable instructions (such as MOV) and a DBcc (Decrement/Branch on condition). Two instruction opcodes are prefetched and held internally while subsequent memory read/write cycles are only generated for the data operands.[8]

## Semantics

The instruction or instruction pair to be executed follows the repeat instruction. Fields in the instruction determine the loop termination condition.[5] In the case of the TMS320, a block of up to 64Kbytes can be repeated.[7]

## Notes

1. ↑ Rossman, George E. (December 1975). "A Course of Study in Computer Hardware Architecture". IEEE Computer 8 (12): 44–63. doi:10.1109/C-M.1975.218835. , p. 50
2. ↑ Reference Manual: Univac Scientific 1103A Computer. Remington Rand Univac. 1956. p. 30. http://www.bitsavers.org/pdf/univac/1103/Univac_Scientific_1103A_Reference_Manual_1956.pdf.
3. ↑ Conrad Weisert, "Simulating an Obsolete Computer in 1960", Part 1: The main processor [1]
4. ↑ GE-635 System Manual. General Electric Computer Department. July 1964. p. A-6. http://www.bitsavers.org/pdf/ge/GE-6xx/CPB-371A_GE-635_System_Man_Jul64.pdf.
5. ↑ 5.0 5.1 GE-625/635 Programming Reference Manual. General Electric Information Systems. July 1964. http://www.bitsavers.org/pdf/ge/GE-6xx/CPB1004F_GE635pgmRef_Jul69.pdf.
6. ↑ Intel Corporation, "Instruction Set Reference", Intel 64 and IA-32 Architectures Software Developer's Manual, Order Number 253667-060US, September 2016, 2B:4-550 full text
7. ↑ 7.0 7.1 Kuo, Sen-Maw (2003) (in en). Real-time Digital Signal Processing: Implementations, Applications, and Experiments with the TMS320C55X. 清华大学出版社有限公司. pp. 67–68. ISBN 978-7-302-07700-8. https://books.google.com/books?id=70scPIwK7cUC&q=block+repeat.
8. ↑ MC68010/MC68012 16-/32-Bit Virtual Memory Microprocessors. Motorola Semiconductor. May 1985. http://bitsavers.org/components/motorola/68000/68010_68012_Data_Sheet_May85.pdf.

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