Execution unit

Part of a CPU which performs the operations instructed by the program

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In computer engineering, an execution unit (E-unit or EU) is a part of a processing unit that performs the operations and calculations forwarded from the instruction unit.[1] It may have its own internal control sequence unit (not to be confused with a CPU's main control unit), some registers,[2] and other internal units such as an arithmetic logic unit,[3] address generation unit, floating-point unit, load–store unit, branch execution unit[4] or other smaller and more specific components, and can be tailored to support a certain datatype, such as integers or floating-points.[5]

It is common for modern processing units to have multiple parallel functional units within its execution units, which is referred to as superscalar design.[6] The simplest arrangement is to use a single bus manager unit to manage the memory interface and the others to perform calculations. Additionally, modern execution units are usually pipelined.

## References

[edit]

1. ^ "Execution Model Overview". Intel. Retrieved 2024-06-23.
2. ^ "AMD Instinct™ MI100 microarchitecture — ROCm Documentation". rocm.docs.amd.com. Retrieved 2024-06-23.
3. ^ "Intel® Iris® Xe GPU Architecture". Intel. Retrieved 2024-06-23.
4. ^ Kanter, David (November 13, 2012). "Intel's Haswell CPU Microarchitecture". Real World Tech.
5. ^ "Execution Unit" discussion from the University of Massachusetts Amherst, archived on the Wayback Machine
6. ^ Cohen, William (2016-03-14). "Superscalar Execution". Red Hat Developer. Retrieved 2024-06-23.

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Processor technologies

Models|

* Abstract machine
* Stored-program computer
* Finite-state machine
* with datapath
* Hierarchical
* Deterministic finite automaton
* Queue automaton
* Cellular automaton
* Quantum cellular automaton
* Turing machine
* Alternating Turing machine
* Universal
* Post–Turing
* Quantum
* Nondeterministic Turing machine
* Probabilistic Turing machine
* Hypercomputation
* Zeno machine
* Belt machine
* Stack machine
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load–store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* Orthogonal instruction set
* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* VISC architecture
* Quantum computing
* Comparison
* Addressing modes

|

Instruction
sets|

* Motorola 68000 series
* VAX
* PDP-11
* x86
* ARM
* Stanford MIPS
* MIPS
* MIPS-X
* Power
* POWER
* PowerPC
* Power ISA
* Clipper architecture
* SPARC
* SuperH
* DEC Alpha
* ETRAX CRIS
* M32R
* Unicore
* Itanium
* OpenRISC
* RISC-V
* MicroBlaze
* LMC
* System/3x0
* S/360
* S/370
* S/390
* z/Architecture
* Tilera ISA
* VISC architecture
* Epiphany architecture
* Others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

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Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Scoreboarding
* Tomasulo's algorithm
* Reservation station
* Re-order buffer
* Register renaming
* Wide-issue

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

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Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Simultaneous and heterogenous
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* Array processing (SIMT)
* Pipelined processing
* Associative processing
* SWAR
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Tile processor
* Coprocessor
* PAL
* ASIC
* FPGA
* FPOA
* CPLD
* Multi-chip module (MCM)
* System in a package (SiP)
* Package on a package (PoP)

| By application|

* Embedded system
* Microprocessor
* Microcontroller
* Mobile
* Ultra-low-voltage
* ASIP
* Soft microprocessor

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Cypress PSoC
* Network on a chip (NoC)

Hardware
accelerators|

* Coprocessor
* AI accelerator
* Graphics processing unit (GPU)
* Image processor
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor Processing Unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 4-bit
* 8-bit
* 12-bit
* 15-bit
* 16-bit
* 24-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* bit slicing
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* Scratchpad memory
* Data cache
* Instruction cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional
units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Branch predictor
* Branch target predictor
* Integrated memory controller (IMC)
* Memory management unit
* Instruction decoder

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Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Memory address register
* Program counter

Control unit|

* Hardwired control unit
* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum-addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model
* Pin grid array
* Chip carrier

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Basic computer components

Input devices|

| Pointing devices|

* Graphics tablet
* Game controller
* Light pen
* Mouse
* Optical
* Optical trackpad
* Pointing stick
* Touchpad
* Touchscreen
* Trackball

|

Other|

* Keyboard
* Image scanner
* Graphics card
* GPU
* Microphone
* Refreshable braille display
* Sound card
* Sound chip
* Webcam
* Softcam

Output devices|

* Monitor
* Screen
* Refreshable braille display
* Printer
* Plotter
* Speakers
* Sound card
* Graphics card

Removable
data storage|

* Disk pack
* Floppy disk
* Optical disc
* CD
* DVD
* Blu-ray
* Flash memory
* Memory card
* USB flash drive

Computer case|

* Central processing unit
* Microprocessor
* Motherboard
* Memory
* RAM
* BIOS
* Data storage
* HDD
* SSD (SATA / NVMe)
* SSHD
* Power supply
* SMPS
* MOSFET
* Power MOSFET
* VRM
* Network interface controller
* Fax modem
* Expansion card

Ports|

| Current|

* Ethernet
* USB
* Thunderbolt
* Analog audio jack
* DisplayPort
* HDMI

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Obsolete|

* FireWire (IEEE 1394)
* Parallel port
* Serial port
* Game port
* PS/2 port
* eSATA
* DVI
* VGA

Related|

* History of computing hardware
* History of computing hardware (1960s–present)
* List of pioneers in computer science

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