List of Intel chipsets

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Intel i945GC northbridge with Pentium Dual-Core microprocessor

This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series). The chipsets are listed in chronological order.

## Pre-chipset situation

[edit]

An earlier chipset support for Intel 8085 microprocessor can be found at MCS-85 family section.

Early IBM XT-compatible mainboards did not yet have a chipset, but relied instead on a collection of discrete TTL chips by Intel:[1]

* the 8284 clock generator
* the 8288 bus controller
* the 8254 programmable interval timer
* the 8255 parallel I/O interface
* the 8259 programmable interrupt controller
* the 8237 DMA controller

## Early chipsets

[edit]

To integrate the functions needed on a mainboard into a smaller number of ICs, Intel licensed the ZyMOS POACH chipset for its Intel 80286 and Intel 80386SX processors (the 82230/82231 High Integration AT-Compatible Chip Set). The 82230 covers this combination of chips: 82C284 clock, 82288 bus controller, and dual 8259A interrupt controllers among with other components. The 82231 covers this combination of chips: 8254 interrupt timer, 74LS612 memory mapper and dual 8237A DMA controller among with other components. Both set were available US$60 for 10 MHz version and US$90 for 12 MHz version in quantities of 100.[2] This chipset can be used with an 82335 High-integration Interface Device to provide support for the Intel 386SX.[3][4]

List of early Intel chipset includes:[5][6]

* 82077AA CHMOS Single-Chip Floppy Disk Controller for the 32-bit systems.[7][8]
* 82091AA EISA/ISA \- Advanced Integrated Peripheral (AIP), includes: floppy disk controller, 2× UARTs, parallel port, IDE controller, oscillator, etc.[9]
* 82310 MCA family chipset - announced in April 1988.[10] This chipset also supports the 80386SX based machines as well.[3] Which it does includes:[4][11]
* 82306 Local Channel Support Chip
* 82307 DMA Controller/Central Arbiter
* 82308 Micro Channel Bus Controller
* 82309 Address Bus Controller
* 82706 VGA Graphics Controller
* 82311 MCA - announced in November 1988.[12][13] Includes: 82303 and 82304 Local I/O Channel Support Chips, 82307 DMA Controller/Central Arbiter, 82308 Micro Channel Bus Controller, 82309 Address Bus Controller, 82706 VGA Graphics Controller, 82077 Floppy Disk Controller.[4][14]
* 82320 MCA \- announced in April 1989.[15] This chipset supports the i486 microprocessor. It was expected to be available in the later half of 1989.[16]
* 82340SX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.[17]
* 82340DX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.[17]
* 82350 EISA \- announced in September 1988.[18][14] This chipset supports the i486 microprocessor. It was expected to be available in the later half of 1989.[16]
* 82350DT EISA \- announced in April 1991.[19] This version supports Intel486 DX2 CPU.[20]
* 82360SL - announced in October 1990.[21] It was a chipset for the mobile 80386SL and 80486SL processors. It integrated DMA controller, an interrupt controller PIC, serial and parallel ports, I/O Control, NMI, Real Time Clock, Timers and power-management logic for the processor. This chipset contains 226,000 transistors using the one-micron CHMOS IV technology. It was available for US$45 in quantities of 1,000.[8]
* 82365SL - PC Card Interface Controller. This support PCMCIA 2.0 standard using the Exchangeable Card Architecture which supports both I/O and memory ExCA-compliant cards. It uses the Intel386SL power-management features. This was available for US$35 in samples of quantities of 1,000-unit.[22]
* 82380 - High Performance 32-Bit DMA Controller with Integrated System Support Peripherals. This chipset has 20-level programmable interrupt controller a superset of Intel's 82C59 PIC. It also has four (x4) 16-bit programmable internal timers which its superset Intel's 82C54 PIT. It also has built-in DRAM refresh controller as well. It is available for US$149 and US$299 for 16 MHz and 20 MHz respectively in quantities of 100.[23] The Intel M82380 met under MIL-STD-883 Rev. C standard. This military device was tested which includes temperature cycling between -55 and 125 °C, hermeticity and extended burn-in. This military version can have transfer rate of 32 Mbytes per seconds at 16 MHz. This military version were available in 132-lead CPGA and 164-lead CQPK. This military version were available for US$520 100-unit of quantities for the PGA version.[24]
* 82384 - Clock Generator. The available version for US$15 in quantities of 100.[25]
* 82385 - High Performance 32-Bit Cache Controller.[23] This chipset was introduced in February 1987. It was available for 20 MHz version.[26] There is 33 MHz version available for the 386DX processor.[27] Paired with 33 MHz 386 CPU and 64-Kbyte memory subsystem, it performed up to 7.8 MIPS.[28] There is 82385SX version for the 386SX microprocessor.[27]
* 82395DX - High Performance Smart Cache. This chipset contains internal 16-Kbye of SRAM and 1,000 cache tags. This controller supports up to 128-Kbytes of cache memory subsystem which it features four-way set associativity; a 16-byte line size; a four, double-word write buffer; and concurrent line-buffer caching. This also support write-buffer memory update protocol and maintains cache coherency during bus snooping. Paired with 33 MHz 386 CPU and the controller can perform up to 8.3 MIPS. This was available in 196-pin PQFP for US$90 and $109 for 25- and 33-MHZ version in quantites of 1000 respectively.[28] There is Intel 82395SX version which it contains 8-Kbyte of cache memory for the 80386SX microprocessor family which it performs as much as 7% better than the 82385SX version. It was available for US$44 in quantities of 1000 units housed by 132-pin PQFP. The Intel 82396SX version contains 16-Kbyte of cache memory which were available in second quarter of 1991.[29]

## 4xx chipsets

[edit]

### 80486 chipsets

[edit]

Chipset | Code Name | North Bridge  | sSpec Number | South Bridge | Release Date | Processors | FSB | SMP | Memory types | Max. memory | Max. cacheable | Parity/ECC | L2 Cache Type | PCI support

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420TX | Saturn | CDC (82424TX), DPU (82423TX)  | SZ839

SZ868

| SIO (System I/O) | November 1992 | 5 V 486 | Up to 33 MHz | No | FPM | 128 MB[a] |  | Parity | Async. | 1.0
420ZX | Saturn II | CDC (82424ZX), DPU (82423TX)  | SZ884 | March 1994 | 5 V/3.3 V 486 | 160 MB |  | 2.1
420EX | Aries | PSC (82425EX)  | SZ897 (PSC)

SZ898 (IB)

| IB (82426EX) | Up to 50 MHz | 128 MB | 128 MB (/w 32KB Tag Ram & 512KB L2 Cache[30] | 2.0

#### Other 80486 chipsets

[edit]

* 82495DX - Cache Controller. This support zero-wait-state with two-way set associative cache with several configurable parameters. This support MESI protocol and bus snooping. It is available for US$198.[31]
* 82490DX - 32-Kbyte Dual Port Intelligent Cache SRAM. Providing second level write-back cache with dual-ported buffers and registers. It is available for US$41.[31]

### Pentium chipsets

[edit]

While not an actual Intel chipset bug, the Mercury and Neptune chipsets could be found paired with RZ1000 and CMD640 IDE controllers with data corruption bugs. L2 caches are direct-mapped with SRAM tag RAM, write-back for 430FX, HX, VX, and TX.

Chipset | Code Name | Part Numbers  | sSpec Number | South Bridge | Release Date | Processors | FSB | SMP | Memory types | Max. memory | Max. cacheable | Parity/ECC | L2 Cache Type | PCI support | AGP support

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430LX | Mercury[32] | 82434LX (PCMC)
2x 82433LX (LBX)  | SZ914 (PCMC)

SZ942 (LBX)

| SIO (ISA)
PCEB/ESC (EISA) | March 1993 | P60/66 | 60/66 MHz | No | FPM | 192 MB | 192 MB | Parity | Async. | 2.0 | No
430NX | Neptune[33] | 82434NX (PCMC)
2x 82433NX (LBX)  | SZ919 (PCMC)

SZ899 (LBX)

| SIO (ISA)
SIO.A (DP ISA)
PCEB/ESC (EISA) | March 1994 | P75+ | 50/60/66 MHz | Yes | 512 MB | 512 MB
430FX | Triton[34][35] | 82437FX/JX (TSC)
2x 82438FX (TDP)  | SZ965 (A1)

SZ968 (A1)

SZ969

SZ973 (A1)

SZ975 (A1)

SZ998 (A2)

SZ999

| PIIX | January 1995 | No | FPM/EDO | 128 MB | 64 MB | Neither | Async. / Pburst
430MX | Mobile Triton | 82437MX  | SU036 (A1)

SU037 (A1)

SU069 (B0)

| MPIIX | October 1995
430HX | Triton II[35][36] | 82439HX/JHX (TXC)  | SU087 (A1)

SU102 (A2)

SU115

| PIIX3 | February 1996 | Yes | 512 MB | 64 MB
512 MB (w/ 11-bit tag RAM)[37] | Both | 2.1
430VX | Triton II[35][38] | 82437VX (TVX)
2x 82438VX (TDX)  | SU085 (A1)

SU116 (A2)

| 60/66 MHz | No | FPM/EDO/SDRAM | 128 MB | 64 MB | Neither
430TX[39] |  | 82439TX (MTXC)  | SL238 (A1)

SL28T (A2)

| PIIX4 | February 1997 | 256 MB

### Pentium Pro/II/III chipsets

[edit]

Chipset | Code Name | Part numbers  | sSpec Number | South Bridge | Release Date | Processors[b] | FSB | SMP | Memory | Parity/ECC | PCI support | AGP support

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Type | Max. | Bank
450KX | Mars | 82451KX, 82452KX, 82453KX, 82454KX  | SU022 (A2)

SU024 (A2)

SU025 (A1)

SU026 (A1)

SU027 (A2)

SU028 (A2)

SU029 (A1)

SU030 (A2)

SU039 (A1)

SU040 (A1)

SU041 (A2)

SU042 (A2)

SU043 (A1)

SU044 (A2)

SU061 (A3)

SU062 (A4)

SU064 (A4)

| SIO, SIO.A, PIIX (ISA)
PCEB/ESC (EISA) | November 1995 | Pentium Pro | 60/66 MHz | Yes | FPM | 1 GB |  | Both | 2.0 | No
450GX | Orion | 82451GX, 82452GX, 82453GX, 82454GX  | SU019 (A1)

SU055 (A1)

SU056 (A3)

SU057 (A3)

SU058 (A4)

SU059 (A4)

SU063 (A4)

SY050 (A4)

SY051 (A5)

SY052 (A6)

SY053 (A4)

SY054 (A6)

| SIO.A (ISA)
PCEB/ESC (EISA) | Yes (up to four) | 8 GB |
440FX | Natoma | 82441FX, 82442FX  | SU053 (A1)

SU054 (A1)

| PIIX3 (ISA)
PCEB/ESC (EISA) | May 1996 | Pentium Pro, Pentium II | Yes | FPM / EDO / BEDO | 1 GB | 4 | 2.1
440LX | Balboa | 82443LX  | SL2KK (A3)

SL2KN (A3)

| PIIX4 | August 1997 | Pentium II, Celeron | 66 MHz | FPM / EDO / SDRAM | 1 GB EDO / 512 MB SDRAM[42] | AGP 2×
440EX | — | 82443EX  | SL2SA (A0)

SL2SB

| PIIX4E | April 1998 | No | EDO / SDRAM | 256 MB | 2 | Neither
440BX | Seattle | 82443BX

82443BXE

| SL278 (C1)

SL2T5 (B1)

SL2VH (C1) SL85Y

| Pentium II/III, Celeron | 66/100 MHz | Yes | 512 MB (1 GB w/ Registered)[43] | 4 | Both | 2.1
440GX | Marlinspike | 82443GX  | SL2TF (A0)

SL2VJ (A0)

| June 1998 | Pentium II/III, Xeon | 66/100 MHz | SDRAM | 2 GB | 2.1
450NX | — | 82451NX, 82452NX, 82453NX, 82454NX  | SL2RU (B0)

SL2RV (B1)

SL2RW (B0)

SL2RX (B0)

SL2ZA (B1)

SL36R (C0)

| Yes (up to four) | FPM / EDO | 8 GB | 2.1 (64-bit optional) | No
440ZX-66 | 82443ZX  | SL37A | November 1998 | Celeron, Pentium II/III | 66 MHz | No | SDRAM | 512 MB | 2 | Neither | 2.1 | AGP 2×
440ZX  | SL33W | 66/100 MHz
440ZX-M | 82443ZX-M  | SL3VP | PIIX4M |  | Pentium III, Celeron | 256 MB
440MX | Banister | 82443MX  | SL37L (B0)

SL3N4 (B0)

| Same chip |  | Pentium II/III, Celeron | 512 MB | 2.2 | No

### Southbridge 4xx chipsets

[edit]

Main article: PCI IDE ISA Xcelerator

Chipset | Part Number  | sSpec Number | ATA support | USB support | CMOS/clock | ISA support | LPC support | Power management

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ESC | 82374EB/SB  | SZ867 | None | None |  | Yes |  |
PCEB | 82375EB/SB  |  |  |  |
SIO | 82378IB/ZB  | SZ905 | No | No | SMM
SIO.A | 82379AB  |
MPIIX | 82371MX  | SU034 (A1)

SU035 (A1)

SU067 (A2)

| PIO
PIIX | 82371FB  | SZ964 (A1)

SZ967 (A1)

SZ997 (A1)

| PIO/WDMA
PIIX3 | 82371SB  | SU052 (A1)

SU093 (B0)

| 1 Controller

2 Ports

PIIX4 | 82371AB  | SL23P

SL2 km (B0)

| PIO/UDMA 33 | Yes
PIIX4E | 82371EB

82371EBE

| SL2MY (A0)

SL2T3 (A0)

SL37M (A0)

SL37U (A0)

SL87F

PIIX4M | 82371MB  | SL3CG (A0)

SL3DD (A0)

## 8xx chipsets

[edit]

### Pentium II/III chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Processors | FSB | SMP | Memory types | Max. memory | Memory banks | Parity or ECC | PCI | Ext. AGP/speed | IGP

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810 | Whitney | 82810  | SL3P6

SL3P7 (A3)

SL35K

| ICH/ICH0 | April 1999 | Celeron, Pentium II/III | 66/100 MHz | No | EDO/PC100 SDRAM | 512 MB | 4 | Neither | v2.2/33 MHz | No | Yes
810E | 82810E  | SL3MD (A3) | ICH | September 1999 | 66/100/133 MHz | PC100/133 SDRAM
810E2 |  | ICH2 |
815 | Solano | 82815  | SL4DF (A2)

SL5YN

SL5NQ

| ICH | June 2000 | 6 | Yes/AGP 4×
815E | ICH2 | Yes (2)
815G | 82815G  |  | ICH/ICH0 | September 2001 | Celeron, Pentium III | No | No
815EG  |  | ICH2
815P | 82815EP  |  | ICH/ICH0 | March 2001 | Yes/AGP 4× | No
815EP  | SL5NR (B0) | ICH2 | November 2000 | Celeron, Pentium II/III
820 | Camino | 82820

82820DP

| SL353 (B1)

SL3FT (B1)

SL3NF (B1)

SL47D (B2)

SL47F (B2)

| ICH | November 1999 | Yes | PC800 RDRAM/PC100 SDRAM (with MTH adapter) | 1 GB | 2 | Both
820E | ICH2 | June 2000
840 | Carmel | 82840  | SL3QR | ICH | October 1999 | Pentium III, Xeon | Dual-Channel PC800 RDRAM/PC100 SDRAM (with MTH adapter) | 4 GB | 2×4 | v2.2/33 MHz + PCI-X/66 MHz

### Pentium III mobile chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Processors | FSB | SMP | Memory types | Max. memory | Memory banks | Parity or ECC | PCI | Ext. AGP/speed | IGP

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815EM  |  | 82815EM  | SL4MP  | ICH2-M  | October 2000  | Mobile Celeron, Mobile Pentium III  | 100 MHz  | No  | PC100 SDRAM  | 512 MB  | 2  | Neither  | v2.2/33 MHz  | Yes/AGP 4×  | Yes
830M | Almador | 82830M  | SL62D | ICH3-M | July 2001 | Celeron, Pentium III-M | 100/133 MHz | No | PC133 SDRAM | 1 GB | 2 | Neither | v2.2/33 MHz | Yes/AGP 4× | Yes
830MP | 82830MP  | SL5P7

SL62F

SL7A6

|  | No
830MG | 82830MG  | SL5P9

SL62E

|  | No | Yes

### Pentium 4 chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Socket | Processor brands | FSB | SMP | Memory types  | Memory Channels | Max. memory
[ GiB ] | Parity/ECC | Graphics | TDP

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860[44] | Colusa | 82860 (MCH)  | SL5HB | ICH2 | May 2001 | Socket 603 Socket 604 | Xeon | 400 MT/s
(100 MHz QDR) | Yes | PC800/600 RDRAM | 2 | 4 (w. 2 repeaters) | Yes/Yes | AGP 4× |
845 | Brookdale | 82845 (MCH)  | SL5V7 (A3)

SL5YQ

SL63W (B0)

| September 2001[45] | Socket 423

Socket 478

| Celeron, Pentium 4 | No | DDR 200/266
SDR 133  | 1 | 2 (DDR)
3 (SDR) |
850 | Tehama | 82850 (MCH)  | SL4NG (A2)

SL5HA (A3)

| November 2000 | PC800/600 RDRAM | 2 |
850E | Tehama-E | 82850E (MCH)  | SL64X (A3) | ICH2/ICH4 | May 2002  | Socket 478 | 400/533 MT/s | PC1066/800/600 RDRAM |
845E | Brookdale-E | 82845E (MCH)  | SL66N

SL69S

| ICH4 | Celeron, Celeron D, Pentium 4 | DDR 200/266 | 5.8 W
845G | Brookdale-G | 82845G (GMCH)  | SL66F (A1)

SL6PR (B1)

| DDR 200/266
SDR 133 | No/No | Intel Extreme Graphics
AGP 4× | 5.1 W (SDRAM),
5.7 W (DDR)[46]
845GV | Brookdale-GV | 82845GV (GMCH)  | SL6NR (A1)

SL6PU (B1)

SL8DA

| October 2002  | Socket 478
LGA 775 | DDR 200/266
SDR 133  | Intel Extreme Graphics
no AGP slot
845GL | Brookdale-GL | 82845GL (GMCH)  | SL66G (A1)

SL6PT (B1)

| May 2002 | Socket 478 | Celeron, Pentium 4 | 400 MT/s | DDR 200/266
SDR 133 | 5.1 W (SDRAM),
5.8 W (DDR)[46]
845GE | Brookdale-GE | 82845GE (GMCH)  | SL6PS | October 2002  | Socket 478
LGA 775 | Celeron, Celeron D, Pentium 4  | 400/533 MT/s | DDR 200/266/333  | Intel Extreme Graphics
AGP 4× | 6.3 W
845PE | Brookdale-PE | 82845PE (MCH)  | SL6H5

SL6Q3

| Socket 478 | AGP 4× | 5.6 W
848P | Breeds Hill | 82848P (MCH)  | SL77Y (A2)

SL7YG (A2)

| ICH5/ICH5R | August 2003 | Socket 478
LGA 775 | Pentium 4, Pentium 4 EE, Pentium D,
Celeron, Celeron D | 400/533/800 MT/s | DDR-400 | AGP 8× | 8.1 W
865P | Springdale-P | 82865P  | SL6UY | May 2003 | Pentium 4, Celeron D | 400/533 MT/s | DDR-333  | 2 | 4 | 10.3 W
865PE | Springdale-PE | 82865PE  | SL722 (A2)

SL7YE (A2)

| Pentium 4, Pentium 4 EE, Pentium D,
Pentium Extreme Edition, Celeron,
Celeron D | 400/533/800 MT/s | DDR-400 | AGP 8× | 11.3 W
865G | Springdale | 82865G (GMCH)  | SL99Y

SL743 (A2)

| Intel Extreme Graphics 2
AGP 8× | 12.9 W
865GV | Springdale-GV | 82865GV (GMCH)  | SL77X (A2)

SL7YF (A2)

| September 2003 | Intel Extreme Graphics 2
no AGP slot |
875P[47] | Canterwood | 82875P (MCH)  | SL744 (A2)

SL8DB

| ICH5/ICH5R/6300ESB | April 2003 | Socket 478
Socket 604
LGA 775 | Pentium 4, Pentium 4 EE, Pentium D,
Pentium Extreme Edition, Celeron,
Celeron D, Xeon | Yes/Yes | AGP 8× | 12.1 W
E7205[48] | Granite Bay | E7205 (MCH)  | SL65P (B0)

SL6TU

| ICH4 | November 2002 | Socket 478 | Pentium 4 | 400/533 MT/s | DDR-200/266 |
E7500[49] | Plumas | E7500 (MCH)  | SL64H

SL69U

| ICH3-S | February 2002 | Socket 604 | Xeon | 400 MT/s | Yes  | DDR-200 | 16 | PCI-X |
E7501[50] | Plumas 533  |  | December 2002 | Socket 604
Socket 479 | Xeon, Pentium M[51] | 400/533 MT/s  | DDR-200/266 |
E7505[52] | Placer | E7505 (MCH)  | SL65N

SL6TU

| ICH4 | November 2002 | Socket 604 | Xeon | AGP 8× |
E7221 [53][54] | Copper River | E7221 (MCH)  | SL7YQ | ICH6/ICH6R | September 2004 | LGA 775 | Pentium 4, Pentium 4 HT | 533/800 MT/s | No | DDR 333/400
DDR2 400/533 | 4 | Yes/Yes
unbuffered only | • Integrated graphics engine (SVGA)
• PCI Express ×8 (1.0a), or
• PCI-X (with PCIe bridge)
not specifically dedicated to graphics |
E7230 [53][55] | Mukilteo | E7230 (MCH)  | SL8kJ

SL8KK

| ICH7/ICH7R | July 2005 | LGA 775 | Pentium D,
Pentium 4, Pentium 4 HT, Pentium 4 EE,
Celeron D | 533/800/1066 MT/s | DDR2 400/533/667 | 8 | Yes/Yes
unbuffered only | • PCI Express ×8 (1.0a), or
• PCI-X (with PCIe bridge)
not specifically dedicated to graphics |

Summary:

* 845 (Brookdale)
* two distinct versions 845 MCH for SDR and 845 MCH for DDR[56][57]
* 875P (Canterwood)
* Similar to E7205, but adds support for 800 MHz bus, DDR at 400 MHz, Communication Streaming Architecture (CSA), Serial ATA (with RAID in certain configurations) and Performance Acceleration Technology (PAT), a mode purported to cut down memory latency.
* SMP capability exists only on Xeon-based (socket 604) motherboards using the 875P chipset. FSB is rated at 533 MHz on these motherboards.
* 865PE (Springdale)
* 875P without PAT, though it was possible to enable PAT in some early revisions. Also lacks ECC Memory support.
* Sub-versions:
* 865P - Similar to 865PE, but supports only 400/533 MHz bus and 333 MHz memory.
* 848P - Single memory channel version of 865PE.
* 865G (Springdale-G)
* 865PE with integrated graphics (Intel Extreme Graphics 2). PAT never supported in any revisions.
* Sub-versions:
* 865GV - 865G without external AGP slot.
* E7221 (Copper River)
* Designed for Pentium 4-based server.
* Supports only one physical processor.
* A basic SVGA controller is integrated for analog video.
* One PCI-X slot can be bridged to the PCI-e ×8 using the Intel 6702PXH 64-bit PCI Hub.
* E7230 (Mukilteo)
* Similar to the Intel 3000 MCH, but mainly designed for Pentium D-based server.
* Supports only one physical processor.
* DDR2-667 4-4-4 is not supported.[55]
* No integrated graphics.
* One PCI-X slot can be bridged to the PCI-e ×8 using Intel 6700PXH 64-bit PCI Hub/Intel 6702PXH 64-bit PCI Hub.

### Pentium 4-M/Pentium M/Celeron M mobile chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Processors | FSB | SMP | Memory types | Max. memory | Parity/ECC | PCI Type | Graphics | TDP

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845MZ | Brookdale-MZ | 82845 (MCH)  | SL64T | ICH3-M | March 2002 | Mobile Celeron, Pentium 4-M | 400 MT/s | No | DDR 200 | 1 GB | No/No | v2.2/33 MHz | AGP 4× |
845MP | Brookdale-M  | SL66J | DDR 200/266 |
852GM | Montara-GM | 82852GM (GMCH)  | SL6ZK

SL7VP

| ICH4-M | Q2, '04 | Pentium 4-M, Celeron, Celeron M | Integrated 32-bit 3D Core @ 133 MHz | 3.2 W
852GMV | 82852GMV (GMCH)  |  |
852PM | 82852PM (MCH)  | SL72J

SL7VP

|  | Pentium 4-M, Celeron, Celeron D | 400 MT/s

533 MT/s

| DDR 200/266/333 | 2 GB | AGP 1x/2×/4× | 5.7 W
852GME | 82852GME (GMCH)  | SL72K

SL8D7

| Q4, '03 | Integrated Extreme Graphics 2 graphics core
854[58] |  | 82854 (GMCH)  | SL794 | March 2005 | Celeron M ULV | 400 MT/s | DDR 266/333
855GM | Montara-GM | 82855GM (GMCH)  | SL6WW

SL7VL

| March 2003 | Pentium M, Celeron M | DDR 200/266 | 3.2 W
855GME | 82855GME (MCH)  | SL72L

SL7VN

| DDR 200/266/333 | 4.3 W
855PM | Odem | 82855PM (MCH)  | SL6TJ (A3)

SL752 (B1)

| AGP 2×/4× | 5.7 W

### Southbridge 8xx chipsets

[edit]

Main article: I/O Controller Hub

Chipset  | Part Number  | sSpec Number  | ATA | SATA | RAID Level  | USB | PCI

|
|
|
|
|
|
|

ICH | 82801AA  | SL38R

SL3MZ

SL47Z

| UDMA 66/33 | No | No | 1.1, 2 ports | Rev 2.2, 6 slots
ICH0 | 82801AB  | SL38P

SL3N2 (B1)

| UDMA 33 | Rev 2.2, 4 slots
ICH2-M | 82801BAM  | SL45H (B0)[59]

SL4HN (B1)[59]

SL4R6 (B2)[59]

| UDMA 100/66/33 | Rev 2.2, 2 slots
ICH2 | 82801BA  | SL45H (B0)[59]

SL5FC (B0)[59]

SL4HM (B1)[59]

SL4YG (B1’)[59]

SL59Z (B4)[59]

SL5WK (B5)[59]

SL7UU (B5)[60]

SL5PN (C0)[59]

| 1.1, 4 ports | Rev 2.2, 6 slots
ICH3-M | 82801CAM  | SL5LF (B0)

SL5YP

| 1.1, 2 ports | Rev 2.2, 2 slots
ICH3-S | 82801CA  | SL632

SL8AN (B2)

| 1.1, 6 ports | Rev 2.2, 6 slots
ICH4-M | 82801DBM  | SL6DN

SL7VK (B2)

| 2.0, 4 ports | Rev 2.2, 3 slots
ICH4 | 82801DB  | SL66K (A1)

SL6DM (B0)

SL8DE

| 2.0, 6 ports | Rev 2.2, 6 slots
ICH5-M | 82801EBM  |  | 2.0, 4 ports | Rev 2.3, 4 slots
ICH5 | 82801EB  | SL6TN (A2)

SL73Z (A3)

SL7YC

| SATA 1.5 Gbit/s, 2 ports | 2.0, 8 ports | Rev 2.3, 6 slots
ICH5R | 82801ER  | SL6ZD

SL73D (A3)

SL742 (A3)

| RAID 0, RAID 1
6300ESB | 6300ESB  | SL7XJ | 2.0, 4 ports | Rev 2.2 4 PCI slots,
Rev 1.0 2 PCI-X slots + 2 PCI-X devices

## 9xx chipsets and 3/4 Series chipsets

[edit]

### Pentium 4/Pentium D/Pentium XE chipsets

[edit]

All chipsets listed in the table below:

* Do not support SMP
* Support (-R and -DH) variants for South Bridges

Chipset  | Code Name  | Part numbers  | sSpec Number  | South Bridge  | Release Date  | Supported Processors  | FSB [MT/s]  | Memory  | Parity / ECC  | Graphics  | TDP [W]

|
|
|
|
|
|
|
|
|
|
|

types | max. [GB] | PCIe | integrated core
910GL | Grantsdale-GL | 82910GL (GMCH)  | SL7W4 (B1)

SL8AR (C2)

SL8BV (C2)

| ICH6/ICH6R | September 2004 | Pentium 4, Celeron, Celeron D | 533 | DDR 333/400 | 2 | No/No | — | GMA 900 | 16.3
915GL | 82915GL (GMCH)  | SL8CK (C2)

SL8CL

SL8DC (C2)

| March 2005 | Pentium 4, Celeron D | 533/800 | 4
915PL | Grantsdale-PL | 82915PL (MCH)  | SL8D6 (C2)

SL8DD (C2)

| 2 | ×16 | —
915P | Grantsdale | 82915P (MCH)  | SL7LY (B1)

SL8AS (C2)

SL8BW (C2)

| June 2004 | DDR 333/400,
DDR2 400/533 | 4

915G | Grantsdale-G | 82915G (GMCH)  | SL7LX (B1)

SL8AT (C2)

SL8BU (C2)

| GMA 900
915GV | Grantsdale-GV | 82915GV (GMCH)  | SL7W5 (B1)

SL8AU (C2)

SL8BT (C2)

| —
925X | Alderwood | 82925X (MCH)  | SL7LZ

SL7RC

| Pentium 4, Pentium 4 XE | 800 | DDR2 400/533 | 4[*] | Yes/Yes | ×16 | — | 12.3
925XE | Alderwood-XE | 82925XE (MCH)  | SL84Z | November 2004 | 800/1066 | 13.3
945PL | Lakeport-PL | 82945PL (MCH)  | SL8V4 (A2)

SL93C (A1)

| ICH7 | March 2006 | Pentium 4, Pentium D, Celeron D,
(Core 2)[1] | 533/800 | 2[*] | No/No | 15.2
945P | Lakeport | 82945P (MCH)  | SL8FV (A1)

SL8HT (A2)

| ICH7/ICH7R | May 2005 | Pentium 4, Pentium D, Celeron D,
(Core 2)[1] | 533/800/1066 | DDR2 400/533/667 | 4[*]
945G | Lakeport-G | 82945G (GMCH)  | SL8FU | GMA 950 | 22.2
955X | Lakeport-X | 82955X (MCH)  | SL8FW | April 2005 | Pentium 4, Pentium 4 XE, Pentium D, Pentium XE | 800/1066 | DDR2 533/667 | 8 | Yes/Yes | — | 13.5

[*] Remapping of PCIE/APIC memory ranges not supported,[61][62] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar).

[1] Some later revisions of motherboards based on 945P,945G and 945PL chipset usually supports some Core 2 processors (with later BIOSes). Core 2 Quad is not supported. Only Core 2 Duo, Pentium Dual-Core, and Core2 based Celerons.

Summary:

* 915P (Grantsdale)
* Supports Pentium 4 on an 800 MT/s bus. Uses DDR memory up to 400 MHz, or DDR2 at 533 MHz. Replaces AGP and CSA with PCI Express, and also supports "Matrix RAID", a RAID mode designed to allow the usage of RAID levels 0 and 1 simultaneously with two hard drives. (Normally RAID1+0 would have required four hard drives)
* Sub-versions:
* 915PL - Cut-down version of 915P with no support for DDR2 and only supporting 2 GB of memory.
* 915G (Grantsdale-G)
* 915P with an integrated GMA 900\. This core contains Pixel Shader version 2.0 only, it does not contain Vertex Shaders nor does it feature Transform & Lighting (T&L) capabilities and therefore is not Direct X 8.1 or 9.0 compliant.
* Sub-versions:
* 915GL - Same feature reductions as 915PL, but supports 4 GB of memory. No support for external graphics cards.
* 915GV - Same as 915G, but has no way of adding an external graphics card.
* 910GL - No support for external graphics cards or 800 MT/s bus.
* 925X (Alderwood)
* Higher end version of 915. Supports another PAT-like mode and ECC memory, and exclusively uses DDR-II RAM.
* Sub-versions:
* 925XE - Supports a 1066 MT/s bus.
* 945P (Lakeport)
* Update on 915P, with support for Serial ATA II, RAID mode 5, an improved memory controller with support for DDR-II at 667 MHz and additional PCI Express lanes. Support for DDR-I is dropped. Formal dual-core support was added to this chipset.
* Sub-versions:
* 945PL - No support for 1066 MT/s bus, only supports 2 GB of memory.
* 945G (Lakeport-G)
* A version of the 945P that has a GMA 950 integrated, supports a 1066 MT/s bus.
* Sub-versions:
* 945GC - Same feature reductions as 945PL but with an integrated GMA 950.
* 945GZ - Same as 945GC but only supports DDR2 memory at 400/533 MT/s. No support for external graphics cards (some boards, like Asus P5GZ-MX, support through ICH7 on PCIe ×16 @4 lanes mode).
* 955X (Lakeport)
* Update for 925X, with additional features of "Lakeport" (e.g., PAT features and ECC memory), and uses DDR2.

### Pentium M/Celeron M mobile chipsets

[edit]

Chipset | Code Name | Part numbers  | sSpec Number | South Bridge | Release Date | Supported Processors | FSB | Memory Types | Max. Memory | Parity/ECC | Graphics | TDP

|
|
|
|
|
|
|
|
|
|
|
|

910GML | Alviso-GM | 82910GML (GMCH)  | SL89H

SL8AE

SL8DX

SL8G5 (C2)

SL8G8 (C2)

| ICH6-M | January 2005 | Celeron M | 400 MT/s | DDR 333/400, DDR2 400 | 2 GB | No/No | Integrated GMA 900 | 6 W
915GMS | 82915GMS (GMCH)  | SL8B6

SL8B7

SL8G4 (C2)

SL8G9 (C2)

| Pentium M, Celeron M | DDR2 400 | 4.8 W
915GM | 82915GM (GMCH)  | SL87G

SL89G

SL8DY

SL8G2 (C2)

SL8G6 (C2)

| 400/533 MT/s | DDR 333, DDR2 400/533 | 6 W
915PM | Alviso | 82915PM (MCH)  | SL8B4

SL8B5

SL8BR

SL8CS

SL8G3 (C2)

SL8G7 (C2)

| PCI Express ×16 | 5.5 W

### Core/Core 2 mobile chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Processors supported (official) | FSB (MT/s) | Memory | Graphics | TDP [W]

|
|
|
|
|
|
|
|
|
|

types | max. [GB] | graphics core | 3D Render
940GML | Calistoga | 82940GML (GMCH)  | SL8Z5 | ICH7-M | January 2006 | Celeron M | 533 | DDR2 400/533 | 2 | Integrated GMA 950 | Max. 166 MHz | 7
943GML | 82943GML (GMCH)  |  | Celeron M, Core Solo, Pentium Dual-Core[c] | Max. 200 MHz |
945GSE | 82945GSE (GMCH)  | SLB2R | Q1'06 | Intel Atom | 533/667 | Max. 166 MHz | 6
945GMS | 82945GMS (GMCH)  | SL8TC | January 2006 | Core 2 Duo, Core Duo, Pentium Dual-Core, Core Solo, Celeron M | 7
945GM/E | 82945GM/E (GMCH)  | SL8Z2  | ICH7-M/ICH7-M DH | DDR2 400/533/667 | 4[d] | Max. 250 MHz | 7
945GT[63] | 82945GT (GMCH)  | SL8Z6  | Max. 400 MHz
945PM | 82945PM (MCH)  | SL8Z4 | PCI Express ×16

### Core 2 chipsets

[edit]

All Core 2 chipsets support the Pentium Dual-Core and Celeron processors based on the Core architecture. Support for all NetBurst based processors was officially dropped starting with the Bearlake chipset family.[64] However, some motherboards still support the older processors.[65]

Chipset  | Code Name  | Part numbers  | sSpec Number  | South Bridge  | Release Date  | Processors  | Lithography  | VT-d support[66] | FSB

(MT/)

| Memory  | Parity/ECC  | PCIe  | iGraphics

|
|
|
|
|
|
|
|
|
|
|
|
|

types | max.
945GC[67] | Lakeport-GC | 82945GC (MCH)  | SL9ZC (A2)

SLA9C (A2)

SLB86 (A2)

| ICH7/ICH7R/ICH7-DH[68] | May 2005[69] | Pentium 4, Pentium D, Celeron D, Core 2 Duo, Pentium Dual-Core, Atom | 130 nm | No | 533/800 (last rev.1066) | DDR2 400/533/667 | 2 GB (some boards supports 4 GB shrunk to 3.27 GB) [*] | No/No | 1x16 | GMA 950
945GZ | Lakeport-GZ | 82945GZ (GMCH)  | SL927 (A2) | ICH7 | June 2005 | Pentium 4, Pentium D, Celeron D, Core 2 Duo, Pentium Dual-Core | DDR2 400/533 | 4 GB (shrunk to 3.27 GB due to chipset limitation[70] | some motherboards have ×16 @×4 from ICH7[71]
946PL | Lakeport-PL | 82946PL (MCH)  | SL9NV

SL9QY

| ICH7/ICH7R | July 2006 | DDR2 533/667 | 4 GB | ×16 | —
946GZ | Lakeport-GZ | 82946GZ (GMCH)  | SL9NV

SL9R4

| GMA 3000
P965 | Broadwater(P) | 82P965 (MCH)  | SL9NU

SL9QX

| ICH8/ICH8R/ICH8-DH | June 2006 | Pentium Dual-Core, Core 2 Quad, Core 2 Duo | 533/800/1066 | DDR2 533/667/800 | 8 GB | ×16, ×4 | —
G965 | Broadwater(GC) | 82G965 (GMCH)  | SL9P2

SL9R5

| Pentium Dual-Core, Core 2 Duo | ×16 | GMA X3000
Q965 | Broadwater(G) | 82Q965 (GMCH)  | SL9NW

SL9QZ

| GMA 3000
Q963 | Broadwater(G) | 82Q963 (GMCH)  | SL9R2 | No
975X | Glenwood | 82975X (MCH)[72] | SL8YS | ICH7/ICH7R/ICH7-DH | November 2005 | Pentium 4, Pentium 4 EE, Pentium D, Pentium XE, (Celeron D, Core 2 Quad, Core 2 Duo, Pentium Dual-Core)2 | 533/800/10662 | DDR2 533/667/8003 | Yes/Yes | 1x161, 2×8 | —
P31 | Bearlake (P) | 82P31 (MCH)  | SLAHX

SLASK (B0)

| ICH7 | August 2007 | Pentium Dual-Core, Core 2 Duo, Core 2 Quad | 90 nm | 800/1066/1333
(P45 unofficial 1600) | DDR2 667/800 | 4 GB | No/No | 1×16 rev. 1.1
G31 | Bearlake (G) | 82G31 (GMCH)  | SLASJ (B0)

SLAJ3 (A2)

| GMA 3100
G33 | Bearlake (G+) | 82G33 (GMCH)  | SLA9Q (A2) | ICH9/ICH9R/ICH9-DH | June 2007 | DDR2 667/800
DDR3 800/1066 | 8 GB
4 GB
P35 | Bearlake (P+) | 82P35 (MCH)  | SLA9R (A2) | 8 GB | 1×16, 1x4 rev. 1.1 | —
G35 | Bearlake | 82G35 (GMCH)  | SLAJJ | August 2007 | DDR2 667/800 | 1×16 rev. 1.1 | GMA X3500
Q33 | Bearlake (QF) | 82Q33 (GMCH)  | SLAEW (A2) | ICH9/ICH9R | June 2007 | GMA 3100
Q35 | Bearlake (Q) | 82Q35 (GMCH)  | SLAEX | ICH9/ICH9R/ICH9-DO | Yes4
G41 | Eaglelake (G) | 82G41 (GMCH)  | SLB8D

SLGQ3

| ICH7 | September 2008 | Core 2 Duo, Core 2 Quad  | 65 nm | No | DDR2 667/800
DDR3 800/1066  | 4 GB
8 GB | GMA X4500
B43 | Eaglelake (B) | 82B43 (GMCH)  | SLGL7 (A3) | ICH10D | December 2008 | 16 GB | 1×16 rev. 2.0  | GMA 4500
P43 | Eaglelake (P) | 82P43 (MCH)  | SLB89 | ICH10/ICH10R | June 2008 | 8 GB
16 GB | —
P45 | Eaglelake (P+) | 82P45 (MCH)  | SLB7Z (A1)

SLB8C (A2)

| 1×16, 2×8 rev. 2.0
G43 | Eaglelake (G) | 82G43 (GMCH)  | SLB85 (A3)

SLGQ2 (A3)

| 1x16 rev. 2.0 | GMA X4500
G45 | Eaglelake (G+) | 82G45 (GMCH)  | SLB84  | GMA X4500HD
Q43 | Eaglelake (Q) | 82Q43 (GMCH)  | SLB88 (A3) | ICH10/ICH10R/ICH10D | August 2008  | GMA 4500
Q45 | Eaglelake (Q) | 82Q45 (GMCH)  | SLB8A | ICH10/ICH10R/ICH10-DO | Yes4
X38 | Bearlake (X) | 82X38 (MCH)  | SLALJ (A1) | ICH9/ICH9R/ICH9-DH | September 2007[73] | Core 2 Duo, Core 2 Quad, Core 2 Extreme  | 90 nm | DDR3 800/1066/1333
DDR2 667/800/1066 | No/DDR2 only | 2×16 rev. 2.0 | —
X48 | 82X48 (MCH)  | SLASF (A1) | March 2008 | 800/1066/1333/1600

[*] Remapping of PCIE/APIC memory ranges not supported,[61] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar). Operational configuration is 4 ranks - 2× 2 GB dual rank modules or 4× 1 GB single rank modules - depends on number of motherboard DDR2 slots.

Summary:

* 946PL (Lakeport)
* Update on 945PL, supports 4 GB of memory.
* 946GZ (Lakeport-G)
* A version of 946PL with GMA 3000 graphics core.
* P965 (Broadwater)
* Update on 945P, no native PATA support, improved memory controller with support for DDR2 memory up to 800 MHz and official Core 2 Duo support.
* G965 (BroadwaterG)
* A version of P965 that has a GMA X3000 integrated graphics core.
* Q965 (Broadwater)
* Expected G965 intended for Intel's vPro office computing brand, with GMA 3000 graphics instead of GMA X3000 graphics. Supports an ADD2 card to add a second display.
* Sub-versions:
* Q963 - Q965 without an external graphics interface or support for ADD2.
* 975X (Glenwood)
* Update of 955, with support for ATI Crossfire Dual Graphics systems and 65 nm processors, including Core 2 Duo.
* P35 (Bearlake)
* The P35 chipset provides updated support for the new Core 2 Duo E6550, E6750, E6800, and E6850. Processors with a number ending in "50" have a 1333 MT/s FSB. Support for all NetBurst based processors is dropped with this chipset.[64]
* G33 (BearlakeG)
* A version of P35 with a GMA 3100 integrated graphics core and uses an ICH9 South Bridge.
* Sub-versions:
* G35 - G33 with a GMA x3500 integrated graphics core and uses an ICH8 South Bridge, no DDR3 support.
* Q35 (BearlakeG)
* Expected G33 intended for Intel's vPro office computing brand, no DDR3 Support.
* Sub-versions:
* Q33 - Q35 without vPro support.
* P31 (BearlakeG)
* A version of P35 with an ICH7 South Bridge, supports only 4 GB of DDR2 memory and does not support DDR3 memory.
* Operational configuration is 4 ranks - 2× 2 GB dual rank modules or 4 × 1 GB single rank modules - depends on number of motherboard DDR2 slots. 4GBs modules are not supported.
* G31 (BearlakeG)
* A version of P31 with a GMA 3100 integrated graphics core. It supports a 1333 MT/s FSB with Core 2 Duo processors, but Core 2 Quad processors are only supported up to 1066 MT/s.[74]
* G41 (EaglelakeG)
* Update of G31 with a GMA X4500 integrated graphics core and DDR3 800/1066 support.
* P45 (Eaglelake)
* Update of P35, with PCIe 2.0 support, Hardware Virtualization, Extreme Memory Profile (XMP) and support for ATI Crossfire (x8+x8).
* Sub-versions:
* P43 - P45 without Crossfire support.
* G45 (EaglelakeG)
* A version of P45 that has a GMA X4500HD integrated graphics core and lacks Crossfire support.
* Sub-versions:
* G43 - Same feature reductions as P43, but with a GMA X4500 integrated graphics core.
* Q45 (EaglelakeQ)
* Expected G43 intended for Intel's vPro office computing brand. Also supports Hardware Virtualization Technology and Intel Trusted Platform Module 1.2 feature.
* Sub-versions:
* Q43 - Q45 without vPro support. Also lacks Intel Trusted Platform Module 1.2 support.
* B43 - Q43 with an ICH10D South Bridge.

[1] The 975X chipset supports only ×16 PCI Express (electrically) in the top slot when the slot below it is unpopulated. Otherwise it and the lower slot (both attached to the Memory Controller Hub) operate at ×8 electrically.

[2] Only later revisions of the 975X chipset boards support Core 2 processors. See MSI 975X Platinum (MS-7246) rev 1.0 (first release), and MSI 975X Platinum Powerup revision (MS-7246) rev 2.1 (released autumn 2006) as example. source: https://web.archive.org/web/20210515170458/http://ixbtlabs.com/articles2/mainboard/msi-975x-platinum-powerup-edition-i975x.html
Officially 975X supports a maximum of 1066 MT/s FSB. Unofficially, third-party motherboards (Asus, Gigabyte) support certain 1333FSB 45 nm Core2 processors, usually with later BIOS updates.
As for Celeron and Celeron D support, some boards and revisions support it, some not. (see upper example, MSI Powerup Edition has reintroduced back Celeron support, probably due to later released Core2-based Celerons, which were often more powerful than higher clocked Netburst Pentiums 4.

[3] The 975X chipset technical specification shows only DDR2-533/667 memory support. Actual implementations of 975X do support DDR2 800.

[4] VT-d is inherently supported on these chipsets, but may not be enabled by individual OEMs. Always read the motherboard manual and check for BIOS updates. X38/X48 VT-d support is limited to certain Intel, Supermicro, DFI (LanParty) and Tyan boards. VT-d is broken or non existent on some boards until the BIOS is updated. Note that VT-d is a chipset Memory Controller Hub technology, not a processor feature, but this is complicated by later processor generations (Core i3/i5/i7) moving the MCH from the motherboard to the processor package, making only certain I series CPUs support VT-d.

### Core 2 mobile chipsets

[edit]

Chipset | Code name | Part numbers  | sSpec Number | South bridge | Release date | Lithography | Processors supported (official) | FSB [MT/s] | Memory | Graphics | TDP [W]

|
|
|
|
|
|
|
|
|
|
|

types. | max. [GB] | graphics core | 3D Render
GL960 | Crestline | 82960GL (GMCH)  | SLA5V (C0) | ICH8-M | May 2007 | ?? nm | Celeron M, Pentium Dual-Core | 533 | DDR2 533/667 | 3/51 | Integrated GMA X3100 | Max. 400 MHz | 13.5
GM965 | 82965GM (GMCH)  | SLA9F (C0) | Core 2 Duo | 533/667/800 | 4/82 | Max. 500 MHz
PM965 | 82965PM (MCH)  | SLA5U (C0) | PCIe ×16 | 8
GL40 | Cantiga | 82GL40 (GMCH)  | SLB95 (B3)

SLGGM (A1)

| ICH9-M | July 2008[75] | 65 nm | Core 2 Duo, Celeron, Celeron M, Pentium Dual-Core | 667/800 | DDR2 667/800, DDR3 800/1066 | 4/82 | Integrated GMA X4500MHD | Max. 400 MHz | 12
GS40 | 82GS40 (GMCH)  | SLGT8 (B3) | Core 2 Duo, Celeron, Celeron M?, Pentium Dual-Core | 4
GS45 | 82GS45 (GMCH) (For CULV)  | SLB92 (B3) | Core 2 Solo, Core 2 Duo, Core 2 Extreme, Celeron M | 800/1066 | 8 | Max. 533 MHz | 7/8/123
GM45 | 82GM45 (GMCH)  | SLB94 (B3)

SLGGN (A1)

| Core 2 Duo, Core 2 Extreme, Celeron M | 667/800/1066 | 12
PM45 | 82PM45 (MCH)  | SLB97 (B3)

SLGGN (A1)

| Core 2 Duo, Core 2 Quad, Core 2 Extreme | PCIe ×16 | 7

* 1 Unofficially this chipset support 5 GB.
* 2 Officially only 4 GB is supported. Unofficially many laptops with this chipset support 8 GB.
* 3 Low power mode, HD playback mode and Full performance mode respectively.

### Southbridge 9xx and 3/4 Series chipsets

[edit]

Main article: I/O Controller Hub

{{{1}}}

Chipset | Part
Number  | sSpec Number | Parallel ATA | Serial ATA | AHCI Support  | RAID Levels | USB | TDP
[W]

|
|
|
|
|
|
|
|

3.0 Gbit/s | 1.5 Gbit/s | v2.0
ICH6-M | 82801FBM  | SL7W6 (B2)

SL89K (B2)

| UDMA 100/66/33 | — | 2 ports  | Yes | None  | 4 ports  | 3.8
ICH6 | 82801FB  | SL7AG (B1)

SL7Y5 (B2)

SL89L (B2)

SL8BZ (C0)

| 4 ports  | No | None  | 8 ports
ICH6R | 82801FR  | SL79N (B1)

SL7W7 (B2)

SL89J (B2)

SL8C2 (C0)

| Yes | 0, 1, Matrix  | 8 ports
ICH7-M | 82801GBM  | SL8YB (B0) | 2 ports | Yes  | None | 4 ports | 3.3
ICH7-M DH | 82801GHM  | SL8YR (B0) | 4 ports | —  | Yes | 0, 1, Matrix
ICH7 | 82801GB  | SL8FX (A1)

SLGSP

| No | None | 8 ports
ICH7DH | 82801GDH  | SL8UK (A1) | Yes | 0, 1, Matrix
ICH7R | 82801GR  | SL8FY (A1)

SL8KL (A1)

| Yes | 0, 1, 5, 10, Matrix
ICH8M | 82801HBM  | SLA5Q (B1)

SLB9A (B2)

SLJ4Y (B2)

| 3 ports  | Yes | None | 10 ports | 2.4
ICH8M-E | 82801HEM  | SLA5R (B1)

SLB9B (B2)

| Yes | 0, 1, Matrix
ICH8 | 82801HB  | SL9MN (B0) | No | 4 ports  | No | None | 3.7
ICH8R | 82801HR  | SL9MK (B0) | 6 ports  | Yes | 0, 1, 5, 10, Matrix
ICH8DH | 82801HH  | SL9ML (B0) | Yes
ICH8DO | 82801HO  | SL9MM (B0) | Yes
ICH9M | 82801IBM  | SLB8Q (A3) | 4 ports  | Yes | None | 8 ports | 2.5
ICH9M-E | 82801IEM  | SLB8P (A3) | Yes | 0, 1, Matrix
ICH9 | 82801IB  | SLA9M (A2) | No(Yes[76]) | None | 12 ports | 4.3
ICH9R | 82801IR  | SLA9N (A2)

SLAXE (A2)

| 6 ports  | Yes | 0, 1, 5, 10, Matrix
ICH9DH | 82801IH  | SLA9P (A2) | Yes
ICH9DO | 82801IO  | SLAFD (A2) | Yes
ICH10 | 82801JB  | SLB8R (A0) | Yes | None | 4.5
ICH10D | 82801JH  | SLG8T (B0) | Yes
ICH10R | 82801JR  | SLB8S (A0) | Yes | 0, 1, 5, 10, Matrix
ICH10DO | 82801JO  |  | Yes

## 5/6/7/8/9 Series chipsets

[edit]

The Nehalem microarchitecture moves the memory controller into the processor. For high-end Nehalem processors, the X58 IOH acts as a bridge from the QPI to PCI Express peripherals and DMI to the ICH10 southbridge. For mainstream and lower-end Nehalem processors, the integrated memory controller (IMC) is an entire northbridge (some even having GPUs), and the PCH (Platform Controller Hub) acts as a southbridge.

### LGA 1156

[edit]

Main article: Intel 5 Series

Chipsets supporting LGA 1156 CPUs (Lynnfield and Clarkdale).

Not listed below is the 3450 chipset (see Xeon chipsets) which is compatible with Nehalem mainstream and high-end processors but does not claim core iX-compatibility. With either a Core i5 or i3 processor, the 3400-series chipsets enable the ECC functionality of unbuffered ECC memory.[77] Otherwise these chipsets do not enable unbuffered ECC functionality.

Chipset  | Code
name  | sSpec
number  | Part
numbers  | Release
Date  | Bus
Interface  | Link
Speed  | PCI Express lanes  | PCI | SATA | USB | FDI
support | TDP

|
|
|
|
|
|
|
|
|
|
|
|

3 Gbit/s | v2.0
H55 | Ibex Peak | SLGZX(B3) | BD82H55 (PCH) | Jan 2010  | DMI 1.0  | 1 GB/s | 6 PCIe 2.0 at 2.5 GT/s  | Yes  | 6 ports | 12 ports | Yes | 5.2 W
P55 | SLH24 (B3),
SLGWV (B2) | BD82P55 (PCH) | Sep 2009  | 8 PCIe 2.0 at 2.5 GT/s  | 14 ports | No | 4.7 W
H57 | SLGZL(B3) | BD82H57 (PCH)  | Jan 2010  | Yes | 5.2 W
Q57 | SLGZW(B3) | BD82Q57 (PCH) | 5.1 W

### LGA 1155

[edit]

See also: Sandy Bridge chipsets (6 Series) and Ivy Bridge chipsets (7 Series)

Chipsets supporting LGA 1155 CPUs (Sandy Bridge and Ivy Bridge). The PCIe 2.0 lanes from the PCH ran at 5 GT/s in this series, unlike in the previous LGA 1156 chips.[78]

The Cougar Point Intel 6 series chipsets with stepping B2 were recalled due to a hardware bug that causes their 3 Gbit/s Serial ATA to degrade over time until they become unusable. Stepping B3 of the Intel 6 series chipsets will have the fix for this. The Z68 chipset which supports CPU overclocking and use of the integrated graphics does not have this hardware bug, however all other ones with B2 did.[79] The Z68 also added support for transparently caching hard disk data on to solid-state drives (up to 64 GB), a technology called Smart Response Technology.[80]

Chipset  | Code
name  | sSpec
number  | Part
numbers  | Release
date  | Bus
interface  | Link
speed  | PCI Express
lanes  | PCI | SATA | USB | FDI
support | TDP

|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s  | 3 Gbit/s  | v3.2 Gen 1x1  | v2.0
H611 | Cougar Point | SLH83(B2)
SLJ4B(B3) | BD82H61 (PCH) | February 20, 2011  | DMI 2.0  | 2 GB/s | 6 PCIe 2.0 | No | None | 4 ports  | None | 10 ports  | Yes  | 6.1 W
B651 | SLH98(B2)
SLJ4A(B3) | BD82B65 (PCH) | February 25, 2011  | 8 PCIe 2.0  | Yes  | 1 port  | 5 ports | 12 ports
Q651 | SLH99(B2)
SLJ4E(B3) | BD82Q65 (PCH) | Q2 2011  | 14 ports
P671 | SLH84(B2) (Recalled)
SLJ4C (B3) | BD82P67 (PCH)  | January 9, 2011  | No  | 2 ports  | 4 ports | No
H671 | SLH82(B2) (Recalled)
SLJ49 (B3) | BD82H67 (PCH)  | Yes
Q671 | SLH85(B2)
SLJ4D(B3) | BD82Q67 (PCH) | February 20, 2011 | Yes
Z681 | SLJ4F(B3) | BD82Z68 (PCH) | May 11, 2011 | No
B752 | Panther Point | SLJ85(C1) | BD82B75 (PCH)  | May 13, 2012  | Yes  | 1 port  | 5 ports  | 4 ports | 8 ports  | 6.7 W
Q752 | SLJ84(C1) | BD82Q75 (PCH)  | 10 ports
Z752 | SLJ87(C1) | BD82Z75 (PCH)  | April 8, 2012  | No  | 2 ports  | 4 ports
H772 | SLJ88(C1) | BD82H77 (PCH)
Q772 | SLJ83(C1) | BD82Q77 (PCH) | May 13, 2012 | Yes
Z772 | SLJC7(C1) | BD82Z77 (PCH) | April 8, 2012 | No

* 1 For Sandy Bridge mainstream desktop and business platforms. Sandy Bridge CPUs provide 16 PCIe 2.0 lanes for direct GPU connectivity.
* 2 For Ivy Bridge mainstream desktop platform. Ivy Bridge CPUs provide 16 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.[81]

### LGA 1150

[edit]

See also: Haswell / Broadwell chipsets (8/9 Series)

Chipsets that support LGA 1150 CPUs are listed below. Haswell and Haswell Refresh CPUs are supported by all listed chipsets; however, a BIOS update is usually required for 8-Series Lynx Point motherboards to support Haswell Refresh CPUs.[82] Broadwell CPUs are supported only by 9-Series chipsets, which are usually referred to as Wildcat Point.[83]

The C1 stepping of the Lynx Point chipset contains a bug - a system could lose connectivity with USB devices plugged into USB 3.0 ports provided by the chipset if the system enters the S3 sleep mode.[84]

Chipset  | Code

name

| sSpec

number

| Part

numbers

| Release

date

| Bus

interface

| Link

speed

| PCI Express

lanes

| VT-d

support

| PCI | SATA | USB | FDI

support

| TDP | PCIe M.2

support

|
|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | 3 Gbit/s | v3.2 Gen 1x1 | v2.0
H81 | Lynx Point | SR13B(C1)
SR177(C2) | DH82H81 (PCH)  | June 2013  | DMI 2.0  | 2 GB/s | 6 PCIe 2.0  | No  | No | 2 ports  | 2 ports | 2 ports  | 8 ports  | Yes  | 4.1 W  | No
B85 | SR13C(C1)
SR178(C2) | DH82B85 (PCH)  | 8 PCIe 2.0  | 4 ports | 4 ports
Q85 | SR138(C1)
SR174(C2) | DH82Q85 (PCH)  | 6 ports
Q87 | SR137(C1)
SR173(C2)
SR19E(C2) | DH82Q87 (PCH) | Yes  | 6 ports  | None
H87 | SR139(C1)
SR175(C2) | DH82H87 (PCH)  | No
Z87 | SR13A(C1)
SR176(C2) | DH82Z87 (PCH)
Z97 | Wildcat Point | SR1JJ(A0) | DH82Z97 (PCH)  | May 2014  | Yes
H97 | SR1JK(A0) | DH82H97 (PCH)

### LGA 1366, LGA 2011, and LGA 2011-v3

[edit]

Single socket chipsets supporting LGA 1366, LGA 2011, and LGA 2011-v3 CPUs. Please consult List of Intel Xeon chipsets for further, multi-socket, chipsets for these sockets.

Chipset  | Code name  | sSpec Number  | Part

numbers

| Release date  | Socket  | Bus

interface

| Link

speed[e]

| PCI Express lanes  | VT-d

support

| PCI | SATA | USB | FDI

support

| TDP

|
|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | 3 Gbit/s | v3.2 Gen 1x1 | v2.0
X58 (I/O hub)1 | Tylersburg | SLGBT (B2),
SLGMX (B3),
SLH3M (C2) | AC82X58 (IOH) | November 2008 | LGA 1366 | QPI | Up to 25.6 GB/s | 36 PCIe 2.0 at 5 GT/s (IOH);
6 PCIe 1.1 (ICH) | Yes | Yes | None | 6 ports  | None | 12 ports | No | 28.6 W2
X793 | Patsburg | SLJHW (C0),[85]
SLJN7 (C1)[86] | BD82X79 (PCH)[87] | November 14, 2011 | LGA 2011 | DMI 2.0 | 32 GB/s | 40 PCIe 3.0 | 2 ports | 4 ports | 14 ports | 7.8 W
X994 | Wellsburg | SLKDE (B1),
SLKM9 (B1) | DH82031PCH (PCH) | August 29, 2014 | LGA 2011-v3 | No | 10 ports | None | 6 ports | 8 ports | 6.5 W

* 1 X58 South Bridge is ICH10/ICH10R.
* 2 X58 TDP includes the X58 IOH TDP in addition to the ICH10/ICH10R TDP.
* 3 For Sandy Bridge enthusiast desktop platform. Sandy Bridge CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes. NOTE : This reference number 4 is on X79, which is a Sandy bridge -E, not Sandy Bridge, and PCIe 3.0 only is enabled when an Ivy Bridge-E CPU or Xeon E-5 series is used.
* 4 For Haswell enthusiast desktop platform. Haswell CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.

### LGA 2066

[edit]

Chipsets supporting LGA 2066 socket for Skylake-X processors and Kaby Lake-X processors.

The C621 Chipset also supports LGA 3647 socket for Skylake-SP as well as Cascade Lake-W and Cascade Lake-SP processors.

Chipset  | Code

name

| sSpec

number

| Part numbers  | Release Date  | Bus

interface

| Link

speed[e]

| PCI Express lanes  | SATA | SATAe | PCIe

M.2

| QAT | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | v3.0 | v2.0
X299 | Basin Falls | SR2Z2(A0) | GL82X299 | May 30, 2017 | DMI 3.0 |

32 GB/s

| 16 PCIe 3.0 (for i5), 28-44 PCIe 3.0 (i7), 48 PCIe 3.0 (i9) | ? | ? | No | Up to 10 | Up to 14 | ? | 6 W
C422 | Kaby Lake  | SR2WG(A0)  | GL82C422  | July 11, 2017  | 24 PCIe 3.0  | ?  | 6 W
C621 | Lewisburg  | SR36S(B1)
SR354(S0)
SR3HE(B2)
SR3HL(S1)  | EY82C621x  | UPI  | 32 GB/s  | 48 PCIe 3.0  | Up to 14  | 15 W
C622 | SR36X(S0)
SR3HK(S1)  | EY82C622  | 17 W
C624 | SR36Y(S0)
SR3HM(S1)  | EY82C624  | 19 W
C625 | SR36W(B1)
SR3HJ(B2)  | EY82C625  | Yes  | 21 W
C626 | SR36V(B1)
SR3HH(B2)  | EY82C626  | 23 W
C627 | SR36U(B1)
SR3HG(B2)  | EY82C627  | 28.6 W
C628 | SR36T(B1)
SR3HF(B2)  | EY82C628  | 26.3 W

### Dedicated mobile chipsets

[edit]

All Core-i series mobile chipsets have an integrated south bridge.

Chipset  | Code

name

| sSpec

number

| Part

numbers

| Release date  | Process

support

| Bus

interface

| Link

speed

| PCI Express

lanes

| VT-d

support

| SATA | USB | FDI

support

| TDP

|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | 3 Gbit/s | v3.2 Gen 1x1 | v2.0
PM55 | Ibex Peak-M | SLGWN(B2),
SLH23(B3),
SLGWP | BD82PM55 (PCH) | September 2009  | 45 nm, 32 nm  | DMI  | 1 GB/s | 8 PCIe 2.0 | Yes  | None | 6 ports  | None | 14 ports | No  | 3.5 W
HM55 | SLGZS(B3) | BD82HM55 (PCH)  | January 2010 | 6 PCIe 2.0 | 4 ports | 12 ports  | Yes
HM57 | SLGZR(B3) | BD82HM57 (PCH)  | 8 PCIe 2.0  | 6 ports  | 14 ports
QM57 | SLGZQ(B3) | BD82QM57 (PCH)
QS57 | SLGZV(B3) | BD82QS57 (PCH) | 3.4 W
HM65 | Cougar Point-M | SLH9D(B2) (Recalled)
SLJ4P(B3) | BD82HM65 (PCH)  | January 9, 2011  | 32 nm  | DMI 2.0  | 2 GB/s  | 8 PCIe 2.0  | No  | 2 ports  | 4 ports | 12 ports  | 3.9 W
HM67 | SLH9C(B2) (Recalled)
SLJ4N(B3) | BD82HM67 (PCH)  | 14 ports
UM67 | SLH9U(B2)
SLJ4L(B3) | BD82UM67 (PCH)  | February 20, 2011 | 3.4 W
QM67 | SLH9B(B2)
SLJ4M(B3) | BD82QM67 (PCH) | Yes | 3.9 W
QS67 | SLHAG(B2)
SLJ4K(B3) | BD82QS67 (PCH) | 3.4 W
NM70 | Panther Point-M | SLJTA(C1) | BD82NM70 (PCH) | August 2012  | 22 nm | 4 PCIe 2.0 | ?  | 1 port | 3 ports | 8 ports  | 4.1 W
HM70 | SJTNV(C1) | BD82HM70 (PCH)  | April 8, 2012  | 8 PCIe 2.0 | No  | 4 ports | 4 ports | 6 ports
HM75 | SLJ8F(C1) | BD82HM75 (PCH)  | 2 ports | None | 12 ports
HM76 | SLJ8E(C1) | BD82HM76 (PCH)  | 4 ports | 8 ports
UM77 | SLJ8D(C1) | BD82UM77 (PCH) | 4 PCIe 2.0 | 1 port | 3 ports | 6 ports | 3.0 W
HM77 | SLJ8C(C1) | BD82HM77 (PCH)  | 8 PCIe 2.0  | 2 ports  | 4 ports  | 10 ports  | 4.1 W
QM77 | SLJ8A(C1) | BD82QM77 (PCH) | Yes
QS77 | SLJ8B(C1) | BD82QS77 (PCH) | 3.0 to 3.6 W
HM86 | Lynx Point-M | SR13J(C1)
SR17E(C2) | DH82HM86 (PCH)  | June 2013  | 4 ports  | 2 ports | 5 ports  | 2.7 W
QM87 | SR13G(C1)
SR17C(C2) | DH82QM87 (PCH)  | 6 ports | 8 ports
HM87 | SR13H(C1)
SR17D(C2) | DH82HM87 (PCH)  | 10 ports
HM97 | Wildcat Point-M | SR1JN(A0) | DH82HM97 (PCH) | May 2014  | ?

### On-package mobile chipsets

[edit]

Every 4th Generation Intel Core and 5th Generation Intel Core processor based on Mobile U-Processor and Y-Processor Lines has an on-package Platform Controller Hub.[88]

CPU on-package chipset  | Code name  | Release date  | Process support  | Bus interface  | Link speed  | PCI Express lanes  | VT-d support  | SATA | USB | FDI support | TDP

|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | 3 Gbit/s | v3.2 Gen 1x1 | v2.0
8 series low-power, premium  | Lynx Point-LP  | June 2013  | 22 nm  | OPI✕8  | Un­known  | 12 PCIe 2.0  | Yes  | Up to 3  | Up to 4  | Up to 4  | 8  | No  | Un­known
9 series U-processor line, base[89] | Wildcat Point-LP  | January 2015  | ?  | DMI 2.0  | Un­known  | 10 PCIe 2.0  | Yes  | 2  | Up to 4  | 8  | Yes  | Un­known
9 series U-processor line, premium[89] | ?  | 12 PCIe 2.0  | Up to 4
9 series Core M processor line, premium[89] | September 2014  | ?  | 10

## 100/200/300 Series chipsets

[edit]

* All support Intel VT-d and do not support PCI.

### LGA 1151 rev 1

[edit]

See also: Skylake chipsets (100 series) and Kaby Lake chipsets (200 series)

The 100 Series chipsets (codenamed Sunrise Point), for Skylake processors using the LGA 1151 socket,[90] were released in the third quarter of 2015.[91]

The 200 Series chipsets (codenamed Union Point) were introduced along with Kaby Lake processors, which also use the LGA 1151 socket;[92] these were released in the first quarter of 2017.[93]

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Optane

Memory support

| SATA | SATAe | PCIe

M.2

| Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | v3.2 Gen 1x1 | v3.2 Gen 2x1 | Total
H110 | Sunrise
Point | SR2CA(D1)
SR286 | GL82H110
(PCH) | Sep. 27, 2015 | DMI 2.0 | 2.0 GB/s | 6 PCIe 2.0  | No | 4 | None  | None  | No | Up to 4  | None  | Up to 10  | 6 W
B150 | SR2C7(D1)
SR283 | GL82B150
(PCH) | Sep. 1, 2015  | DMI 3.0  | 3.93 GB/s | 8 PCIe 3.0  | 6  | Up to 1 | Up to 6  | Up to 12
Q150 | SR2C6(D1)
SR282 | GL82Q150
(PCH) | H2 2015 | 10 PCIe 3.0  | Up to 8  | Up to 14
H170 | SR2C8(D1)
SR284 | GL82H170
(PCH) | Sep. 1, 2015 | 16 PCIe 3.0 | Up to 2 | Up to 2
Q170 | SR2C5(D1)
SR281 | GL82Q170
(PCH) | Oct. 2015  | 20 PCIe 3.0  | Up to 3  | Up to 3  | Up to 10
Z170 | SR2C9(D1)
SR285 | GL82Z170
(PCH) | Aug. 2015
B250 | Union
Point | SR2WC(A0) | GL82B250 | Jan. 3, 2017 | 12 PCIe 3.0 | Yes | Up to 1 | Up to 1 | Up to 6  | Up to 12
Q250 | SR2WD(A0) | GL82Q250 | 14 PCIe 3.0 | Up to 8  | Up to 14
H270 | SR2WA(A0) | GL82H270 | 20 PCIe 3.0 | Up to 2 | Up to 2
Q270 | SR2WE(A0) | GL82Q270 | 24 PCIe 3.0 | Up to 3 | Up to 3 | Up to 10
Z270 | SR2WB(A0) | GL82Z270

### LGA 1151 rev 2

[edit]

Intel B360 Cannon Point Chipset Die Shot

See also: Coffee Lake chipsets (300 series)

While Coffee Lake shares the same socket as Skylake and Kaby Lake, this revision of LGA 1151 is electrically incompatible with 100 and 200 series CPUs.

The 300 Series chipsets were introduced along with Coffee Lake processors, which use the LGA 1151 socket; the enthusiast model was released in the last quarter of 2017,[94] the rest of the line was released in 2018.[95]

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Optane
Memory

support

| SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | v3.2 Gen 1x1 | v3.2 Gen 2x1 | Total
Z370 | Cannon Point | SR3MD(A0) | GL82Z370 | October 5, 2017 | DMI 3.0 | 3.93 GB/s | 24 PCIe 3.0 | Yes | 6 | up to 3 | up to 3 | No | Up to 10 | None | Up to 14 | 6 W
H310 | SR409(B0)
SRCXT(B0)
SRCXY(B0) | ? | April 3, 2018 | DMI 2.0 | 2.0 GB/s | 6 PCIe 2.0 | No | 4 | None | None | WiFi 5 | Up to 4 | Up to 10
B360 | SR408(B0) | DMI 3.0 | 3.93 GB/s | 12 PCIe 3.0 | Yes | 6 | Up to 1 | Up to 1 | Up to 6  | Up to 4 | Up to 12
B365 | Union Point | SREVJ(A0) | Dec. 14, 2018 | 20 PCIe 3.0 | Up to 2 | Up to 2 | No | Up to 8  | None | Up to 14
H370 | Cannon Point | SR405(B0) | April 3, 2018  | WiFi 5 | Up to 4
Q370 | SR404(B0)  | Q2 2018 | 24 PCIe 3.0 | Up to 3 | Up to 3 | Up to 10  | Up to 6
Z390 | SR406(B0) | FH82Z390 | October 8, 2018

### Xeon chipsets

[edit]

C232 and C242 chipsets do not support CPU integrated GPUs, as they lack FDI support. Officially they support only Xeon processors, but some motherboards also support consumer processors (6/7th generation Core for C230 series, 8/9th generation Core for C240 series and its Pentium/Celeron derivatives).

Chipset  | Code

name

| sSpec

number

| Part numbers  | Release date  | Bus

interface

| Link

speed

| PCI Express

lanes

| SATA | SATAe | PCIe

M.2

| Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s | v3.2 Gen 1x1 | v3.2 Gen 2x1 | Total
C232 | Sunrise Point | SR2CB(D1) | GL82C232 (PCH)  | September 1, 2015  | DMI 3.0  | 3.93 GB/s  | 8 PCIe 3.0  | Up to 6  | Up to 3  | Up to 1  | No  | Up to 6  | None  | Up to 12  | 6 W
C236 | SR2CC(D1) | GL82C236 (PCH)  | 20 PCIe 3.0  | Up to 8  | Up to 3  | Up to 10  | Up to 14
C242 | Coffee Lake  | SR40C(B0)  | FH82C242  | November 2018  | 10 PCIe 3.0  | Up to 6  | ?  | Up to 1  | Up to 6  | Up to 2  | Up to 12
C246 | SR40A(B0)  | FH82C246  | July 2018  | 24 PCIe 3.0  | Up to 8  | Up to 3  | WiFi 5 | Up to 10  | Up to 6  | Up to 14

### Dedicated mobile chipsets

[edit]

Chipset  | Code Name  | sSpec Number  | Part numbers  | Release Date  | Bus Interface  | Link Speed  | PCI Express lanes  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s ports  | v3.2  | v2.0
Gen 1x1 | Gen 2x1
HM170 | Sunrise
Point | SR2C4(D1)
SR27Z | GL82HM170 (PCH)  | September 1, 2015  | DMI 3.0  | 3.93 GB/s  | 16 PCIe 3.0  | Up to 4  | ?  | Up to 2  | No  | Up to 8  | None  | Up to 14  | 2.6 W
QM170 | SR2C3(D1)
SR27Y | GL82QM170 (PCH)
CM236 | SR2CE(D1) | GL82CM236 (PCH)  | 20 PCIe 3.0  | Up to 8  | Up to 3  | Up to 10  | 3.67 W
QMS180 | SR2NH(D1) | GLQMS180 (PCH) | ? | ? | ? | ? | ? | ?
QMU185 |  |  | ?  | ?  | ?  | ?  | ?  | ?
HM175 | SR30W(D1)  | GL82HM175 (PCH)  | January 3, 2017  | 16 PCIe 3.0  | Up to 4  | Up to 2  | Up to 8  | 2.6 W
QM175 | SR30V(D1)  | GL82QM175 (PCH)
CM238 | SR30U(D1)  | GL82CM238 (PCH)  | 20 PCIe 3.0  | Up to 8  | Up to 3  | Up to 10  | 3.67 W
HM370 | Coffee Lake  | SR40B(B0)  | FH82HM370 (PCH)  | Q2 2018  | 16 PCIe 3.0  | Up to 4  | Up to 2  | WiFi 5 | Up to 8  | Up to 4  | 3 W
QM370 | SR40D(B0)  | FH82QM370 (PCH)  | 20 PCIe 3.0  | Up to 10  | Up to 6
CM246 | SR40E(B0)  | FH82CM246 (PCH)  | 24 PCIe 3.0  | Up to 8  | Up to 4

### On-package mobile chipsets

[edit]

CPU On-package Chipset  | Code Name  | Release Date  | Bus Interface  | Link Speed[e] | PCI Express lanes  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s ports  | v3.2  | v2.0
Gen 1x1 | Gen 2x1
100 series (Base-U)  | Skylake[96] | September 2015  | OPI x8  | 2GT/s and 4GT/s  | 10 PCIe 2.0  | 2  | Un­known  | ?  | Un­known  | 4  | None  | 8  | Un­known
100 series (Premium-U)  | 12 PCIe 3.0  | 3  | ?  | 6  | 10
100 series (Premium-Y)  | 10 PCIe 3.0  | 2  | ?  | 6  | 6
Kaby Lake (Base-U)  | Kaby Lake[97] | September 2016  | OPI x8  | 2GT/s and 4GT/s  | 10 PCIe 2.0  | 2  | Un­known  | ?  | Un­known  | 4  | None  | 10  | Un­known
Kaby Lake (Premium-U)  | 12 PCIe 3.0  | 3  | ?  | 6  | 10
Kaby Lake (Premium-Y)  | 10 PCIe 3.0  | 2  | ?  | 6  | 6
300 series (Premium-U)  | Coffee Lake[98] | April 2018  | OPI x8  | Up to 4GT/s  | 16 PCIe 3.0  | 3  | Un­known  | ?  | Un­known  | Up to 6  | None  | 10  | Un­known

## 400/500 Series chipsets

[edit]

### LGA 1200

[edit]

See also: Comet Lake chipsets (400 series) and Rocket Lake chipsets (500 series)

LGA 1200 is a CPU socket designed for Comet Lake and Rocket Lake desktop CPUs. Like its predecessors, LGA 1200 has the same number of pins its name would suggest: 1200. Under the hood, LGA 1200 is a modified version of LGA 1151, its predecessor. It features 49 additional protruding pins that are used to improve power delivery and provide support for eventual updates with I/O features.

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Intel Optane
Memory support  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | Rocket Lake support  | TDP

|
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|

6 Gbit/s  | v2.0  | v3.2
Gen 1x1 | Gen 2x1 | Gen 2x2
H410 | Comet Lake | SRH1D(A0) | FH82H410 | Q2 2020 | DMI 3.0 | ×4[99]
(3.93 GB/s) | 6 PCIe 3.0 | No | 4 | No | Yes | No | Up to 10 | Up to 4 | None | None | No‡ | 6 W
B460 | SRH1C(A0) | FH82B460 | 16 PCIe 3.0 | Yes | 6 | Up to 12 | Up to 8 | None | None
H470 | SRH14(A0) | FH82H470 | 20 PCIe 3.0 | Yes | WiFi 6 | Up to 14 | Up to 4 | None | Yes
Q470 | SRH1A(A0) | FH82Q470 | 24 PCIe 3.0 | Yes | Up to 10 | Up to 6 | None
Z490 | SRH13(A0) | FH82Z490 | Yes | None
W480 | SRH19(A0) | FH82W480 | Yes | 8 | Up to 8 | None
H420E | SRH8W(A0)  | FH82H420E  | 6 PCIe 3.0  | Un­known  | 4  | No  | Un­known  | No  | Up to 10  | Up to 6  | None  | None  | Un­known  | 6 W
Q470E | SRJ7X(A0)  | FH82Q470E  | 24 PCIe 3.0  | 6  | 14  | Up to 10  | Up to 6  | None
W480E | SRJ7Y(A0)  | FH82W480E  | 8  | Up to 8  | None
H510 | Rocket Lake | SRKM2(B1) | FH82H510 | Q1 2021 | ×4[99]
(3.93 GB/s)  | 6 PCIe 3.0 | No | 4 | No | Yes | WiFi 6 | Up to 10 | Up to 4 | None | None | Yes | 6 W
B560 | SRKM5(B1) | FH82B560 | 12 PCIe 3.0 | Yes | 6 | Up to 12 | Up to 6 | Up to 4 | Up to 2
H570 | SRKM6(B1) | FH82H570  | ×8†[99]
(7.86 GB/s)  | 20 PCIe 3.0 | Yes | Up to 14 | Up to 8
Z590 | SRKM3(B1) | FH82Z590  | 24 PCIe 3.0 | Yes | Up to 10 | Up to 10 | Up to 3
W580 | SRKM7(B1)  | FH82W580 | Yes  | 8

* † Connection to the CPU will be reduced to DMI 3.0 ×4 if a Comet Lake CPU is installed. DMI 3.0 ×8 is only available with Rocket Lake CPUs.
* ‡ Mainboards advertised as H410 and B460 with Rocket Lake support use other 400-series chipsets. (such as H470)[100]

### Dedicated mobile and embedded chipsets

[edit]

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Intel Optane
Memory support  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
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|
|
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|
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|
|

6 Gbit/s  | v2.0  | v3.2
Gen 1x1 | Gen 2x1 | Gen 2x2
HM470 | Comet Lake  | SRJAU(A0)  | FH82HM470  | Q2 2020  | DMI 3.0  | 3.93 GB/s  | 16 PCIe 3.0  | Yes  | 4  | No  | Yes  | WiFi 6 | Up to 14  | Up to 8  | Up to 4  | Un­known  | 3 W
QM480 | SRH16[101] | FH82QM480  | 20 PCIe 3.0  | Up to 10  | Up to 6
WM490 | SRH17(A0) | FH82WM490  | 24 PCIe 3.0  | 8  | No
HM570E | Tiger Lake  | SRKLS(B1)  | FH82HM570E  | Q3 2021  | DMI 3.0  | 3.93 GB/s  | 16 PCIe 3.0  | Un­known  | 4  | No  | Un­known  | No  | Up to 14  | Up to 10  | Up to 10  | Un­known  | 2.9 W
QM580E | SRKLT(B1)  | FH82QM580E  | 20 PCIe 3.0
RM590E | SRKLR(B1)  | FH82RM590E  | 24 PCIe 3.0  | 8  | 3.4 W
HM570 | SRKMA(B1)  | FH82HM570  | Q2 2021  | 16 PCIe 3.0  | Yes  | 4  | Yes  | WiFi 6 | Up to 8  | Up to 8
QM580 | SRKMC(B1)  | FH82QM580  | 20 PCIe 3.0  | Up to 14  | Up to 10  | Up to 10
WM590 | SRKMB(B1) | FH82WM590  | 24 PCIe 3.0  | 8  | No

### On-package mobile chipsets

[edit]

CPU On-package Chipset  | Code Name  | Release Date  | Bus Interface  | Link Speed[e] | PCI Express lanes  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
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|

6 Gbit/s ports  | v3.2  | v2.0
Gen 1x1 | Gen 2x1
400 series (Mainstream/Base-U)  | Comet Lake[102] | August 2019  | OPI x8  | Up to 4GT/s  | 12 PCIe 2.0  | Up to 2  | No  | Yes  | ?  | Up to 4  | None  | 8  | Un­known
400 series (Premium-U)  | 16 PCIe 3.0  | Up to 3  | ?  | Up to 6  | Up to 6  | 10
495 series (Premium-U)  | Ice Lake[103] | August 2019  | OPI x8  | Up to 4GT/s  | 16 PCIe 3.0  | Up to 3  | No  | Yes  | ?  | Up to 6  | Up to 6  | 10  | Un­known
495 series (Premium-Y)  | 14 PCIe 3.0  | Up to 2  | ?  | 6
500 series (Premium-UP3)  | Tiger Lake[104] | September 2020  | OPI x8  | Up to 4GT/s  | 12 PCIe 3.0  | 2  | No  | Yes  | ?  | 4  | 4  | 10  | Un­known
500 series (Premium-UP4)  | Up to 2GT/s  | 10 PCIe 3.0  | None  | ?  | 4  | 4  | 6

## 600/700 Series chipsets

[edit]

### LGA 1700

[edit]

See also: Alder Lake chipsets (600 series) and Raptor Lake chipsets (700 series)

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Optane
Memory support  | SATA | SATAe | PCIe

M.2

| Wireless
MAC  | USB ports  | TDP

|
|
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|
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|
|
|
|
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|
|

6 Gbit/s  | v2.0  | v3.2
4.0 | 3.0 | Gen 1x1 | Gen 2x1 | Gen 2x2
Z690 | Alder Lake  | SRKZZ(B1)  | FH82Z690  | Q4 2021  | DMI 4.0  | ✕8[105]
(15.76 GB/s)  | 12[106] | 16[106] | Yes  | 8  | No  | Yes  | WiFi 6E | 14  | 10  | 10  | 4  | 6 W
W680 | SRL00(B1)  | FH82W680  | Q2 2022
Q670 | SRL01(B1)  | FH82Q670  | Q1 2022  | 12[106] | 8
H670 | SRKZY(B1)  | FH82H670  | 8[106] | 4[106] | 2[106]
B660 | SRKZX(B1)  | FH82B660  | ✕4[106]
(7.88 GB/s)  | 6[106] | 8[106] | 4[106] | 12[106] | 6[106]
H610 | SRKZW(B1)  | FH82H610  | None[106] | No  | 10[106] | 4[106] | 2[106] | None[106]
R680E | SRL2S(B1)  | FH82R680E  | ✕8
(15.76 GB/s)  | 12  | 16  | No  | 8  | No  | Un­known  | WiFi 5 | 14  | 10  | 10  | 4
Q670E | SRL2R(B1)  | FH82Q670E  | 12  | 8
H610E | SRL2T(B1)  | FH82H610E  | ✕4
(7.88 GB/s)  | None  | 12  | 4  | WiFi 6E | 10  | 4  | 2  | None
Z790 | Raptor Lake  | SRM8P(B1)  | FH82Z790  | Q4 2022  | DMI 4.0  | ✕8
(15.76 GB/s)  | 20  | 8  | Yes  | 8  | No  | Yes  | WiFi 6E | 14  | 10  | 5
H770 | SRM8T(B1)  | FH82H770  | Q1 2023  | 16  | 8  | 4  | 2
B760 | SRM8V(B1)  | FH82B760  | ✕4
(7.88 GB/s)  | 10  | 4  | 4  | 12  | 6

### Dedicated mobile chipsets

[edit]

Every 12th Gen and 13th Gen Intel Core-i mobile CPU excluding HX-series has an on-package Platform Controller Hub.

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express lanes  | Optane
Memory support  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|
|

4.0  | 3.0  | 6 Gbit/s  | v2.0  | v3.2
Gen 1x1 | Gen 2x1 | Gen 2x2
HM670 | Alder Lake  | SRL2Y(B1)  | FH82HM670  | Q2 2022  | DMI 4.0  | ✕8[105]
(15.76 GB/s)  | Up to 16  | Up to 12  | Yes  | 8  | No  | Yes  | WiFi 6E | Up to 14  | Up to 10  | Up to 4  | 3.7 W
WM690 | SRL2Z(B1)  | FH82WM690
HM770 | Raptor Lake  | SRM8M(B1)  | FH82HM770  | January 3, 2023  | 28 including PCIe 3.0  | Un­known  | No  | Yes
WM790 | SRM8N(B1)  | FH82WM790

### On-package mobile chipsets

[edit]

CPU On-package Chipset  | Code Name  | Release Date  | Bus Interface  | Link
Speed  | PCI Express lanes  | SATA | SATAe | PCIe M.2 | Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|

4.0  | 3.0  | 6 Gbit/s ports  | v3.2  | v2.0
Gen 1x1 | Gen 2x1
600 series (Premium-P)[107] | Alder Lake  | February 2022  | OPI  | ✕8

(15.76 GB/s)

| None  | 12  | Up to 2  | No  | Yes  | WiFi 6 | Up to 4  | Up to 4  | 10  | Un­known
700 series (Premium-P)[108] | Raptor Lake  | January 2023  | None  | No  | Yes  | Un­known

## 800 Series chipsets

[edit]

### LGA 1851

[edit]

See also: Arrow Lake chipsets (800 series)

Chipset  | Code
Name  | sSpec
Number  | Part
numbers  | Release Date  | Bus
Interface  | Link
Speed  | PCI Express
lanes  | Optane
Memory support  | SATA | PCIe

M.2

| Wireless
MAC  | USB ports  | TDP

|
|
|
|
|
|
|
|
|
|
|
|
|

6 Gbit/s  | v2.0  | v3.2
4.0 | 3.0 | Gen 1x1 | Gen 2x1 | Gen 2x2
Z890 | Arrow Lake  | SRPEZ(B0)  | FH82Z890  | Q4 2024  | DMI 4.0  | ✕8
(15.76 GB/s)  | 24  | —  | No  | 8  | Yes  | WiFi 6E | 14  | 10  | 10  | 5  | 6 W
B860 | SRPEW(B0)  | FH82B860  | Q1 2025  | ✕4
(7.88 GB/s)  | 14  | 4  | 12  | 6  | 4  | 2
H810 | SRPEV(B0)  | FH82H810  | 8  | 10  | 4  | 2  | None

## See also

[edit]

* ALi Corporation – for ALi chipsets
* Chips and Technologies
* List of AMD chipsets
* List of ATI chipsets
* Comparison of Nvidia nForce chipsets
* List of Intel Xeon chipsets
* List of Intel processors
* Silicon Integrated Systems – for SiS motherboard chipsets
* List of VIA chipsets

## Notes

[edit]

1. ^ When applied to computer memory (RAM or cache) the quantities KB, MB and GB are defined as: 1 KB = 1024 B, 1 MB = 1024 KB, 1 GB = 1024 MB, consistent with the JEDEC memory standard.
2. ^ The Pentium Pro, Pentium II/III, and the Celerons based on them are essentially the same design with minor internal revisions and varying cache designs. Because of this, the same chipset can be used for Socket 8, Socket 370, Slot 1, or Slot 2 designs with any CPU in the P6 family. In practice however, newer chipset designs are usually made only for the newer processor packages, and older ones may not be updated to accommodate for recent package designs. In addition, certain chipsets may be implemented in motherboards with different processor packages, much like how the 440FX could be used either with a Pentium Pro (Socket 8) or Pentium II (Slot 1). A new feature for the latest Intel chipsets is hardware virtualization support (Intel VT-d).[40] The chipset support for this technology is not very clear for the moment.[41]
3. ^ The Intel 82943GML mobile chipset unofficially supports Core Duo, Core 2 Duo, and Pentium Dual Core processors as well as 667 MHz FSB, which is a popular upgrade for many older notebook computers such as certain models of Acer Aspire 3680.
4. ^ Remapping of PCIE/APIC memory ranges not supported,[61] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar).
5. ^ a b c d Aggregated speed for both directions

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[edit]

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## External links

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Wikimedia Commons has media related to Intel chipsets.

* Official website

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Intel processors

Lists|

* Processors
* Atom
* Celeron
* Pentium
* Pro
* II
* III
* 4
* D
* M
* Core
* 2
* i3
* i5
* i7
* i9
* M
* Xeon
* Quark
* Itanium
* Microarchitectures
* Chipsets

Microarchitectures|

| IA-32 (32-bit x86)|

* P5
* P6
* P6 variant (Pentium M)
* P6 variant (Enhanced Pentium M)
* NetBurst

|

x86-64 (64-bit)|

* Core
* Penryn
* Nehalem
* Westmere
* Sandy Bridge
* Ivy Bridge
* Haswell
* Broadwell
* Skylake
* Cannon Lake
* Sunny Cove
* Cypress Cove
* Willow Cove
* Golden Cove
* Raptor Cove
* Redwood Cove
* Lion Cove

x86 ULV|

* Bonnell
* Saltwell
* Silvermont
* Goldmont
* Goldmont Plus
* Tremont
* Gracemont

Current products|

| x86-64 (64-bit)|

* Atom
* Celeron
* Pentium
* Core
* 10th gen
* 11th gen
* 12th gen
* 13th gen
* 14th gen
* Core Ultra
* 1st gen
* 2nd gen
* Xeon

|

Discontinued|

| BCD oriented (4-bit)|

* 4004 (1971)
* 4040 (1974)

|

pre-x86 (8-bit)|

* 8008 (1972)
* 8080 (1974)
* 8085 (1977)

Early x86 (16-bit)|

* 8086 (1978)
* 8088 (1979)
* 80186 (1982)
* 80188 (1982)
* 80286 (1982)

x87 (external FPUs)|

8/16-bit databus
8087 (1980)
16-bit databus
80C187
80287
80387SX
32-bit databus
80387DX
80487

IA-32 (32-bit x86)|

* i386
* SX
* 376
* EX
* i486
* SX
* DX2
* DX4
* SL
* RapidCAD
* OverDrive
* A100/A110
* Atom
* CE
* SoC
* Celeron (1998)
* M
* D (2004)
* Pentium
* Original i586
* OverDrive
* Pro
* II
* III
* 4
* M
* Dual-Core
* Core
* Xeon
* P6-based
* NetBurst-based
* Core-based
* Quark
* Tolapai

x86-64 (64-bit)|

* Atom
* SoC
* CE
* Celeron
* D
* Dual-Core
* Pentium
* 4
* D
* Extreme Edition
* Dual-Core
* Core
* 2
* 1st gen
* 2nd gen
* 3rd gen
* 4th gen
* 5th gen
* 6th gen
* 7th gen
* 8th gen
* 9th gen
* 10th gen
* 11th gen
* M
* Xeon
* Nehalem-based
* Sandy Bridge-based
* Ivy Bridge-based
* Haswell-based
* Broadwell-based
* Skylake-based

Other|

CISC
iAPX 432
EPIC
Itanium
RISC
i860
i960
StrongARM
XScale

Related|

* Tick–tock model
* Process–architecture–optimization model
* Intel GPUs
* GMA
* Intel HD, UHD, and Iris Graphics
* Xe
* Arc
* PCHs
* SCHs
* ICHs
* PIIXs
* Stratix
* Codenames
* Larrabee

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