Microprocessor chronology

Timeline of microprocessors

See also: Microprocessor § History

Progress of miniaturisation, and comparison of sizes of semiconductor manufacturing process nodes with some microscopic objects and visible light wavelengths

## 1970s

[edit]

The first chips that could be considered microprocessors were designed and manufactured in the late 1960s and early 1970s, including the MP944 used in the Grumman F-14 CADC.[1] Intel's 4004 of 1971 is widely regarded as the first commercial microprocessor.[2]

Designers predominantly used MOSFET transistors with pMOS logic in the early 1970s, switching to nMOS logic after the mid-1970s. nMOS had the advantage that it could run on a single voltage, typically +5V, which simplified the power supply requirements and allowed it to be easily interfaced with the wide variety of +5V transistor-transistor logic (TTL) devices. nMOS had the disadvantage that it was more susceptible to electronic noise generated by slight impurities in the underlying silicon material, and it was not until the mid-1970s that these, sodium in particular, were successfully removed to the required levels. At that time, around 1975, nMOS quickly took over the market.[3]

This corresponded with the introduction of new semiconductor masking systems, notably the Micralign system from Perkin-Elmer. Micralign projected an image of the mask onto the silicon wafer, never touching it directly, which eliminated the previous problems when the mask would be lifted off the surface and take away some of the photoresist along with it, ruining the chips on that portion of the wafer.[4] By reducing the number of flawed chips, from about 70% to 10%, the cost of complex designs like early microprocessors fell by the same amount. Systems based on contact aligners cost on the order of $300 in single-unit quantities, the MOS 6502, designed specifically to take advantage of these improvements, cost only $25.[5]

This period also saw considerable experimentation with various word lengths. Early on, 4-bit processors were common, like the Intel 4004, simply because making a wider word length could not be accomplished cost-effectively in the room available on the small wafers of the era, especially when the majority would be defective. As yields improved, wafer sizes grew, and feature size continued to be reduced, more complex 8-bit designs emerged like the Intel 8080 and 6502. 16-bit processors emerged early but were expensive; by the decade's end, low-cost 16-bit designs like the Zilog Z8000 were becoming common. Some unusual word lengths were also produced, including 12-bit and 20-bit, often matching a design that had previously been implemented in a multi-chip format in a minicomputer. These had largely disappeared by the end of the decade as minicomputers moved to 32-bit formats.

Date  | Name  | Developer  | Max clock
(first version)  | Word size
(bits)  | Process | Chips[6] | Transistors | MOSFET | Ref

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1970  | AL1 | Four-Phase Systems  | 1 MHz  | 8-bit slice[a] | 10 μm | 1[b] | 4,000  | MOS  | [9][10]
1970  | TMS1802NC[c] | Texas Instruments  | 400 kHz  | 4 | 10 μm | 1  | ~5,000  | pMOS | [11][12][13][14]
1971  | 4004 | Intel | 740 kHz  | 4 | 10 μm | 1  | 2,250  | pMOS | [6]
1972  | PPS-25  | Fairchild | 400 kHz  | 4  |  | 2  |  | pMOS  | [15][d]
1972  | μPD700  | NEC |  | 4  |  | 1  |  |  | [16]
1972  | 8008 | Intel | 500 kHz  | 8 | 10 μm  | 1  | 3,500  | pMOS  |
1972  | PPS-4  | Rockwell | 200 kHz  | 4  |  | 1  |  | pMOS  | [17][18]
1973  | IMP-16 | National | 715 kHz  | 16[e] |  | 5  |  | pMOS  | [19][6][20]
1973  | μCOM-4 | NEC | 2 MHz  | 4  | 7.5 μm | 1  | 2,500  | NMOS | [21][22][16][6]
1973  | TLCS-12 | Toshiba | 1 MHz  | 12 | 6 μm | 1  | 2,800 silicon gates | pMOS  | [23][24][6]
1973  | Mini-D  | Burroughs | 1 MHz  | 8  |  | 1  |  | pMOS  | [25]
1974  | IMP-8  | National | 715 kHz  | 8  |  | 3  |  | pMOS  | [23]
1974  | 8080 | Intel | 2 MHz  | 8  | 6 μm  | 1  | 6,000  | NMOS  |
1974  | μCOM-8 | NEC | 2 MHz  | 8  |  | 1  |  | NMOS  | [16][6]
1974  | 5065 | Mostek | 1.4 MHz  | 8  |  | 1  |  | pMOS  | [26]
1974  | μCOM-16 | NEC | 2 MHz  | 16 |  | 2  |  | NMOS  | [16][6]
1974  | IMP-4  | National | 500 kHz  | 4  |  | 3  |  | pMOS  | [23]
1974  | 4040 | Intel | 740 kHz  | 4  | 10 μm  | 1  | 3,000  | pMOS  |
1974  | 6800 | Motorola | 1 MHz  | 8  | \-  | 1  | 4,100  | NMOS  | [23]
1974  | TMS 1000 | Texas Instruments | 400 kHz  | 4  | 8 μm  | 1  | 8,000  | pMOS,nMOS,cMOS  |
1974  | IPC-16A PACE | National | 1.33 MHz  | 16  |  | 1  |  | pMOS  | [27][28]
1974  | ISP-8A/500 (SC/MP) | National | 1 MHz  | 8  |  | 1  |  | pMOS  |
1975  | 6100 | Intersil | 4 MHz  | 12  | \-  | 1  | 4,000  | CMOS | [29][30]
1975  | TLCS-12A  | Toshiba | 1.2 MHz  | 12  | \-  | 1  |  | pMOS  | [6]
1975  | 2650 | Signetics | 1.2 MHz  | 8  |  | 1  |  | NMOS  | [23]
1975  | PPS-8  | Rockwell | 256 kHz  | 8  |  | 1  |  | pMOS  | [23]
1975  | F-8 | Fairchild | 2 MHz  | 8  |  | 1  |  | NMOS  | [23]
1975  | CDP 1801 | RCA | 2 MHz  | 8  | 5 μm  | 2  | 5,000  | CMOS  | [31][32]
1975  | 6502 | MOS Technology | 1 MHz  | 8  | \-  | 1  | 3,510  | NMOS (dynamic)  |
1975  | PFL-16A (MN 1610)  | Panafacom | 2 MHz  | 16  | \-  | 1  |  | NMOS  | [6]
1975  | BPC  | Hewlett Packard | 10 MHz  | 16  | \-  | 1  | 6,000 (+ ROM)  | NMOS  | [33][34]
1975  | MCP-1600 | Western Digital | 3.3 MHz  | 16[f] | \-  | 3[g] |  | NMOS  | [35]
1975  | CP1600 | General Instrument | 3.3 MHz  | 16  |  | 1  |  | NMOS  | [27][36][37][6]
1976  | CDP 1802 | RCA | 6.4 MHz  | 8  |  | 1  |  | CMOS  | [38][39]
1976  | Z80 | Zilog | 2.5 MHz  | 8  | 4 μm  | 1  | 8,500  | NMOS  |
1976  | TMS9900 | Texas Instruments | 3.3 MHz  | 16  | \-  | 1  | 8,000  | nMOS  |
1976  | 8x300 | Signetics | 8 MHz  | 8  |  | 1  |  | Bipolar | [40][41]
1977  | Bellmac-8 (WE212)  | Bell Labs | 2.0 MHz  | 8  | 5 μm  | 1  | 7,000  | CMOS  |
1977  | 8085 | Intel | 3.0 MHz  | 8  | 3 μm | 1  | 6,500  | nMOS  |
1977  | MC14500B | Motorola | 1.0 MHz  | 1 |  | 1  |  | CMOS  |
1978  | 6809 | Motorola | 1 MHz  | 8  | 5 μm  | 1  | 9,000  | NMOS  |
1978  | 8086 | Intel | 5 MHz  | 16  | 3 μm  | 1  | 29,000  | nMOS  |
1978  | 6801 | Motorola | \-  | 8  | 5 μm  | 1  | 35,000  | nMOS  |
1979  | Z8000 | Zilog | \-  | 16  | \-  | 1  | 17,500  | nMOS  |
1979  | 8088 | Intel | 5 MHz  | 8/16[h] | 3 μm  | 1  | 29,000  | NMOS (HMOS)  |
1979  | 68000 | Motorola | 8 MHz  | 16/32[i] | 3.5 μm  | 1  | 68,000  | NMOS (HMOS)  | [42]

1. ^ The AL1 chip is an 8-bit slice arithmetic logic unit with registers. Four-Phase did not sell the AL1 individually but as part of a system combining three of these 8-bit AL1 chips to yield a multi-chip CPU with a 24-bit word size.
2. ^ A 1995 court demo combined one AL1 with ROM, RAM, and I/0 to argue that the AL1 alone be considered a microprocessor.[7] But because it requires an external microcode controller, another view disagrees.[8]
3. ^ TMS1802NC is the original designation of the TMS0102, which is considered a microcontroller because it incorporates all program ROM internally. It can't execute external code and programming is done during manufacture. The term microprocessor may instead be reserved for devices that can execute external code.
4. ^ According to Ogdin 1975, the Fairchild PPS-25 was first delivered in 2Q 1971 and the Intel 4004 in 4Q 1971.
5. ^ The 16-bit registers and ALU were implemented by combining four identical 4-bit slice chips. The National Semiconductor PACE reimplemented its architecture as the first single-chip 16-bit microprocessor.
6. ^ Internally is an 8-bit processor, but is micro-programmed to emulate a 16-bit CPU.
7. ^ Later microprocessors reused this chipset, for instance the LSI-11 in 1975 used 4 chips and the WD16 in 1976 used 5 chips.
8. ^ The Intel 8088 had an 8-bit external data bus, but internally used a 16-bit architecture.
9. ^ The Motorola 68000 had a 16-bit external data bus, but internally used 32-bit registers.

## 1980s

[edit]

As Moore's Law continued to drive the industry towards more complex chip designs, the expected widespread move from 8-bit designs of the 1970s to 16-bit designs almost didn't occur; instead, new 32-bit designs like the Motorola 68000 and National Semiconductor NS32000 emerged that offered far more performance. The only widespread use of 16-bit systems was in the IBM PC, which had selected the Intel 8088 in 1979 before the new designs had matured.

Another change was the move to CMOS gates as the primary method of building complex CPUs. CMOS had been available since the early 1970s; RCA introduced the COSMAC processor using CMOS in 1975.[43] Whereas earlier systems used a single transistor as the basis for each "gate", CMOS used a two-sided design, essentially making it twice as expensive to build. Its advantage was that its logic was not based on the voltage of a transistor compared to the silicon substrate, but the difference in voltages between the two sides, which was detectable at much lower power levels.[citation needed] As processor complexity continued to grow, power dissipation had become a significant concern and chips were prone to overheating; CMOS greatly reduced this problem and quickly took over the market.[44] This was aided by the uptake of CMOS by Japanese firms while US firms remained on nMOS, giving the Japanese industry a major advance during the 1980s.[45]

Semiconductor fabrication techniques continued to improve throughout. The Micralign, which had "created the modern IC industry", was obsolete by the early 1980s. They were replaced by the new steppers, which used high magnifications and extremely powerful light sources to allow a large mask to be copied onto the wafer at ever-smaller sizes. This technology allowed the industry to break below the former 1 micron limit.

Key home computers in the early part of the decade predominantly use processors developed in the 1970s. Versions of the 6502, first released in 1975, powered the Commodore 64, Apple II, BBC Micro, and Atari 8-bit computers. The 8-bit Zilog Z80 (1976) is at the core of the ZX Spectrum, MSX systems and many others. The 8086-based IBM PC, launched in 1981, started the move to 16-bit, but was soon passed by the 68000-based 16/32-bit Macintosh, then the Atari ST and Amiga. IBM PC compatibles moved to 32-bit with the introduction of the Intel 80386 in late 1985, although 386-based systems were considerably expensive at the time.

In addition to ever-growing word lengths, microprocessors began to add additional functional units that had previously been optional external parts. By the middle of the decade, memory management units (MMUs) were becoming commonplace, first appearing on designs like the Intel 80286 and Motorola 68030. By the end of the decade, floating point units (FPUs) were being added, first appearing on 1989s Intel 486 and followed the next year by the Motorola 68040.

Another change that began during the 1980s involved overall design philosophy with the emergence of the reduced instruction set computer, or RISC. Although the concept was first developed by IBM in the 1970s, the company did not introduce powerful systems based on it, largely for fear of cannibalizing their sales of larger mainframe systems. Market introduction was driven by smaller companies like MIPS Technologies, SPARC and ARM. These companies did not have access to high-end fabrication like Intel and Motorola, but were able to introduce chips that were highly competitive with those companies with a fraction of the complexity. By the end of the decade, every major vendor was introducing a RISC design of their own, like the IBM POWER, Intel i860 and Motorola 88000.

Date  | Name  | Developer  | Max Clock
(first version)  | Word size
(bits)  | Process  | Transistors

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1980  | 16032 | National Semiconductor | \-  | 16/32  | \-  | 60,000
1980  | BELLMAC-32/WE 32000  | Bell Labs |  | 32  |  | 150,000
1981  | 6120  | Harris Corporation | 10 MHz  | 12  | \-  | 20,000 (CMOS)[46]
1981  | ROMP | IBM | 10 MHz  | 32 | 2 μm  | 45,000
1981  | T-11 | DEC | 2.5 MHz  | 16  | 5 μm  | 17,000 (NMOS)
1982  | RISC-I[47] | UC Berkeley | 1 MHz  | \-  | 5 μm  | 44,420 (NMOS)
1982  | FOCUS | Hewlett Packard | 18 MHz  | 32  | 1.5 μm | 450,000
1982  | 80186 | Intel | 6 MHz  | 16  | \-  | 55,000
1982  | 80188 | Intel | 8 MHz  | 8/16  | \-  | 55,000
1982  | 80286 | Intel | 6 MHz  | 16  | 1.5 μm  | 134,000
1983  | RISC-II | UC Berkeley | 3 MHz  | \-  | 3 μm  | 40,760 (NMOS)
1983  | MIPS[48] | Stanford University | 2 MHz  | 32  | 3 μm  | 25,000
1983  | 65816 | Western Design Center | \-  | 16  | \-  | \-
1984  | 68020 | Motorola | 16 MHz  | 32  | 2 μm  | 190,000
1984  | NS32032 | National Semiconductor | \-  | 32  | \-  | 70,000
1984  | V20 | NEC | 5 MHz  | 8/16  | \-  | 63,000
1985  | 80386 | Intel | 12 MHz  | 32  | 1.5 μm  | 275,000
1985  | MicroVax II 78032 | DEC | 5 MHz  | 32  | 3.0 μm  | 125,000
1985  | R2000 | MIPS | 8 MHz  | 32  | 2 μm  | 115,000
1985[49] | Novix NC4016  | Harris Corporation | 8 MHz  | 16  | 3 μm[50] | 16,000[51]
1986  | Z80000 | Zilog | \-  | 32  | \-  | 91,000
1986  | SPARC MB86900 | Fujitsu[52][53][54] | 15 MHz  | 32  | 0.8 μm | 800,000
1986  | V60[55] | NEC | 16 MHz  | 16/32  | 1.5 μm  | 375,000
1987  | 80C186 | Intel | 10 MHz  | 16  | \-  | 56,000 (CMOS)
1987  | CVAX 78034 | DEC | 12.5 MHz  | 32  | 2.0 μm  | 134,000
1987  | ARM2 | Acorn | 8 MHz  | 32  | 2 μm  | 25,000[56]
1987  | Gmicro/200[57] | Hitachi | \-  | \-  | 1 μm | 730,000
1987  | 68030 | Motorola | 16 MHz  | 32  | 1.3 μm  | 273,000
1987  | V70[55] | NEC | 20 MHz  | 16/32  | 1.5 μm  | 385,000
1988  | R3000 | MIPS | 25 MHz  | 32  | 1.2 μm  | 120,000
1988  | 80386SX | Intel | 12 MHz  | 16/32  | \-  | \-
1988  | i960 | Intel | 10 MHz  | 33/32  | 1.5 μm  | 250,000
1989  | i960CA[58] | Intel | 16–33 MHz  | 33/32  | 0.8 μm  | 600,000
1989  | VAX DC520 "Rigel" | DEC | 35 MHz  | 32  | 1.5 μm  | 320,000
1989  | 80486 | Intel | 25 MHz  | 32  | 1 μm  | 1,180,000
1989  | i860 | Intel | 25 MHz  | 32  | 1 μm  | 1,000,000

## 1990s

[edit]

The 32-bit microprocessor dominated the consumer market in the 1990s. Processor clock speeds increased by more than tenfold between 1990 and 1999, and 64-bit processors began to emerge later in the decade. In the 1990s, microprocessors no longer used the same clock speed for the processor and the RAM. Processors began to have a front-side bus (FSB) clock speed used in communication with RAM and other components. Typically, the processor itself ran at a clock speed that was a multiple of the FSB clock speed. Intel's Pentium III, for example, had an internal clock speed of 450–600 MHz and an FSB speed of 100–133 MHz. Only the processor's internal clock speed is shown here.

Date  | Name  | Developer  | Clock  | Word size
(bits)  | Process  | Transistors
(millions)  | Threads

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1990  | 68040 | Motorola | 40 MHz  | 32  | \-  | 1.2  |
1990  | POWER1 | IBM | 20–30 MHz  | 32  | 1,000 nm | 6.9  |
1991  | R4000 | MIPS Computer Systems | 100 MHz  | 64 | 800 nm | 1.35  |
1991  | NVAX | DEC | 62.5–90.91 MHz  | 32  | 750 nm | 1.3  |
1991  | RSC | IBM | 33 MHz  | 32  | 800 nm  | 1.0[59] |
1992  | SH-1 | Hitachi | 20 MHz[60] | 32  | 800 nm  | 0.6[61] |
1992  | Alpha 21064 | DEC | 100–200 MHz  | 64  | 750 nm  | 1.68  |
1992  | microSPARC I | Sun | 40–50 MHz  | 32  | 800 nm  | 0.8  |
1992  | PA-7100 | Hewlett Packard | 100 MHz  | 32  | 800 nm  | 0.85[62] |
1992  | 486SLC | Cyrix | 40 MHz  | 16  |  |  |
1993  | HARP-1  | Hitachi | 120 MHz  | \-  | 500 nm  | 2.8[63] |
1993  | PowerPC 601 | IBM, Motorola | 50–80 MHz  | 32  | 600 nm | 2.8  |
1993  | Pentium | Intel | 60–66 MHz  | 32  | 800 nm  | 3.1  |
1993  | POWER2 | IBM | 55–71.5 MHz  | 32  | 720 nm  | 23  |
1994  | microSPARC II | Fujitsu | 60–125 MHz  | \-  | 500 nm  | 2.3  |
1994  | S/390 G1 | IBM | \-  | 32  | \-  |  |
1994  | 68060 | Motorola | 50 MHz  | 32  | 600 nm  | 2.5  |
1994  | Alpha 21064A | DEC | 200–300 MHz  | 64  | 500 nm  | 2.85  |
1994  | R4600 | QED | 100–125 MHz  | 64  | 650 nm  | 2.2  |
1994  | R8000 | MTI | 75-90 MHz  | 64  | 700 nm  | 3.43  |
1994  | PA-7200 | Hewlett Packard | 125 MHz  | 32  | 550 nm  | 1.26  |
1994  | PowerPC 603 | IBM, Motorola | 60–120 MHz  | 32  | 500 nm  | 1.6  |
1994  | PowerPC 604 | IBM, Motorola | 100–180 MHz  | 32  | 500 nm  | 3.6  |
1994  | PA-7100LC | Hewlett Packard | 100 MHz  | 32  | 750 nm  | 0.90  |
1995  | Alpha 21164 | DEC | 266–333 MHz  | 64  | 500 nm  | 9.3  |
1995  | S/390 G2 | IBM | \-  | 32  | \-  |  |
1995  | UltraSPARC | Sun | 143–167 MHz  | 64  | 470 nm  | 5.2  |
1995  | SPARC64 | HAL Computer Systems | 101–118 MHz  | 64  | 400 nm  | \-  |
1995  | Pentium Pro | Intel | 150–200 MHz  | 32  | 350 nm | 5.5  |
1996  | Alpha 21164A | DEC | 400–500 MHz  | 64  | 350 nm  | 9.7  |
1995  | S/390 G3 | IBM | \-  | 32  | \-  |  |
1996  | K5 | AMD | 75–100 MHz  | 32  | 500 nm  | 4.3  |
1996  | R10000 | MTI | 150–250 MHz  | 64  | 350 nm  | 6.7  |
1996  | R5000 | QED | 180–250 MHz  | \-  | 350 nm  | 3.7  |
1996  | SPARC64 II | HAL Computer Systems | 141–161 MHz  | 64  | 350 nm  | \-  |
1996  | PA-8000 | Hewlett-Packard | 160–180 MHz  | 64  | 500 nm  | 3.8  |
1996  | POWER2 Super Chip (P2SC) | IBM | 150 MHz  | 32  | 290 nm  | 15  |
1997  | SH-4 | Hitachi | 200 MHz  | \-  | 200 nm[64] | 10[65] |
1997  | RS64 | IBM | 125 MHz  | 64  | ? nm  | ?  |
1997  | Pentium II | Intel | 233–300 MHz  | 32  | 350 nm  | 7.5  |
1997  | PowerPC 620 | IBM, Motorola | 120–150 MHz  | 64  | 350 nm  | 6.9  |
1997  | UltraSPARC IIs | Sun | 250–400 MHz  | 64  | 350 nm  | 5.4  |
1997  | S/390 G4 | IBM | 370 MHz  | 32  | 500 nm  | 7.8  |
1997  | PowerPC 750 | IBM, Motorola | 233–366 MHz  | 32  | 260 nm  | 6.35  |
1997  | K6 | AMD | 166–233 MHz  | 32  | 350 nm  | 8.8  |
1998  | RS64-II | IBM | 262 MHz  | 64  | 350 nm  | 12.5  |
1998  | Alpha 21264 | DEC | 450–600 MHz  | 64  | 350 nm  | 15.2  |
1998  | MIPS R12000 | SGI | 270–400 MHz  | 64  | 250–180 nm | 6.9  |
1998  | RM7000  | QED | 250–300 MHz  | \-  | 250 nm | 18  |
1998  | SPARC64 III | HAL Computer Systems | 250–330 MHz  | 64  | 240 nm  | 17.6  |
1998  | S/390 G5 | IBM | 500 MHz  | 32  | 250 nm  | 25  |
1998  | PA-8500 | Hewlett Packard | 300–440 MHz  | 64  | 250 nm  | 140  |
1998  | POWER3 | IBM | 200 MHz  | 64  | 250 nm  | 15  |
1999  | S/390 G6 | IBM | 550-637 MHz  | 32  | \-  |  |
1999  | Emotion Engine | Sony, Toshiba | 294–300 MHz  | \-  | 180–65 nm[66] | 13.5[67] |
1999  | Pentium III | Intel | 450–600 MHz  | 32  | 250 nm  | 9.5  |
1999  | RS64-III | IBM | 450 MHz  | 64  | 220 nm  | 34  | 2
1999  | PowerPC 7400 | Motorola | 350–500 MHz  | 32  | 200–130 nm | 10.5  |
1999  | Athlon | AMD | 500–1000 MHz  | 32  | 250 nm  | 22  |

## 2000s

[edit]

64-bit processors became mainstream in the 2000s. Microprocessor clock speeds reached a ceiling because of the heat dissipation barrier[citation needed]. Instead of implementing expensive and impractical cooling systems, manufacturers turned to parallel computing in the form of the multi-core processor. Overclocking had its roots in the 1990s, but came into its own in the 2000s. Off-the-shelf cooling systems designed for overclocked processors became common, and the gaming PC had its advent as well. Over the decade, transistor counts increased by about an order of magnitude, a trend continued from previous decades. Process sizes decreased about fourfold, from 180 nm to 45 nm.

Date  | Name  | Developer  | Clock  | Process  | Transistors
(millions)  | Cores per die /
Dies per module

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2000  | Athlon XP | AMD | 1.33–1.73 GHz  | 180 nm  | 37.5  | 1 / 1
2000  | Duron | AMD | 550 MHz–1.3 GHz  | 180 nm  | 25  | 1 / 1
2000  | RS64-IV | IBM | 600–750 MHz  | 180 nm  | 44  | 1 / 2
2000  | Pentium 4 | Intel | 1.3–2 GHz  | 180–130 nm  | 42  | 1 / 1
2000  | SPARC64 IV  | Fujitsu | 450–810 MHz  | 130 nm  | \-  | 1 / 1
2000  | z900 | IBM | 918 MHz  | 180 nm  | 47  | 1 / 12, 20
2001  | MIPS R14000 | SGI | 500–600 MHz  | 130 nm  | 7.2  | 1 / 1
2001  | POWER4 | IBM | 1.1–1.4 GHz  | 180–130 nm  | 174  | 2 / 1, 4
2001  | UltraSPARC III | Sun | 750–1200 MHz  | 130 nm  | 29  | 1 / 1
2001  | Itanium | Intel | 733–800 MHz  | 180 nm  | 25  | 1 / 1
2001  | PowerPC 7450 | Motorola | 733–800 MHz  | 180–130 nm  | 33  | 1 / 1
2002  | SPARC64 V | Fujitsu | 1.1–1.35 GHz  | 130 nm  | 190  | 1 / 1
2002  | Itanium 2 | Intel | 0.9–1 GHz  | 180 nm  | 410  | 1 / 1
2003  | PowerPC 970 | IBM | 1.6–2.0 GHz  | 130–90 nm  | 52  | 1 / 1
2003  | Pentium M | Intel | 0.9–1.7 GHz  | 130–90 nm  | 77  | 1 / 1
2003  | Opteron | AMD | 1.4–2.4 GHz  | 130 nm  | 106  | 1 / 1
2004  | POWER5 | IBM | 1.65–1.9 GHz  | 130–90 nm  | 276  | 2 / 1, 2, 4
2004  | PowerPC BGL | IBM | 700 MHz  | 130 nm  | 95  | 2 / 1
2005  |  IBM z9 | IBM |  |  |  |
2005  | Opteron "Athens" | AMD | 1.6–3.0 GHz  | 90 nm  | 114  | 1 / 1
2005  | Pentium D | Intel | 2.8–3.2 GHz  | 90 nm  | 115  | 1 / 2
2005  | Athlon 64 X2 | AMD | 2–2.4 GHz  | 90 nm  | 243  | 2 / 1
2005  | PowerPC 970MP | IBM | 1.2–2.5 GHz  | 90 nm  | 183  | 2 / 1
2005  | UltraSPARC IV | Sun | 1.05–1.35 GHz  | 130 nm  | 66  | 2 / 1
2005  | UltraSPARC T1 | Sun | 1–1.4 GHz  | 90 nm  | 300  | 8 / 1
2005  | Xenon | IBM | 3.2 GHz  | 90–45 nm  | 165  | 3 / 1
2006  | Core Duo | Intel | 1.1–2.33 GHz  | 90–65 nm  | 151  | 2 / 1
2006  | Core 2 | Intel | 1.06–2.67 GHz  | 65–45 nm  | 291  | 2 / 1, 2
2006  | Cell/B.E. | IBM, Sony, Toshiba | 3.2–4.6 GHz  | 90–45 nm  | 241  | 1+8 / 1
2006  | Itanium "Montecito" | Intel | 1.4–1.6 GHz  | 90 nm  | 1720  | 2 / 1
2007  | POWER6 | IBM | 3.5–4.7 GHz  | 65 nm  | 790  | 2 / 1
2007  | SPARC64 VI | Fujitsu | 2.15–2.4 GHz  | 90 nm  | 543  | 2 / 1
2007  | UltraSPARC T2 | Sun | 1–1.4 GHz  | 65 nm  | 503  | 8 / 1
2007  | TILE64 | Tilera | 600–900 MHz  | 90–45 nm  | ?  | 64 / 1
2007  | Opteron "Barcelona" | AMD | 1.8–3.2 GHz  | 65 nm  | 463  | 4 / 1
2007  | PowerPC BGP | IBM | 850 MHz  | 90 nm  | 208  | 4 / 1
2008  | Phenom | AMD | 1.8–2.6 GHz  | 65 nm  | 450  | 2, 3, 4 / 1
2008  | z10 | IBM | 4.4 GHz  | 65 nm  | 993  | 4 / 7
2008  | PowerXCell 8i | IBM | 2.8–4.0 GHz  | 65 nm  | 250  | 1+8 / 1
2008  | SPARC64 VII | Fujitsu | 2.4–2.88 GHz  | 65 nm  | 600  | 4 / 1
2008  | Atom | Intel | 0.8–1.6 GHz  | 65–45 nm  | 47  | 1 / 1
2008  | Core i7 | Intel | 2.66–3.2 GHz  | 45–32 nm  | 730  | 2, 4, 6 / 1
2008  | TILEPro64 | Tilera | 600–866 MHz  | 90–45 nm  | ?  | 64 / 1
2008  | Opteron "Shanghai" | AMD | 2.3–2.9 GHz  | 45 nm  | 751  | 4 / 1
2009  | Phenom II | AMD | 2.5–3.2 GHz  | 45 nm  | 758  | 2, 3, 4, 6 / 1
2009  | Opteron "Istanbul" | AMD | 2.2–2.8 GHz  | 45 nm  | 904  | 6 / 1

## 2010s

[edit]

A new trend appears, the multi-chip module made of several chiplets. This is multiple monolithic chips in a single package. This allows higher integration with several smaller and easier to manufacture chips.

Date  | Name  | Developer  | Clock  | Process  | Transistors
(millions)  | Cores per die /
Dies per module | Threads
per core

|
|
|
|
|
|
|

2010  | POWER7 | IBM | 3–4.14 GHz  | 45 nm  | 1200  | 4, 6, 8 / 1, 4  | 4
2010  | Itanium "Tukwila" | Intel | 2 GHz  | 65 nm  | 2000  | 2, 4 / 1  | 2
2010  | Opteron "Magny-cours" | AMD | 1.7–2.4 GHz  | 45 nm  | 1810  | 4, 6 / 2  | 1
2010  | Xeon "Nehalem-EX" | Intel | 1.73–2.66 GHz  | 45 nm  | 2300  | 4, 6, 8 / 1  | 2
2010  | z196 | IBM | 3.8–5.2 GHz  | 45 nm  | 1400  | 4 / 1, 6  | 1
2010  | SPARC T3 | Sun | 1.6 GHz  | 45 nm  | 2000  | 16 / 1  | 8
2010  | SPARC64 VII+ | Fujitsu | 2.66–3.0 GHz  | 45 nm  | ?  | 4 / 1  | 2
2010  | Intel "Westmere" | Intel | 1.86–3.33 GHz  | 32 nm  | 1170  | 4–6 / 1  | 2
2011  | Intel "Sandy Bridge" | Intel | 1.6–3.4 GHz  | 32 nm  | 995[68] | 2, 4 / 1  | (1,) 2
2011  | AMD Llano | AMD | 1.0–1.6 GHz  | 40 nm  | 380[69] | 1, 2 / 1  | 1
2011  | Xeon E7 | Intel | 1.73–2.67 GHz  | 32 nm  | 2600  | 4, 6, 8, 10 / 1  | 1–2
2011  | Power ISA BGQ | IBM | 1.6 GHz  | 45 nm  | 1470  | 18 / 1  | 4
2011  | SPARC64 VIIIfx | Fujitsu | 2.0 GHz  | 45 nm  | 760  | 8 / 1  | 2
2011  | FX "Bulldozer" Interlagos | AMD | 3.1–3.6 GHz  | 32 nm  | 1200[70] | 4–8 / 2  | 1
2011  | SPARC T4 | Oracle | 2.8–3 GHz  | 40 nm  | 855  | 8 / 1  | 8
2012  | SPARC64 IXfx | Fujitsu | 1.848 GHz  | 40 nm  | 1870  | 16 / 1  | 2
2012  | zEC12 | IBM | 5.5 GHz  | 32 nm  | 2750  | 6 / 6  | 1
2012  | POWER7+ | IBM | 3.1–5.3 GHz  | 32 nm  | 2100  | 8 / 1, 2  | 4
2012  | Itanium "Poulson" | Intel | 1.73–2.53 GHz  | 32 nm  | 3100  | 8 / 1  | 2
2013  | Intel "Haswell" | Intel | 1.9–4.4 GHz  | 22 nm  | 1400  | 4 / 1  | 2
2013  | SPARC64 X | Fujitsu | 2.8–3 GHz  | 28 nm  | 2950  | 16 / 1  | 2
2013  | SPARC T5 | Oracle | 3.6 GHz  | 28 nm  | 1500  | 16 / 1  | 8
2014  | POWER8 | IBM | 2.5–5 GHz  | 22 nm  | 4200  | 6, 12 / 1, 2  | 8
2014  | Intel "Broadwell" | Intel | 1.8-4 GHz  | 14 nm  | 1900  | 2, 4, 6, 8, 12, 16 / 1, 2, 4  | 2
2015  | z13 | IBM | 5 GHz  | 22 nm  | 3990  | 8 / 1  | 2
2015  | A8-7670K | AMD | 3.6 GHz  | 28 nm  | 2410  | 4 / 1  | 1
2016  | RISC-V E31[71] | SiFive | 320 MHz  | 28 nm  | ?  | 1  | 1
2017  | Zen | AMD | 3.2–4.1 GHz  | 14 nm  | 4800  | 8, 16 / 1, 2, 4  | 2
2017  | z14 | IBM | 5.2 GHz  | 14 nm  | 6100  | 10 / 1  | 2
2017  | POWER9 | IBM | 4 GHz  | 14 nm  | 8000  | 12, 24 / 1  | 4, 8
2017  | SPARC M8[72] | Oracle | 5 GHz  | 20 nm  | ~10,000[73] | 32  | 8
2017  | RISC-V U54-MC[74] | SiFive | 1.5 GHz  | 28 nm  | 250  | 4  | 1
2018  | Intel "Cannon Lake" | Intel | 2.2–3.2 GHz  | 10 nm  | ?  | 2 / 1  | 2
2018  | Zen+ | AMD | 2.8–3.7 GHz  | 12 nm  | 4800  | 2, 4, 6, 8 / 1, 2, 4  | 1, 2
2018  | RISC-V U74-MC[75] | SiFive | 1.5 GHz  | ?  | ?  | 4  | 1
2019  | Zen 2 | AMD | 2–4.7 GHz  | 7 nm, 12nm  | 3900  | 4, 6, 8 / 1, 2, 4, 6, 8  | 2
2019  | z15 | IBM | 5.2 GHz  | 14 nm  | 9200  | 12 / 1  | 2

## 2020s

[edit]

Date  | Name  | Developer  | Clock  | Process  | Transistors
(millions)  | Cores per die /
Dies per module | Threads
per core

|
|
|
|
|
|
|

2020  | Zen 3 | AMD | 3.4–4.9 GHz  | 7 nm, 12nm  | 6240–35290  | 4, 6, 8 / 1, 2, 4, 8  | 2
2020  | M1 Series | Apple  | 3.2 GHz  | 5 nm  | 16000–144000  | 4–8P, 2–4E / 1, 2  | 1
2021  | Alder Lake | Intel | 0.7–5.3 GHz  | 7 nm  | ?  | 0–8P, 2–8E  | 1–2
2022  | IBM Telum | IBM  | >5 GHz  | 7 nm  | 22000  | 8  | 1
2022  | M2 Series | Apple  | 3.49/2.42 GHz  | 5 nm (N5P)  | 20000–134000  | 4–8P, 4E / 1, 2  | 1
2022  | Zen 4 | AMD | 2.0–5.7 GHz  | 5 nm, 7 nm  | 6570  | 4, 6, 8 / 1, 2, 4, 8, 12  | 2
2023  | Zen 4C | AMD | 2.0–3.1 GHz  | 5 nm  | 8200  | 4, 6, 8, 12, 14, 16 / 1, 2, 4, 8  | 1, 2
2023  | M3 Series | Apple  | 4.05/2.75 GHz  | 3 nm  | 25000–92000  | 4–12P, 4–6E  | 1
2023  | Meteor Lake | Intel | 0.7–5.0 GHz  | 5 nm, 7 nm  | ?  | 2–6P, 4–8E, 2LP-E  | 1–2
2024  | Oryon | Qualcomm | 4.3 GHz  | 4 nm  | ?  | 12  | 1
2024  | Zen 5 | AMD | 4.3 GHz  | 5 nm  | 8315-20030  | 6, 8, 16 / 2, 3  | 2

## See also

[edit]

* Electronics portal

* Moore's law
* Transistor count per chip, chronology
* Timeline of instructions per second - architectural chip performance chronology
* Tick–tock model, and its successor:
* Process–architecture–optimization model

## References and notes

[edit]

References

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Notes

* sandpile.org for x86 processor information
* Ogdin, Jerry (January 1975). "Microprocessor scorecard". Euromicro Newsletter. 1 (2): 43–77\. doi:10.1016/0303-1268(75)90008-5.

* v
* t
* e

Processor technologies

Models|

* Abstract machine
* Stored-program computer
* Finite-state machine
* with datapath
* Hierarchical
* Deterministic finite automaton
* Queue automaton
* Cellular automaton
* Quantum cellular automaton
* Turing machine
* Alternating Turing machine
* Universal
* Post–Turing
* Quantum
* Nondeterministic Turing machine
* Probabilistic Turing machine
* Hypercomputation
* Zeno machine
* Belt machine
* Stack machine
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load–store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* Orthogonal instruction set
* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* VISC architecture
* Quantum computing
* Comparison
* Addressing modes

|

Instruction
sets|

* Motorola 68000 series
* VAX
* PDP-11
* x86
* ARM
* Stanford MIPS
* MIPS
* MIPS-X
* Power
* POWER
* PowerPC
* Power ISA
* Clipper architecture
* SPARC
* SuperH
* DEC Alpha
* ETRAX CRIS
* M32R
* Unicore
* Itanium
* OpenRISC
* RISC-V
* MicroBlaze
* LMC
* System/3x0
* S/360
* S/370
* S/390
* z/Architecture
* Tilera ISA
* VISC architecture
* Epiphany architecture
* Others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

|

Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Scoreboarding
* Tomasulo's algorithm
* Reservation station
* Re-order buffer
* Register renaming
* Wide-issue

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

|

Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Simultaneous and heterogenous
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* Array processing (SIMT)
* Pipelined processing
* Associative processing
* SWAR
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Tile processor
* Coprocessor
* PAL
* ASIC
* FPGA
* FPOA
* CPLD
* Multi-chip module (MCM)
* System in a package (SiP)
* Package on a package (PoP)

| By application|

* Embedded system
* Microprocessor
* Microcontroller
* Mobile
* Ultra-low-voltage
* ASIP
* Soft microprocessor

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Cypress PSoC
* Network on a chip (NoC)

Hardware
accelerators|

* Coprocessor
* AI accelerator
* Graphics processing unit (GPU)
* Image processor
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor Processing Unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 4-bit
* 8-bit
* 12-bit
* 15-bit
* 16-bit
* 24-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* bit slicing
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* Scratchpad memory
* Data cache
* Instruction cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional
units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Branch predictor
* Branch target predictor
* Integrated memory controller (IMC)
* Memory management unit
* Instruction decoder

|

Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Memory address register
* Program counter

Control unit|

* Hardwired control unit
* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum-addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model
* Pin grid array
* Chip carrier

*[CADC]: Central Air Data Computer
*[Ref]: Reference(s)
*[v]: View this template
*[t]: Discuss this template
*[e]: Edit this template