Pascal (microarchitecture)

GPU microarchitecture by Nvidia

Pascal

A GTX 1070 Founders Edition graphics based on the Pascal architecture

Launched| May 27, 2016; 9 years ago (2016-05-27)
Designed by| Nvidia
Manufactured by|

*     * TSMC
* Samsung

Fabrication process|

* TSMC 16FF
* Samsung 14 nm

Codename(s)| GP10x
Product Series
Desktop|

* GeForce GTX 10 series

Professional/workstation|

* Quadro P

Server/datacenter|

* Tesla P4

Specifications
L1 cache| 24 KB (per SM)
L2 cache| 256 KB—4 MB
Memory support|

* GDDR5
* GDDR5X
* HBM2

PCIe support| PCIe 3.0
Supported Graphics APIs
DirectX| DirectX 12 (12.1)
Direct3D| Direct3D 12.0
Shader Model| Shader Model 6.7
OpenCL| OpenCL 3.0
OpenGL| OpenGL 4.6
CUDA| Compute Capability 6.0
Vulkan| Vulkan 1.3
Media Engine
Encode codecs|

* H.264
* H.265

Decode codecs|

* H.264
* H.265
* VP9

Color bit-depth|

* 8-bit
* 10-bit

Encoder(s) supported| NVENC
Display outputs|

* DisplayPort 1.4a
* HDMI 2.0b
* DVI

History
Predecessor| Maxwell
Successor|

* Turing (consumer)
* Volta (professional)

Painting of Blaise Pascal, eponym of architecture

Pascal is the codename for a GPU microarchitecture developed by Nvidia, as the successor to the Maxwell architecture. The architecture was first introduced in April 2016 with the release of the Tesla P100 (GP100) on April 5, 2016, and is primarily used in the GeForce 10 series, starting with the GeForce GTX 1080 and GTX 1070 (both using the GP104 GPU), which were released on May 27, 2016, and June 10, 2016, respectively. Pascal was manufactured using TSMC's 16 nm FinFET process,[1] and later Samsung's 14 nm FinFET process.[2]

The architecture is named after the 17th century French mathematician and physicist, Blaise Pascal.

In April 2019, Nvidia enabled a software implementation of DirectX Raytracing on Pascal-based cards starting with the GTX 1060 6 GB, and in the 16 series cards, a feature reserved to the Turing-based RTX series up to that point.[3][4]

## Details

[edit]

Die shot of the GP100 GPU used in Nvidia Tesla P100 cards Die shot of the GP102 GPU found inside GeForce GTX 1080 Ti cards Die shot of the GP106 GPU found inside GTX 1060 cards

In March 2014, Nvidia announced that the successor to Maxwell would be the Pascal microarchitecture; announced on May 6, 2016, and released on May 27 of the same year. The Tesla P100 (GP100 chip) has a different version of the Pascal architecture compared to the GTX GPUs (GP104 chip). The shader units in GP104 have a Maxwell-like design.[5]

Architectural improvements of the GP100 architecture include the following:[6][7][8]

* In Pascal, a SM (streaming multiprocessor) consists of between 64-128 CUDA cores, depending on if it is GP100 or GP104. Maxwell contained 128 CUDA cores per SM; Kepler had 192, Fermi 32 and Tesla 8. The GP100 SM is partitioned into two processing blocks, each having 32 single-precision CUDA cores, an instruction buffer, a warp scheduler, 2 texture mapping units and 2 dispatch units.
* CUDA Compute Capability 6.0.
* High Bandwidth Memory 2 — some cards feature 16 GiB HBM2 in four stacks with a total bus width of 4096 bits and a memory bandwidth of 720 GB/s.
* Unified memory — a memory architecture where the CPU and GPU can access both main system memory and memory on the graphics card with the help of a technology called "Page Migration Engine".
* NVLink — a high-bandwidth bus between the CPU and GPU, and between multiple GPUs. Allows much higher transfer speeds than those achievable by using PCI Express; estimated to provide between 80 and 200 GB/s.[9][10]
* 16-bit (FP16) floating-point operations (colloquially "half precision") can be executed at twice the rate of 32-bit floating-point operations ("single precision")[11] and 64-bit floating-point operations (colloquially "double precision") executed at half the rate of 32-bit floating point operations.[12]
* More registers — twice the amount of registers per CUDA core compared to Maxwell.
* More shared memory.
* Dynamic load balancing scheduling system.[13] This allows the scheduler to dynamically adjust the amount of the GPU assigned to multiple tasks, ensuring that the GPU remains saturated with work except when there is no more work that can safely be distributed to distribute.[13] Nvidia therefore has safely enabled asynchronous compute in Pascal's driver.[13]
* Instruction-level and thread-level preemption.[14]

Architectural improvements of the GP104 architecture include the following:[5]

* CUDA Compute Capability 6.1.
* GDDR5X — new memory standard supporting 10Gbit/s data rates, updated memory controller.[15]
* Simultaneous Multi-Projection - generating multiple projections of a single geometry stream, as it enters the SMP engine from upstream shader stages.[16]
* DisplayPort 1.4, HDMI 2.0b.
* Fourth generation Delta Color Compression.
* Enhanced SLI Interface — SLI interface with higher bandwidth compared to the previous versions.
* PureVideo Feature Set H hardware video decoding HEVC Main10 (10-bit), Main12 (12-bit) and VP9 hardware decoding.
* HDCP 2.2 support for 4K DRM protected content playback and streaming (Maxwell GM200 and GM204 lack HDCP 2.2 support, GM206 supports HDCP 2.2).[17]
* NVENC HEVC Main10 10bit hardware encoding.
* GPU Boost 3.0.
* Instruction-level preemption.[14] In graphics tasks, the driver restricts preemption to the pixel-level, because pixel tasks typically finish quickly and the overhead costs of doing pixel-level preemption are lower than instruction-level preemption (which is expensive).[14] Compute tasks get thread-level or instruction-level preemption,[14] because they can take longer times to finish and there are no guarantees on when a compute task finishes. Therefore the driver enables the expensive instruction-level preemption for these tasks.[14]

##  Overview

[edit]

### Graphics Processor Cluster

[edit]

A chip is partitioned into Graphics Processor Clusters (GPCs). For the GP104 chips, a GPC encompasses 5 SMs.

### Streaming Multiprocessor "Pascal"

[edit]

A "Streaming Multiprocessor" is analogous to AMD's Compute Unit. An SM encompasses 128 single-precision ALUs ("CUDA cores") on GP104 chips and 64 single-precision ALUs on GP100 chips. While all CU versions consist of 64 shader processors (i.e. 4 SIMD Vector Units, each 16 lanes wide), Nvidia experimented with very different numbers of CUDA cores:

* On Tesla, 1 SM combines 8 single-precision (FP32) shader processors
* On Fermi, 1 SM combines 32 single-precision (FP32) shader processors
* On Kepler, 1 SM combines 192 single-precision (FP32) shader processors and 64 double-precision (FP64) units (on GK110 GPUs)
* On Maxwell, 1 SM combines 128 single-precision (FP32) shader processors
* On Pascal, it depends:
* On GP100, 1 SM combines 64 single-precision (FP32) shader processors and also 32 double-precision (FP64) providing a 2:1 ratio of single- to double-precision throughput. The GP100 uses more flexible FP32 cores that are able to process one single-precision or two half-precision numbers in a two-element vector.[18] This is intended to better serve machine learning tasks.
* On GP104, 1 SM combines 128 single-precision ALUs, 4 double-precision ALUs (providing a 32:1 ratio), and one half-precision ALU which contains a vector of two half-precision floats which can execute the same instruction on both floats, providing a 64:1 ratio if the same instruction is used on both elements.

### Polymorph-Engine 4.0

[edit]

The Polymorph Engine version 4.0 is the unit responsible for Tessellation. It corresponds functionally with AMD's Geometric Processor. It has been moved from the shader module to the TPC to allow one Polymorph engine to feed multiple SMs within the TPC.[19]

### Chips

[edit]

GTX 1080 Ti PCB and die

* GP100: Nvidia's Tesla P100 GPU accelerator is targeted at GPGPU applications such as FP64 double precision compute and deep learning training that uses FP16. It uses HBM2 memory.[20] Quadro GP100 also uses the GP100 GPU.
* GP102: This GPU is used in the Titan Xp,[21] Titan X Pascal[22] and the GeForce GTX 1080 Ti. It is also used in the Quadro P6000[23] & Tesla P40.[24]
* GP104: This GPU is used in the GeForce GTX 1070, GTX 1070 Ti, GTX 1080, and some GTX 1060 6 GB's. The GTX 1070 has 15/20 and the GTX 1070 Ti has 19/20 of its SMs enabled; both utilize GDDR5 memory. The GTX 1080 is a fully unlocked chip and uses GDDR5X memory. Some GTX 1060 6 GB's use GP104 with 10/20 SMs enabled and GDDR5X memory.[25] It is also used in the Quadro P5000, Quadro P4000, Quadro P3200 (mobile applications) and Tesla P4.
* GP106: This GPU is used in the GeForce GTX 1060 with GDDR5[26] memory.[27][28] It is also used in the Quadro P2000.
* GP107: This GPU is used in the GeForce GTX 1050 and 1050 Ti. It is also used in the Quadro P1000, Quadro P600, Quadro P620 & Quadro P400.
* GP108: This GPU is used in the GeForce GT 1010 and GeForce GT 1030.

Comparison table of some Kepler, Maxwell, and Pascal chips  | GK104 | GK110 | GM204 (GTX 970) | GM204 (GTX 980) | GM200 | GP104 | GP100

|
|
|
|
|
|
|

Dedicated texture cache per SM | 48 KiB | — | — | — | — | — | —
Texture (graphics or compute) or read-only data (compute only) cache per SM | — | 48 KiB[29] | — | — | — | — | —
Programmer-selectable shared memory/L1 partitions per SM | 48 KiB shared memory + 16 KiB L1 cache (default)[30] | 48 KiB shared memory + 16 KiB L1 cache (default)[30] | — | — | — | — | —
32 KiB shared memory + 32 KiB L1 cache[30] | 32 KiB shared memory + 32 KiB L1 cache[30]
16 KiB shared memory + 48 KiB L1 cache[30] | 16 KiB shared memory + 48 KiB L1 cache[30]
Unified L1 cache/texture cache per SM | — | — | 48 KiB[31] | 48 KiB[31] | 48 KiB[31] | 48 KiB[31] | 24 KiB[31]
Dedicated shared memory per SM | — | — | 96 KiB[31] | 96 KiB[31] | 96 KiB[31] | 96 KiB[31] | 64 KiB[31]
L2 cache per chip | 512 KiB[31] | 1536 KiB[31] | 1792 KiB[32] | 2048 KiB[32] | 3072 KiB[31] | 2048 KiB[31] | 4096 KiB[31]

## Performance

[edit]

The theoretical single-precision processing power of a Pascal GPU in GFLOPS is computed as 2 × operations per FMA instruction per CUDA core per cycle × number of CUDA cores × core clock speed (in GHz).

The theoretical double-precision processing power of a Pascal GPU is 1/2 of the single precision performance on Nvidia GP100, and 1/32 of Nvidia GP102, GP104, GP106, GP107 & GP108.

The theoretical half-precision processing power of a Pascal GPU is 2× of the single precision performance on GP100[12] and 1/64 on GP104, GP106, GP107 & GP108.[18]

## Successor

[edit]

The Pascal architecture was succeeded in 2017 by Volta in the HPC, cloud computing, and self-driving car markets, and in 2018 by Turing in the consumer and business market.[33]

## P100 accelerator and DGX-1

[edit]

Comparison of accelerators used in DGX:[34][35][36]

Model | Architecture | Socket | FP32
CUDA
cores | FP64 cores
(excl. tensor) | Mixed
INT32/FP32
cores | INT32
cores | Boost
clock | Memory
clock | Memory
bus width | Memory
bandwidth | VRAM | Single
precision
(FP32) | Double
precision
(FP64) | INT8
(non-tensor) | INT8
dense tensor | INT32 | FP4
dense tensor | FP16 | FP16
dense tensor | bfloat16
dense tensor | TensorFloat-32
(TF32)
dense tensor | FP64
dense tensor | Interconnect
(NVLink) | GPU | L1 Cache | L2 Cache | TDP | Die size | Transistor
count | Process | Launched

|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|

P100  | Pascal | SXM/SXM2 | 3584 | 1792 | N/A | N/A | 1480 MHz | 1.4 Gbit/s HBM2 | 4096-bit | 720 GB/sec | 16 GB HBM2 | 10.6 TFLOPS | 5.3 TFLOPS | N/A | N/A | N/A | N/A | 21.2 TFLOPS | N/A | N/A | N/A | N/A | 160 GB/sec | GP100 | 1344 KB (24 KB × 56) | 4096 KB | 300 W | 610 mm2 | 15.3 B | TSMC 16FF+ | Q2 2016
V100 16GB  | Volta | SXM2 | 5120 | 2560 | N/A | 5120 | 1530 MHz | 1.75 Gbit/s HBM2 | 4096-bit | 900 GB/sec | 16 GB HBM2 | 15.7 TFLOPS | 7.8 TFLOPS | 62 TOPS | N/A | 15.7 TOPS | N/A | 31.4 TFLOPS | 125 TFLOPS | N/A | N/A | N/A | 300 GB/sec | GV100 | 10240 KB (128 KB × 80) | 6144 KB | 300 W | 815 mm2 | 21.1 B | TSMC 12FFN | Q3 2017
V100 32GB  | Volta | SXM3 | 5120 | 2560 | N/A | 5120 | 1530 MHz | 1.75 Gbit/s HBM2 | 4096-bit | 900 GB/sec | 32 GB HBM2 | 15.7 TFLOPS | 7.8 TFLOPS | 62 TOPS | N/A | 15.7 TOPS | N/A | 31.4 TFLOPS | 125 TFLOPS | N/A | N/A | N/A | 300 GB/sec | GV100 | 10240 KB (128 KB × 80) | 6144 KB | 350 W | 815 mm2 | 21.1 B | TSMC 12FFN
A100 40GB  | Ampere | SXM4 | 6912 | 3456 | 6912 | N/A | 1410 MHz | 2.4 Gbit/s HBM2 | 5120-bit | 1.52 TB/sec | 40 GB HBM2 | 19.5 TFLOPS | 9.7 TFLOPS | N/A | 624 TOPS | 19.5 TOPS | N/A | 78 TFLOPS | 312 TFLOPS | 312 TFLOPS | 156 TFLOPS | 19.5 TFLOPS | 600 GB/sec | GA100 | 20736 KB (192 KB × 108) | 40960 KB | 400 W | 826 mm2 | 54.2 B | TSMC N7 | Q1 2020
A100 80GB  | Ampere | SXM4 | 6912 | 3456 | 6912 | N/A | 1410 MHz | 3.2 Gbit/s HBM2e | 5120-bit | 1.52 TB/sec | 80 GB HBM2e | 19.5 TFLOPS | 9.7 TFLOPS | N/A | 624 TOPS | 19.5 TOPS | N/A | 78 TFLOPS | 312 TFLOPS | 312 TFLOPS | 156 TFLOPS | 19.5 TFLOPS | 600 GB/sec | GA100 | 20736 KB (192 KB × 108) | 40960 KB | 400 W | 826 mm2 | 54.2 B | TSMC N7
H100  | Hopper | SXM5 | 16896 | 4608 | 16896 | N/A | 1980 MHz | 5.2 Gbit/s HBM3 | 5120-bit | 3.35 TB/sec | 80 GB HBM3 | 67 TFLOPS | 34 TFLOPS | N/A | 1.98 POPS | N/A | N/A | N/A | 990 TFLOPS | 990 TFLOPS | 495 TFLOPS | 67 TFLOPS | 900 GB/sec | GH100 | 25344 KB (192 KB × 132) | 51200 KB | 700 W | 814 mm2 | 80 B | TSMC 4N | Q3 2022
H200  | Hopper | SXM5 | 16896 | 4608 | 16896 | N/A | 1980 MHz | 6.3 Gbit/s HBM3e | 6144-bit | 4.8 TB/sec | 141 GB HBM3e | 67 TFLOPS | 34 TFLOPS | N/A | 1.98 POPS | N/A | N/A | N/A | 990 TFLOPS | 990 TFLOPS | 495 TFLOPS | 67 TFLOPS | 900 GB/sec | GH100 | 25344 KB (192 KB × 132) | 51200 KB | 1000 W | 814 mm2 | 80 B | TSMC 4N | Q3 2023
B100  | Blackwell | SXM6 | N/A | N/A | N/A | N/A | N/A | 8 Gbit/s HBM3e | 8192-bit | 8 TB/sec | 192 GB HBM3e | N/A | N/A | N/A | 3.5 POPS | N/A | 7 PFLOPS | N/A | 1.98 PFLOPS | 1.98 PFLOPS | 989 TFLOPS | 30 TFLOPS | 1.8 TB/sec | GB100 | N/A | N/A | 700 W | N/A | 208 B | TSMC 4NP | Q4 2024 (expected)
B200  | Blackwell | SXM6 | N/A | N/A | N/A | N/A | N/A | 8 Gbit/s HBM3e | 8192-bit | 8 TB/sec | 192 GB HBM3e | N/A | N/A | N/A | 4.5 POPS | N/A | 9 PFLOPS | N/A | 2.25 PFLOPS | 2.25 PFLOPS | 1.2 PFLOPS | 40 TFLOPS | 1.8 TB/sec | GB100 | N/A | N/A | 1000 W | N/A | 208 B | TSMC 4NP

## See also

[edit]

* List of eponyms of Nvidia GPU microarchitectures
* List of Nvidia graphics processing units
* Nvidia NVDEC
* Nvidia NVENC

## References

[edit]

1. ^ "NVIDIA 7nm Next-Gen-GPUs To Be Built By TSMC". Wccftech. June 24, 2018. Retrieved July 6, 2019.
2. ^ "Samsung to Optical-Shrink NVIDIA "Pascal" to 14 nm". Retrieved August 13, 2016.
3. ^ "Accelerating The Real-Time Ray Tracing Ecosystem: DXR For GeForce RTX and GeForce GTX". NVIDIA.
4. ^ "Ray Tracing Comes to Nvidia GTX GPUs: Here's How to Enable It". April 11, 2019.
5. ^ a b "NVIDIA GeForce GTX 1080" (PDF). International.download.nvidia.com. Retrieved September 15, 2016.
6. ^ Gupta, Sumit (March 21, 2014). "NVIDIA Updates GPU Roadmap; Announces Pascal". Blogs.nvidia.com. Retrieved March 25, 2014.
7. ^ "Parallel Forall". NVIDIA Developer Zone. Devblogs.nvidia.com. Archived from the original on March 26, 2014. Retrieved March 25, 2014.
8. ^ "NVIDIA Tesla P100" (PDF). International.download.nvidia.com. Retrieved September 15, 2016.
9. ^ "Inside Pascal: NVIDIA's Newest Computing Platform". April 5, 2016.
10. ^ Denis Foley (March 25, 2014). "NVLink, Pascal and Stacked Memory: Feeding the Appetite for Big Data". nvidia.com. Retrieved July 7, 2014.
11. ^ "NVIDIA's Next-Gen Pascal GPU Architecture to Provide 10X Speedup for Deep Learning Apps". The Official NVIDIA Blog. Retrieved March 23, 2015.
12. ^ a b Smith, Ryan (April 5, 2015). "NVIDIA Announces Tesla P100 Accelerator - Pascal GP100 Power for HPC". AnandTech. Archived from the original on April 6, 2016. Retrieved May 27, 2016. "Each of those SMs also contains 32 FP64 CUDA cores - giving us the 1/2 rate for FP64 - and new to the Pascal architecture is the ability to pack 2 FP16 operations inside a single FP32 CUDA core under the right circumstances"
13. ^ a b c Smith, Ryan (July 20, 2016). "The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation". AnandTech. p. 9\. Archived from the original on July 23, 2016. Retrieved July 21, 2016.
14. ^ a b c d e Smith, Ryan (July 20, 2016). "The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation". AnandTech. p. 10\. Archived from the original on July 24, 2016. Retrieved July 21, 2016.
15. ^ "GTX 1080 Graphics Card". GeForce. Retrieved September 15, 2016.
16. ^ Carbotte, Kevin (May 17, 2016). "Nvidia GeForce GTX 1080 Simultaneous Multi-Projection & Async Compute". Tomshardware.com. Retrieved September 15, 2016.
17. ^ "Nvidia Pascal HDCP 2.2". Nvidia Hardware Page. Retrieved May 8, 2016.
18. ^ a b Smith, Ryan (July 20, 2016). "The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation". AnandTech. p. 5\. Archived from the original on July 23, 2016. Retrieved July 21, 2016.
19. ^ Smith, Ryan (July 20, 2016). "The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation". AnandTech. p. 4\. Archived from the original on July 23, 2016. Retrieved July 21, 2016.
20. ^ Harris, Mark (April 5, 2016). "Inside Pascal: NVIDIA's Newest Computing Platform". Parallel Forall. Nvidia. Retrieved June 3, 2016.
21. ^ "NVIDIA TITAN Xp Graphics Card with Pascal Architecture". NVIDIA.
22. ^ "NVIDIA TITAN X Graphics Card with Pascal". GeForce. Retrieved September 15, 2016.
23. ^ "New Quadro Graphics Built on Pascal Architecture". NVIDIA. Retrieved September 15, 2016.
24. ^ "Accelerating Data Center Workloads with GPUs". NVIDIA. Retrieved September 15, 2016.
25. ^ Zhiye Liu (October 22, 2018). "Nvidia GeForce GTX 1060 Gets GDDR5X in Fifth Makeover". Tom's Hardware. Retrieved February 2, 2024.
26. ^ "NVIDIA GeForce 10 Series Graphics Cards". NVIDIA.
27. ^ "NVIDIA GeForce GTX 1060 to be released on July 7th". VideoCardz.com. June 29, 2016. Retrieved September 15, 2016.
28. ^ "GTX 1060 Graphics Cards". GeForce. Retrieved September 15, 2016.
29. ^ Smith, Ryan (November 12, 2012). "NVIDIA Launches Tesla K20 & K20X: GK110 Arrives At Last". AnandTech. p. 3\. Archived from the original on November 14, 2012. Retrieved July 24, 2016.
30. ^ a b c d e f Nvidia (September 1, 2015). "CUDA C Programming Guide". Retrieved July 24, 2016.
31. ^ a b c d e f g h i j k l m n o Triolet, Damien (May 24, 2016). "Nvidia GeForce GTX 1080, le premier GPU 16nm en test !". Hardware.fr (in French). p. 2. Retrieved July 24, 2016.
32. ^ a b Smith, Ryan (January 26, 2015). "GeForce GTX 970: Correcting The Specs & Exploring Memory Allocation". AnandTech. p. 1\. Archived from the original on January 28, 2015. Retrieved July 24, 2016.
33. ^ "NVIDIA Turing Release Date". Techradar. February 2, 2021.
34. ^ Smith, Ryan (March 22, 2022). "NVIDIA Hopper GPU Architecture and H100 Accelerator Announced: Working Smarter and Harder". AnandTech.
35. ^ Smith, Ryan (May 14, 2020). "NVIDIA Ampere Unleashed: NVIDIA Announces New GPU Architecture, A100 GPU, and Accelerator". AnandTech.
36. ^ "NVIDIA Tesla V100 tested: near unbelievable GPU power". TweakTown. September 17, 2017.

* v
* t
* e

Nvidia

GeForce (List of GPUs)

| Fixed pixel pipeline|

| Pre-GeForce|

* NV1
* NV2

* RIVA 128
* RIVA TNT
* TNT2

|

*  GeForce 256
* 2
* 4 MX

Vertex and pixel shaders|

* GeForce 3
* 4 Ti
* FX
* 6
* 7

Unified shaders|

* GeForce 8
* 9
* 100
* 200
* 300
* 400
* 500

Unified shaders & NUMA|

* GeForce 600
* 700
* 800M
* 900
* 10
* 16

Ray tracing & Tensor Cores|

* GeForce 20
* 30
* 40
* 50

Software and technologies

| Multimedia acceleration|

* NVENC (video encoding)
* NVDEC (video decoding)
* PureVideo (video decoding)

|

Software|

* Cg (shading language)
* CUDA
* Nvidia GameWorks
* OptiX (ray tracing API)
* PhysX (physics SDK)
* Nvidia Omniverse (3D graphics)
* Nvidia RTX (ray tracing platform)
* Nvidia System Tools
* VDPAU (video decode API)

Technologies|

* Nvidia 3D Vision (stereo 3D)
* Nvidia G-Sync (variable refresh rate)
* Nvidia Optimus (GPU switching)
* Nvidia Surround (multi-monitor)
* MXM (module/socket)
* SXM (module/socket)
* NVLink (protocol)
* Scalable Link Interface (multi-GPU)
* TurboCache (framebuffer in system memory)
* Video Super Resolution (live video upscaling)

GPU microarchitectures|

* Celsius
* Kelvin
* Rankine
* Curie
* Tesla
* Fermi
* Kepler
* Maxwell
* Pascal
* Volta
* Turing
* Ampere
* Hopper
* Ada Lovelace
* Blackwell
* Rubin
* Feynman

Other products

| Graphics Workstation cards|

* Nvidia Quadro
* Quadro Plex

|

GPGPU|

* Nvidia Tesla
* DGX

Console components|

* NV2A (Xbox)
* RSX 'Reality Synthesizer' (PlayStation 3)
* Tegra NX-SoC (Nintendo Switch)

Nvidia Shield|

* Shield Portable
* Shield Tablet
* Shield Android TV
* GeForce Now

SoCs and embedded|

* GoForce
* Drive
* Jetson
* Tegra

CPUs|

* Project Denver

Computer chipsets|

* nForce

Company

| Key people|

* Jen-Hsun Huang
* Chris Malachowsky
* Curtis Priem
* David Kirk
* Bill Dally
* Debora Shoquist
* Ranga Jayaraman
* Jonah M. Alben

|

Acquisitions|

* 3dfx Interactive
* Ageia
* ULi
* Bright Computing
* Cumulus Networks
* DeepMap
* Icera
* Mellanox Technologies
* Mental Images
* PortalPlayer
* Exluna
* MediaQ
* Stexar

*[v]: View this template
*[t]: Discuss this template
*[e]: Edit this template