R2000 microprocessor

The R2000 is a 32-bit microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in May 1986, it was one of the first commercial implementations of a RISC architecture, preceded only by the IBM RT PC.[1] The R2000 competed with Digital Equipment Corporation (DEC) VAX minicomputers and with Motorola 68020 and Intel Corporation 80386 microprocessors. R2000 users included Ardent Computer, DEC, Silicon Graphics, Northern Telecom and MIPS's own Unix workstations. The "first confirmed customer" of the R2000 was Prime Computer.[2]

The chip set consisted of the R2000 microprocessor, R2010 floating-point accelerator, and four R2020 write buffer chips. The core R2000 chip executed all non-floating-point instructions with a simple short pipeline. This chip also controlled the external code and data caches, made of fast standard SRAM chips organized with direct indexing and one-cycle read latency. The R2000 chip contained a small translation lookaside buffer for mapping virtual memory addresses. The R2010 chip held the floating point registers, floating point data paths, and their longer simple pipeline. Writes to main memory DRAM took tens of cycles to fully complete. But the R2020 chips queued and completed up to 4 pending writes to main memory, allowing the R2000 core to proceed without stalling itself. In the absence of cache misses, this chip set sustained an instruction completion rate of one instruction per ALU cycle. This was more efficient than non-RISC microprocessors of that time, which needed several cycles per instruction. The initial R2000A, clocked at 12.5 MHz, offered 8-10 Million integer Instructions Per Second (MIPS), or 0.9 Million FLoating Point Operations Per Second (MFLOPS), and would appear in the like of the 1987 SGI IRIS 4D and 1988 DECstation 2100 workstations.[3][4] 1986 also saw similar technology in Sun's first SPARC microprocessor, Hewlett Packard's first PA-RISC microprocessor, and the first Acorn RISC Machine (ARM) evaluation kits shipping to developers.[5]

Overall speed was limited by the cache size and cache cycle time. The R2000 chip set and SRAM was initially sold only as a complete circuit board to ensure good cache bus timings. In 1987 system builders began using the chip set in arbitrary new board designs.

The R2000 was available in 8.3, 12.5 and 15 MHz grades. The die contained 110,000 transistors and measured 80 mm2 in a 2.0 μm double-metal CMOS process. MIPS was a fabless semiconductor company, that is, they did not have the capability to fabricate integrated circuits. The chip set was initially fabricated for MIPS by Sierra Semiconductor and Toshiba. In December 1987, MIPS licensed Integrated Device Technology, LSI Logic, and Performance Semiconductor to also fabricate and market the R2000. Sierra and Toshiba continued to serve as foundries.

LSI fabricated the chip set in its 2.0 μm double-metal CMOS process and marketed it as the LR2000. Performance Semiconductor fabricated the chip set in its PACE-I 0.8 μm double-metal CMOS process and marketed it as the PR2000.

In 1988, an improved version was introduced, the R2000A. It was composed of the R2000A and R2010A ICs. It operated at 12.5 and 16.67 MHz. It has been used extensively in embedded applications such as printer controllers.

In 1988, the R2000 was followed by the R3000, using a similar overall system design but faster chip implementation.

## References

[edit]

1. ^ Connolly, James (12 May 1986). "MIPS Computer Systems jumps into OEM mart with RISC-based products". Computerworld. p. 34. Retrieved 29 June 2025.
2. ^ "MIPS Unveils 10 MIPS CMOS RISC Board Set". Unigram/X. 17 May 1986. p. 1. Retrieved 29 June 2025.
3. ^ "Personal IRIS - 4D-20 One-sheet". 1988.
4. ^ "DECstation 2100". Archived from the original on 2023-06-03. Retrieved 2024-08-20.`{{cite web}}`: CS1 maint: bot: original URL status unknown (link)
5. ^ "Acorn Computers Announce The Availability Of An Evaluation System For Their Single Chip, 32-Bit Reduced Instruction Set Computer - The Arm" (PDF) (Press release). Acorn Computers Limited. 7 July 1986. Retrieved 29 June 2025.

* Furber, Stephen Bo (1989). VLSI RISC Architecture and Organization. p. 132\. CRC Press.

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MIPS microprocessors

* MIPS architecture
* MIPS architecture processors
* List of MIPS architecture processors

General
processors|

| MIPS64
compatible|

* Loongson 3 Series
* LS3A1000/LS3A1000-I(LS3A1000-i)
* LS3A2000/LS3A1500-I
* LS3A3000/LS3A3000-I(LS3A3000-i)
* LS3A4000/LS3A4000-I(LS3A4000-i)
* LS3B1000
* LS3B1500
* LS3B2000
* LS3B3000
* LS3B4000

|

Application
processors|

| MIPS32
compatible|

* Ingenic XBurst
* JZ4720
* Ben NanoNote
* JZ4730 (Skytone Alpha-400)
* JZ4740 (Dingoo A320)
* JZ4750 (Game Gadget)
* JZ4760
* Velocity Micro T103 Cruz
* Velocity Micro T301 Cruz
* JZ4770
* Ainol Novo7 Paladin
* NEOGEO-X
* GCW-Zero
* JZ4780

|

MIPS64
compatible|

* Loongson 2 Series
* LS2H
* LS2K1000/LS2K2000

Microcontrollers
(embedded device)|

| M4K|

* Microchip Technology PIC32MX

|

4Kc/4KEc|

* ATI/AMD/Broadcom Xilleon

MIPS32
compatible|

* Loongson 1 Series
* LS1A0300
* LS1B
* LS1C300
* LS1C101
* LS1D
* LS1G
* LS1H

Networking|

| 4Kc/4KEc|

* Qualcomm Atheros
* AR2313
* AR2318
* MediaTek
* RT2880
* Texas Instruments/Infineon/Lantiq
* AR7
* Lantiq
* AMAZON

|

5Kc|

* Marvell
* 88E6318 "Link Street"

24Kc/24KEc|

* Qualcomm Atheros
* AR7240
* AR7161
* AR9132
* AR9331
* MediaTek
* RT3050
* RT3052
* RT3350
* RT5350
* RT6856
* MT7620
* MT7628
* MT7688
* Lantiq
* DANUBE
* VINAX

34Kc|

* Lantiq
* AR188
* VRX288
* GRX388
* Ikanos
* Fusiv Vx175/173
* Fusiv Vx180
* Fusiv Vx185/183

74Kc|

* Qualcomm Atheros
* AR9344
* QCA9558
* MediaTek
* RT3662
* RT3883
* Broadcom
* BCM4706

1004Kc|

* MediaTek
* MT7621

1074Kc|

* Realtek
* RTL8198C

MIPS32
compatible|

* Broadcom
* various
* Cavium
* various
* Alchemy Semiconductor
* Alchemy
* RMI Corporation
* XLR

MIPS64
compatible|

* Broadcom
* various
* Cavium
* Octeon

Gaming|

| various|

* PlayStation 1 MIPS R3000A-compatible
* Nintendo 64 NEC VR4300
* PlayStation Portable R4000-based
* PlayStation 2 Emotion Engine

|

Supercomputer|

| MIPS64
compatible|

* Loongson-based systems
* LS2F/LS2F1000
* LS3A1000
* LS3B1000
* SiCortex

|

Aerospace|

| MIPS64
compatible|

* Loongson 1 Series
* LS1E0300/LS1E1000

|

MIPS32
compatible|

* Loongson 1 Series
* LS1E04
* LS1F04/LS1F0300
* LS1J

Classic
processors|

| MIPS I|

* R2000
* R3000

|

MIPS II|

* R6000

MIPS III|

* R4000
* R4400
* R4200
* R4300i
* R4600
* R4700

MIPS IV|

* R5000
* R8000
* R10000
* R12000
* R12000A
* R14000
* R14000A
* R16000
* R16000A
* R18000

MIPS V|

* H1 "Beast"
* H2 "Capitan"

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