VEGA Microprocessors

Type of microprocessor developed in India

VEGA Microprocessors

VEGA Processor logo

General information
Designed by| Centre for Development of Advanced Computing
Common manufacturers|

* Semi-Conductor Laboratory[1]
* SilTerra[2]

Architecture and classification
Application| IoT, storage, smart NICs, edge analytics, data analytics, autonomous machines, networking
Instruction set| RISC-V
Variant|

* VEGA ET1031

VEGA Microprocessors (also known as VEGA Processors) is an initiative to develop a portfolio of microprocessors, and their hardware ecosystem, by the Centre for Development of Advanced Computing (C-DAC) in India.[3][4] The portfolio includes several indigenously-developed processors based on the RISC-V instruction set architecture (ISA).[5][6][7]

The India Microprocessor Development Programme was started by the Ministry of Electronics and Information Technology with the objective of designing a set of microprocessors, and developing a product line for commercial purposes, to be used as part of a "Make in India" strategy.[8][9]

## Products

[edit]

The initiative has developed the following product lines:[7]

* VEGA microprocessors
* ASTRA interface controllers
* THEJAS system on a chip \- integrating VEGA and ASTRA devices
* ARIES microprocessor development boards

### VEGA

[edit]

The initiative has developed 5 RISC-V microprocessors that run on FPGAs boards.[10] The ET1031 is a 32-bit processor, with all other processors being 64-bit.[10] Only the 32-bit variant has been physically manufactured within a THEJAS SOC.[11]

Together with affiliated institutions, C-DAC seeks to acquire 10% of the microprocessor market in critical industries like space exploration and defense, where data security is crucial. C-DAC is developing a dual-core chip for high-end applications under the India Microprocessor Development Programme, and the chip is expected to be released in the second half of 2023. From 2024 forward, Dhanush64, Dhruv64, and Dhanush64+ will be released, followed by Octa-core in 2026. Beyond Octa-core, C-DAC chips will feature 48 or 64 cores once the microprocessor and high-performance computing processor programs have converged.[9][12]

### THEJAS

[edit]

From the VEGA processor cores, 2 SOCs have been created running on the Digilent ARTY A7 FPGA.[10] Only the THEJAS32 has been taped-out for manufacturing for the ARIES microcontroller boards.[11]

#### Swadeshi Microprocessor Challenge

[edit]

On December 7, 2021, the Ministry of Electronics and Information Technology honored the Swadeshi Microprocessor Challenge winners. At different phases of the challenge, participants get up to ₹4.40 crore in funding for the development of a hardware prototype and the incubation of a start-up by participating teams. C-DAC and IIT Madras made accessible for the challenge their SoCs, THEJAS32 and THEJAS64, based on VEGA 32-bit and 64-bit processors and Shakti. The participating teams successfully implemented the SoCs in a variety of designs. Ten teams became victorious from the 30 finalist teams. Team VEGA FCS FT (AI drone), received a ₹35 lakh cheque for their drone application; second-place winners, Team HWDL, received ₹30 lakh for FM Radio Data System Utilities; and third-place winners, Cytox, received ₹25 lakh for their "cell count" project. Each of the other teams received a check for ₹20 lakh for sharing fourth place. The teams are Astrek Innovations (lower limb exosuit for disabled), Team 6E Resources (remote monitoring and optimization of sewage treatment plant), Team Anshashodhak (unique calibration system for nuclear spectroscopy applications), Team Quicproc (wireless maternal monitoring system), Team Avrio Energy (AI Energy Meter with intelligence at edge and deep learning), and Team JayHawks (anti-theft geofencing based locking system).[13][12]

Thirty finalist teams of the Swadeshi Microprocessor Challenge have been awarded incubation support by Maker Village, the largest electronic system design and production center in India.[14]

### ARIES

[edit]

The ARIES microcontroller boards have been described by researchers as alternatives to Arduino Uno boards.[7][15]

As of May 2023, the ARIES v3.0 board can be purchased for "around 1,000 Rs each, or about $12".[11] It can be programmed with the Arduino IDE.[11]

## Commercialization

[edit]

On August 28, 2024, L&T Semiconductor Technologies (LTSCT) and C-DAC signed a memorandum of understanding (MoU). It will establish a program for the commercialization of cutting-edge technologies created by C-DAC in the areas of electric power systems, embedded software, free and open-source software operating systems, high-performance computing, and semiconductor design and development. LTSCT will leverage C-DAC's extensive pipeline of in-house intellectual property (IP), which includes the VEGA processor, to create global product prospects through application design and validation for field-programmable gate arrays. By facilitating the creation of cutting-edge goods and solutions for the automotive, industrial, information and communications technology infrastructure, and energy sectors, the collaboration to create indigenous ICs and SoCs based in Vega is expected to pick up speed.[16][17]

## References

[edit]

1. ^ Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs" (PDF). Centre for Development of Advanced Computing. Retrieved 4 September 2024.
2. ^ Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs" (PDF). Centre for Development of Advanced Computing. Retrieved 4 September 2024.
3. ^ "CDAC all set to develop crucial technology indigenously". The Times of India. 30 March 2019. Retrieved 27 October 2021.
4. ^ "India to build 11 new supercomputers, with indigenous processors developed by C-DAC". The Print. 22 December 2019. Retrieved 27 October 2021.
5. ^ "India Preps RISC-V Processors". 27 January 2016. Retrieved 27 October 2021.
6. ^ "Design and Implementation of a RISC-V ISA-based In-order Dual Issue Superscalar Processor" (PDF). RISC-V Summit. 5 December 2018. Retrieved 27 October 2021.
7. ^ a b c Kaur, Roopmeet; Dash, Biswajeet; Shiney O., Jeba; Singh, Sukhpreet (19 July 2023). "Revolutionizing CanSat Technology with Vega Processors: A Comparative Study". 2023 2nd International Conference on Edge Computing and Applications (ICECAA). pp. 1276–1282\. doi:10.1109/ICECAA58104.2023.10212104. ISBN 979-8-3503-4757-9. S2CID 260935210. Retrieved 17 January 2024.
8. ^ "स्वदेशी Microprocessor Challenge - Innovate Solutions for #आत्मनिर्भर भारत". My Gov India. Retrieved 27 October 2021.
9. ^ a b Nair, Ardhra (2023-02-04). "CDAC hopes to corner 10% of microprocessor market". The Times of India. ISSN 0971-8257. Retrieved 2024-09-05.
10. ^ a b c Aufranc, Jean-Luc (4 February 2022). "India goes RISC-V with VEGA processors - CNX Software". CNX Software - Embedded Systems News. CNXSoft. Retrieved 19 January 2024.
11. ^ a b c d Aufranc, Jean-Luc (31 May 2023). "ARIES v3.0 development board features India-made VEGA RISC-V processor - CNX Software". CNX Software - Embedded Systems News. CNXSoft. Retrieved 19 January 2024.
12. ^ a b Rao, S Krishnakumar (3 December 2021). "VEGA Processors: Making India AtmaNirbhar in Swadeshi Compute Designs" (PDF). Centre for Development of Advanced Computing. Retrieved 4 September 2024.
13. ^ "MeitY felicitates winners of microprocessor challenge; participants get financial support". Business Today. 2021-12-07. Retrieved 2024-09-05.
14. ^ "Maker Village of Digital University Kera to incubate 10 winners of Swadeshi Microprocessor Challenge". English.Mathrubhumi. 2021-12-10. Retrieved 2024-09-05.
15. ^ Sharma, Devansh; Kumar, Ashish; Dhall, Aryan; Tomar, Riya; Pundir, Vikrant Singh; Bhandari, Hemant (November 2023). "Efficient Parking & Toll Management: A RFID-Enabled Approach with Vega Aries Development Board" (PDF). International Journal of Innovative Science and Research Technology. 8 (11): 1559–1564. Retrieved 17 January 2024.
16. ^ "L&T Semiconductor Technologies Inks MoU with C-DAC". www.larsentoubro.com. Retrieved 2024-09-04.
17. ^ "L&T Semiconductor, C-DAC sign pact to jointly work on indigenous chip tech". Business Standard. 28 August 2024. Retrieved 5 September 2024.

## External links

[edit]

* Official website
* VEGA Microprocessors's channel on YouTube
* CNX Software: Article

* v
* t
* e

Reduced instruction set computer (RISC) architectures

Origins|

* IBM 801
* Berkeley RISC
* Stanford MIPS

Development
active|

* Analog Devices Blackfin
* ARC
* ARM
* AVR
* eSi-RISC
* LatticeMico8, LatticeMico32
* MIPS
* OpenRISC
* Power ISA
* Renesas M32R, SuperH, V850
* RISC-V
* SPARC
* Sunway
* Unicore
* Xilinx MicroBlaze, PicoBlaze

Development
discontinued|

* Alpha
* AMD Am29000
* Apollo PRISM
* Atmel AVR32
* Clipper
* CR16
* CRISP
* DEC PRISM
* Intel i860, i960
* META
* MIPS-X
* Motorola 88000, M·CORE
* PA-RISC
* POWER, PowerPC (active use in space exploration as RAD750), ROMP

* v
* t
* e

Processor technologies

Models|

* Abstract machine
* Stored-program computer
* Finite-state machine
* with datapath
* Hierarchical
* Deterministic finite automaton
* Queue automaton
* Cellular automaton
* Quantum cellular automaton
* Turing machine
* Alternating Turing machine
* Universal
* Post–Turing
* Quantum
* Nondeterministic Turing machine
* Probabilistic Turing machine
* Hypercomputation
* Zeno machine
* Belt machine
* Stack machine
* Register machines
* Counter
* Pointer
* Random-access
* Random-access stored program

Architecture|

* Microarchitecture
* Von Neumann
* Harvard
* modified
* Dataflow
* Transport-triggered
* Cellular
* Endianness
* Memory access
* NUMA
* HUMA
* Load–store
* Register/memory
* Cache hierarchy
* Memory hierarchy
* Virtual memory
* Secondary storage
* Heterogeneous
* Fabric
* Multiprocessing
* Cognitive
* Neuromorphic

Instruction set
architectures|

| Types|

* Orthogonal instruction set
* CISC
* RISC
* Application-specific
* EDGE
* TRIPS
* VLIW
* EPIC
* MISC
* OISC
* NISC
* ZISC
* VISC architecture
* Quantum computing
* Comparison
* Addressing modes

|

Instruction
sets|

* Motorola 68000 series
* VAX
* PDP-11
* x86
* ARM
* Stanford MIPS
* MIPS
* MIPS-X
* Power
* POWER
* PowerPC
* Power ISA
* Clipper architecture
* SPARC
* SuperH
* DEC Alpha
* ETRAX CRIS
* M32R
* Unicore
* Itanium
* OpenRISC
* RISC-V
* MicroBlaze
* LMC
* System/3x0
* S/360
* S/370
* S/390
* z/Architecture
* Tilera ISA
* VISC architecture
* Epiphany architecture
* Others

Execution|

| Instruction pipelining|

* Pipeline stall
* Operand forwarding
* Classic RISC pipeline

|

Hazards|

* Data dependency
* Structural
* Control
* False sharing

Out-of-order|

* Scoreboarding
* Tomasulo's algorithm
* Reservation station
* Re-order buffer
* Register renaming
* Wide-issue

Speculative|

* Branch prediction
* Memory dependence prediction

Parallelism|

| Level|

* Bit
* Bit-serial
* Word
* Instruction
* Pipelining
* Scalar
* Superscalar
* Task
* Thread
* Process
* Data
* Vector
* Memory
* Distributed

|

Multithreading|

* Temporal
* Simultaneous
* Hyperthreading
* Simultaneous and heterogenous
* Speculative
* Preemptive
* Cooperative

Flynn's taxonomy|

* SISD
* SIMD
* Array processing (SIMT)
* Pipelined processing
* Associative processing
* SWAR
* MISD
* MIMD
* SPMD

Processor
performance|

* Transistor count
* Instructions per cycle (IPC)
* Cycles per instruction (CPI)
* Instructions per second (IPS)
* Floating-point operations per second (FLOPS)
* Transactions per second (TPS)
* Synaptic updates per second (SUPS)
* Performance per watt (PPW)
* Cache performance metrics
* Computer performance by orders of magnitude

Types|

* Central processing unit (CPU)
* Graphics processing unit (GPU)
* GPGPU
* Vector
* Barrel
* Stream
* Tile processor
* Coprocessor
* PAL
* ASIC
* FPGA
* FPOA
* CPLD
* Multi-chip module (MCM)
* System in a package (SiP)
* Package on a package (PoP)

| By application|

* Embedded system
* Microprocessor
* Microcontroller
* Mobile
* Ultra-low-voltage
* ASIP
* Soft microprocessor

|

Systems
on chip|

* System on a chip (SoC)
* Multiprocessor (MPSoC)
* Cypress PSoC
* Network on a chip (NoC)

Hardware
accelerators|

* Coprocessor
* AI accelerator
* Graphics processing unit (GPU)
* Image processor
* Vision processing unit (VPU)
* Physics processing unit (PPU)
* Digital signal processor (DSP)
* Tensor Processing Unit (TPU)
* Secure cryptoprocessor
* Network processor
* Baseband processor

Word size|

* 1-bit
* 4-bit
* 8-bit
* 12-bit
* 15-bit
* 16-bit
* 24-bit
* 32-bit
* 48-bit
* 64-bit
* 128-bit
* 256-bit
* 512-bit
* bit slicing
* others
* variable

Core count|

* Single-core
* Multi-core
* Manycore
* Heterogeneous architecture

Components|

* Core
* Cache
* CPU cache
* Scratchpad memory
* Data cache
* Instruction cache
* replacement policies
* coherence
* Bus
* Clock rate
* Clock signal
* FIFO

| Functional
units|

* Arithmetic logic unit (ALU)
* Address generation unit (AGU)
* Floating-point unit (FPU)
* Memory management unit (MMU)
* Load–store unit
* Translation lookaside buffer (TLB)
* Branch predictor
* Branch target predictor
* Integrated memory controller (IMC)
* Memory management unit
* Instruction decoder

|

Logic|

* Combinational
* Sequential
* Glue
* Logic gate
* Quantum
* Array

Registers|

* Processor register
* Status register
* Stack register
* Register file
* Memory buffer
* Memory address register
* Program counter

Control unit|

* Hardwired control unit
* Instruction unit
* Data buffer
* Write buffer
* Microcode ROM
* Counter

Datapath|

* Multiplexer
* Demultiplexer
* Adder
* Multiplier
* CPU
* Binary decoder
* Address decoder
* Sum-addressed decoder
* Barrel shifter

Circuitry|

* Integrated circuit
* 3D
* Mixed-signal
* Power management
* Boolean
* Digital
* Analog
* Quantum
* Switch

Power
management|

* PMU
* APM
* ACPI
* Dynamic frequency scaling
* Dynamic voltage scaling
* Clock gating
* Performance per watt (PPW)

Related|

* History of general-purpose CPUs
* Microprocessor chronology
* Processor design
* Digital electronics
* Hardware security module
* Semiconductor device fabrication
* Tick–tock model
* Pin grid array
* Chip carrier

* v
* t
* e

Programmable logic

Concepts|

* ASIC
* SoC
* FPGA
* Logic block
* CPLD
* EPLD
* PLA
* PAL
* GAL
* PSoC
* Reconfigurable computing
* Xputer
* Soft microprocessor
* Circuit underutilization
* High-level synthesis
* Hardware acceleration

Languages|

* Verilog
* A
* AMS
* VHDL
* AMS
* VITAL
* SystemVerilog
* DPI
* SystemC
* AHDL
* Handel-C
* Lola
* PSL
* UPF
* PALASM
* ABEL
* CUPL
* C to HDL
* Flow to HDL
* MyHDL
* ELLA
* Chisel

Companies|

* Accellera
* Achronix
* AMD
* Aldec
* Arm
* Cadence
* Infineon
* Intel
* Lattice
* Microchip Technology
* NXP
* Siemens
* Synopsys
* Texas Instruments

Products|

| Hardware|

* iCE
* Stratix
* Virtex

|

Software|

* Intel Quartus Prime
* Xilinx ISE
* Vivado
* ModelSim
* VTR
* Simulators

Intellectual
property|

| Proprietary|

* ARC
* ARM Cortex-M
* LEON
* LatticeMico8
* MicroBlaze
* PicoBlaze
* Nios
* Nios II

|

Open-source|

* JOP
* LatticeMico32
* OpenCores
* OpenRISC
* 1200
* Power ISA
* Libre-SOC
* Microwatt
* RISC-V

* v
* t
* e

Microcontrollers

Main|

* Single-board microcontroller
* Special function register

Architectures|

* 68000
* 8051
* ARC
* ARM
* AVR
* MIPS
* MPS430
* PIC
* RISC-V
* x86

Word length|

| 4-bit|

* Am2900
* COP400
* MARC4
* PPS-4
* S1C6x
* TLCS-47
* TMS1000
* μCOM-4

|

8-bit|

* 6800
* 68HC05
* 68HC08
* 68HC11
* S08
* RS08
* 6502
* 65C134
* 65C265
* MELPS 740
* 78K
* 8048
* 8051
* XC800
* AVR
* COP8
* H8
* PIC10/12/16/17/18
* ST6/ST7
* STM8
* Z8
* Z80
* eZ80
* Rabbit 2000
* TLCS-870

16-bit|

* 65C816
* 68HC12/16
* 80186
* C166
* CR16/C
* H8S
* MSP430
* PIC24/dsPIC
* R8C
* RL78
* TLCS-900
* Z8000

32-bit|

* Am29000
* ARC
* ARM Cortex-M
* EFM32
* LPC
* SAM
* STM32
* XMC
* ARM Cortex-R
* AVR32
* CRX
* FR
* FR-V
* H8SX
* M32R
* MN103
* 68000
* ColdFire
* PIC32
* PowerPC
* MPC5xx
* Propeller
* SuperH
* TLCS-900
* TriCore
* V850
* RX
* Xtensa
* Z80000

64-bit|

* ARC
* ARM Cortex-R
* PowerPC64

Interfaces|

| Programming|

* In-circuit serial programming (ICSP)
* In-system programming (ISP)
* Program and Debug Interface (PDI)
* High-voltage serial programming (HVSP)
* High voltage parallel programming (HVPP)
* Bootloader
* ROM
* aWire

|

Debugging|

* Nexus (standard)
* Joint Test Action Group (JTAG)
* debugWIRE (Atmel)
* In-circuit debugging (ICD)
* In-circuit emulator (ICE)
* In-target probe (ITP)

Lists|

* List of common microcontrollers
* By manufacturer
* Intel
* NXP/Freescale
* Infineon
* Renesas Electronics
* List of Wi-Fi microcontrollers

See also|

* Embedded system
* Programmable logic controller
* List of microprocessors

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