Xilinx

American technology company

Xilinx, Inc.

Headquarters in the United States

Company type| Subsidiary
Industry| Integrated circuits
Founded| 1984; 40 years ago (1984)[1]
Founders|

* James V. Barnett II
* Ross Freeman
* Bernie Vonderschmitt

Defunct| June 6, 2023; 8 months ago (2023-06-06)
Fate| Acquired by AMD in 2022 and Xilinx's generic branding phased out in 2023
Headquarters| San Jose, California, U.S.

Area served

| Worldwide

Key people

* Dennis Segers (chairman)
* Victor Peng (president, CEO)
* Brice Hill (CFO)[2]
* Ivo Bolsens (CTO)

Products| FPGAs, CPLDs
Revenue|  US$3.15 billion (2021)[3]

Operating income

|  US$753 million (2021)[3]

Net income

|  US$646 million (2021)[3]
Total assets|  US$5.52 billion (2021)[3]
Total equity|  US$2.89 billion (2021)[3]

Number of employees

| 4,890 (April 2021)[3]
Parent| AMD
Website| www.xilinx.com

Xilinx, Inc. (/ˈzaɪlɪŋks/ ZY-links) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is known for inventing the first commercially viable field-programmable gate array (FPGA) and creating the first fabless manufacturing model.[4][5][6]

Xilinx was co-founded by Ross Freeman, Bernard Vonderschmitt, and James V Barnett II in the year 1984. The company went public on the NASDAQ in the year 1990.[7][8] AMD announced its acquisition of Xilinx in October 2020 and the deal was completed on February 14, 2022, through an all-stock transaction worth an estimated $60 billion.[9][10] Xilinx remained a wholly owned subsidiary of AMD until the brand was phased out in June 2023, with Xilinx's product lines now branded under AMD.[11]

## Company overview[edit]

Xilinx was founded in Silicon Valley in 1984 and is headquartered in San Jose, United States, with additional offices in Longmont, United States; Dublin, Ireland; Singapore; Hyderabad, India; Beijing, China; Shanghai, China; Brisbane, Australia, Tokyo, Japan and Yerevan, Armenia.[12][13]

According to Bill Carter, former CTO and current[when?] fellow at Xilinx, the choice of the name Xilinx refers to the chemical symbol for silicon Si.[14][how?][failed verification] The "linx" represents programmable links that connect programmable logic blocks together. The 'X's at each end represent the programmable logic blocks.[15][citation needed]

Xilinx sells a broad range of FPGAs, complex programmable logic devices (CPLDs), design tools, intellectual property and reference designs.[16] Xilinx customers represent just over half of the entire programmable logic market, at 51%.[16][5][17] Altera (now subsidiary of Intel) is Xilinx's strongest competitor with 34% of the market. Other key players in this market are Actel (now subsidiary of Microsemi), and Lattice Semiconductor.[6]

## History[edit]

### Early history[edit]

Ross Freeman, Bernard Vonderschmitt, and James V Barnett II—all former employees of Zilog, an integrated circuit and solid-state device manufacturer—co-founded Xilinx in 1984 with headquarters in San Jose, USA.[12][15]

While working for Zilog, Freeman wanted to create chips that acted like a blank tape, allowing users to program the technology themselves.[15] "The concept required lots of transistors and, at that time, transistors were considered extremely precious—people thought that Ross's idea was pretty far out", said Xilinx Fellow Bill Carter, hired in 1984 to design ICs as Xilinx's eighth employee.[15]

It was at the time more profitable to manufacture generic circuits in massive volumes[12] than specialized circuits for specific markets.[12] FPGAs promised to make specialized circuits profitable.

Freeman could not convince Zilog to invest in FPGAs to chase a market then estimated at $100 million,[12] so he and Barnett left to team up with Vonderschmitt, a former colleague. Together, they raised $4.5 million in venture funding to design the first commercially viable FPGA.[12] They incorporated the company in 1984 and began selling its first product by 1985.[12]

By late 1987, the company had raised more than $18 million in venture capital (equivalent to $46.37 million in 2022) and was making nearly $14 million a year.[12][18]

### Expansion[edit]

From 1988 to 1990, the company's revenue grew each year, from $30 million to $100 million.[12] During this time, Monolithic Memories Inc. (MMI), the company which had been providing funding to Xilinx, was purchased by AMD.[12] As a result, Xilinx dissolved the deal with MMI and went public on the NASDAQ in 1989.[12] The company also moved to a 144,000-square-foot (13,400 m2) plant in San Jose, California, to handle increasingly large orders from HP, Apple Inc., IBM and Sun Microsystems.[12]

Other FPGA makers emerged in the mid-1990s.[12] By 1995, the company reached $550 million in revenue.[12] Over the years, Xilinx expanded operations to India, Asia and Europe.[19][20][21][22]

Xilinx's sales rose to $2.53 billion by the end of its fiscal year 2018.[23] Moshe Gavrielov – an EDA and ASIC industry veteran who was appointed president and CEO in early 2008 – introduced targeted design platforms that combine FPGAs with software, IP cores, boards and kits to address focused target applications.[24] These targeted design platforms are an alternative to costly application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs).[25][26][27]

On January 4, 2018, Victor Peng, the company's COO, replaced Gavrielov as CEO.[28]

### Recent history[edit]

Logo of Xilinx until AMD acquisition

In 2011, the company introduced the Virtex-7 2000T, the first product based on 2.5D stacked silicon (based on silicon interposer technology) to deliver larger FPGAs than could be built using standard monolithic silicon.[14] Xilinx then adapted the technology to combine formerly separate components in a single chip, first combining an FPGA with transceivers based on heterogeneous process technology to boost bandwidth capacity while using less power.[29]

According to former Xilinx CEO Moshe Gavrielov, the addition of a heterogeneous communications device, combined with the introduction of new software tools and the Zynq-7000 line of 28 nm SoC devices that combine an ARM core with an FPGA, are part of shifting its position from a programmable logic device supplier to one delivering “all things programmable”.[30]

In addition to Zynq-7000, Xilinx product lines include the Virtex, Kintex and Artix series, each including configurations and models optimized for different applications.[31] In April 2012, the company introduced the Vivado Design Suite \- a next-generation SoC-strength design environment for advanced electronic system designs.[32] In May, 2014, the company shipped the first of the next generation FPGAs: the 20 nm UltraScale.[33]

In September 2017, Amazon.com and Xilinx started a campaign for FPGA adoption. This campaign enables AWS Marketplace's Amazon Machine Images (AMIs) with associated Amazon FPGA Instances created by partners. The two companies released software development tools to simplify the creation of FPGA technology. The tools create and manage the machine images created and sold by partners.[34][35]

In July 2018, Xilinx acquired DeepPhi Technology, a Chinese machine learning startup founded in 2016.[36][37] In October 2018, the Xilinx Virtex UltraScale+ FPGAs and NGCodec's H.265 video encoder were used in a cloud-based video coding service using the High Efficiency Video Coding (HEVC).[38] The combination enables video streaming with the same visual quality as that using GPUs, but at 35%-45% lower bitrate.[39]

In November 2018, the company's Zynq UltraScale+ family of multiprocessor system-on-chips was certified to Safety Integrity Level (SIL) 3 HFT1 of the IEC 61508 specification.[40][41] With this certification, developers are able to use the MPSoC platform in AI-based safety- applications of up to SIL 3, in industrial 4.0 platforms of automotive, aerospace, and AI systems.[42][43] In January 2019, ZF Friedrichshafen AG (ZF) worked with Xilinx's Zynq to power its ProAI automotive control unit, which is used to enable automated driving applications.[44][45][46] Xilinx's platform overlooks the aggregation, pre-processing, and distribution of real-time data, and accelerates the AI processing of the unit.[40][47]

In November 2018, Xilinx migrated its defense-grade XQ UltraScale+ products to TSMC's 16 nm FinFET Process.[48][49][50] The products included the industry's first Defense-grade heterogeneous multi-processor SoC devices and encompassed the XQ Zynq UltraScale+ MPSoCs and RFSoCs as well as XQ UltraScale+ Kintex and Virtex FPGAs.[51][52] That same month the company expanded its Alveo data center accelerator cards portfolio with the Alveo U280.[53] The initial Alveo line included the U200 and U250, which featured 16 nm UltraScale+ Virtex FPGAs and DDR4 SDRAM.[54] Those two cards were launched in October 2018 at the Xilinx Developer Forum.[55] At the Forum, Victor Peng, CEO of semiconductor design at Xilinx, and AMD CTO Mark Papermaster, used eight Alveo U250 cards and two AMD Epyc 7551 server CPUs to set a new world record for inference throughput at 30,000 images per second.[55]

Also in November 2018, Xilinx announced that Dell EMC was the first server vendor to qualify its Alveo U200 accelerator card, used to accelerate key HPC and other workloads with select Dell EMC PowerEdge servers.[56] The U280 included support for high-bandwidth memory (HBM2) and high-performance server interconnect.[57] In August 2019, Xilinx launched the Alveo U50, a low-profile adaptable accelerator with PCIe Gen4 support.[58][59] The U55C accelerator card was launched in November 2021, designed for HPCC and big data workloads by incorporating the RoCE v2-based clustering solution, allowing for FPGA-based HPCC clustering to be integrated into existing data center infrastructures.[60]

In January 2019 K&L Gates, a law firm representing Xilinx sent a DMCA cease and desist letter to an EE YouTuber claiming trademark infringement for featuring the Xilinx logo next to Altera's in an educational video.[61][62] Xilinx refused to reply until a video outlining the legal threat was published, after which they sent an apology e-mail.[63]

In January 2019, Baidu announced that its new edge acceleration computing product, EdgeBoard, was powered by Xilinx.[64][65] Edgeboard is a part of the Baidu Brain AI Hardware Platform Initiative, which encompasses Baidu's open computing services, and hardware and software products for its edge AI applications.[66] Edgeboard is based on the Xilinx Zynq UltraScale+ MPSoC, which uses real-time processors together with programmable logic.[67][68] The Xilinx-based Edgeboard can be used to develop products like smart-video security surveillance solutions, advanced-driver-assistance systems, and next-generation robots.[69][70]

In February 2019, the company announced two new generations of its Zynq UltraScale+ RF system on chip (RFSoC) portfolio.[71] The device covers the entire sub-6 GHz spectrum, which is necessary for 5G, and the updates included: an extended millimeter wave interface, up to 20% power reduction in the RF data converter subsystem compared to the base portfolio, and support of 5G New Radio.[72] The second generation release covered up to 5 GHz, while the third went up to 6 GHz.[73] As of February, the portfolio was the only adaptable radio platform single chip that had been designed to address the industry's 5G network needs.[74] The second announcement revealed that Xilinx and Samsung Electronics performed the world's first 5G New Radio (NR) commercial deployment in South Korea.[75][76] The two companies developed and deployed 5G Massive Multiple-input, Multiple-output (m-MIMO) and millimeter wave (mmWave) products using Xilinx's UltraScale+ platform.[75] The capabilities are essential for 5G commercialization.[76] The companies also announced collaboration on Xilinx's Versal adaptable compute acceleration platform (ACAP) products that will deliver 5G services.[77] In February 2019, Xilinx introduced an HDMI 2.1 IP subsystem core, which enabled the company's devices to transmit, receive, and process up to 8K (7680 x 4320 pixels) UHD video in media players, cameras, monitors, LED walls, projectors, and kernel-based virtual machines.[78][79]

In April 2019, Xilinx entered into a definitive agreement to acquire Solarflare Communications, Inc.[80][81] Xilinx became a strategic investor in Solarflare in 2017.[81][82] The companies have been collaborating since then on advanced networking technology, and in March 2019 demonstrated their first joint solution: a single-chip FPGA-based 100G NIC. The acquisition enables Xilinx to combine its FPGA, MPSoC and ACAP solutions[buzzword] with Solarflare's NIC technology.[83][80][84] In August 2019, Xilinx announced that the company would be adding the world's largest FPGA - the Virtex Ultrascale+ VU19P, to the 16 nm Virtex Ultrascale+ family. The VU19P contains 35 billion transistors.[85][86][87]

In June 2019, Xilinx announced that it was shipping its first Versal chips.[88] Using ACAP, the chips’ hardware and software can be programmed to run almost any kind of AI software.[89][90] On October 1, 2019, Xilinx announced the launch of Vitis, a unified free and open source software platform that helps developers take advantage of hardware adaptability.[91][92][93]

In 2019, Xilinx exceeded $3 billion in annual revenues for the first time, announcing revenues of $3.06 billion, up 24% from the prior fiscal year.[94][95] Revenues were $828 million for the fourth quarter of the fiscal year 2019, up 4% from the prior quarter and up 30% year over year.[96] Xilinx's Communications sector represented 41% of the revenue; the industrial, aerospace and defense sectors represented 27%; the Data Center and Test, Measurement & Emulation (TME) sectors accounted for 18%; and the automotive, broadcast and consumer markets contributed 14%.[97]

In August 2020, Subaru announced the use of one of Xilinx's chips as processing power for camera images in its driver-assistance system.[98] In September 2020, Xilinx announced its new chipset, the T1 Telco Accelerator card, that can be used for units running on an open RAN 5G network.[99]

On October 27, 2020, AMD reached an agreement to acquire Xilinx in a stock-swap deal, valuing the company at $35 billion. The deal was expected to close by the end of 2021.[100] Their stockholders approved the acquisition on April 7, 2021.[101] The deal was completed on February 14, 2022.[102] Since the acquisition was completed, all Xilinx products are co-branded as AMD Xilinx; started in June 2023, all Xilinx's products are now being consolidated under AMD's branding.

In December 2020, Xilinx announced they were acquiring the assets of Falcon Computing Systems to enhance the free and open source Vitis platform, a design software for adaptable processing engines to enable highly optimized domain specific accelerators.[103]

In April 2021, Xilinx announced a collaboration with Mavenir to boost cell phone tower capacity for open 5G networks.[104] That same month, the company unveiled the Kria portfolio, a line of small form factor system-on-modules (SOMs) that come with a pre-built software stack to simplify development.[105] In June, Xilinx announced it was acquiring German software developer Silexica, for an undisclosed amount.[106]

## Technology[edit]

The Spartan-3 platform was the industry's first 90nm FPGA, delivering more functionality and bandwidth per dollar than was previously possible.

This section has multiple issues. Please help improve it or discuss these issues on the talk page. (Learn how and when to remove these template messages)

This section may contain an excessive amount of intricate detail that may interest only a particular audience. Please help by spinning off or relocating any relevant information, and removing excessive detail that may be against Wikipedia's inclusion policy. (March 2020) (Learn how and when to remove this template message)

|

This section contains content that is written like an advertisement. Please help improve it by removing promotional content and inappropriate external links, and by adding encyclopedic content written from a neutral point of view. (June 2020) (Learn how and when to remove this template message)

|

(Learn how and when to remove this template message)

Xilinx designs and develops programmable logic products, including integrated circuits (ICs), software design tools, predefined system functions delivered as intellectual property (IP) cores, design services, customer training, field engineering and technical support.[16] Xilinx sells both FPGAs and CPLDs for electronic equipment manufacturers in end markets such as communications, industrial, consumer, automotive and data processing.[107][108][109][110][111][112][113]

Xilinx's FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles.[114] Xilinx has also engaged in a partnership with the United States Air Force Research Laboratory's Space Vehicles Directorate to develop FPGAs to withstand the damaging effects of radiation in space, which are 1,000 times less sensitive to space radiation than the commercial equivalent, for deployment in new satellites.[115] Xilinx FPGAs can run a regular embedded OS (such as Linux or vxWorks) and can implement processor peripherals in programmable logic.[16] The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families, which include up to two embedded IBM PowerPC cores, are targeted to the needs of system-on-chip (SoC) designers.[116][117][118]

Xilinx's IP cores include IP for simple functions (BCD encoders, counters, etc.), for domain specific cores (digital signal processing, FFT and FIR cores) to complex systems (multi-gigabit networking cores, the MicroBlaze soft microprocessor and the compact Picoblaze microcontroller).[16] Xilinx also creates custom cores for a fee.[citation needed]

The main design toolkit Xilinx provides engineers is the Vivado Design Suite, an integrated design environment (IDE) with a system-to-IC level tools built on a shared scalable data model and a common debug environment. Vivado includes electronic system level (ESL) design tools for synthesizing and verifying C-based algorithmic IP; standards based packaging of both algorithmic and RTL IP for reuse; standards based IP stitching and systems integration of all types of system building blocks; and the verification of blocks and systems.[119] A free version WebPACK Edition of Vivado provides designers with a limited version of the design environment.[120]

Xilinx's Embedded Developer's Kit (EDK) supports the embedded PowerPC 405 and 440 cores (in Virtex-II Pro and some Virtex-4 and -5 chips) and the Microblaze core. Xilinx's System Generator for DSP implements DSP designs on Xilinx FPGAs. A freeware version of its EDA software called ISE WebPACK is used with some of its non-high-performance chips. Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis toolchain.[121]

Xilinx announced the architecture for a new ARM Cortex-A9-based platform for embedded systems designers, that combines the software programmability of an embedded processor with the hardware flexibility of an FPGA.[122][123] The new architecture abstracts much of the hardware burden away from the embedded software developers' point of view, giving them an unprecedented level of control in the development process.[124][125][122][123] With this platform, software developers can leverage their existing system code based on ARM technology and utilize vast off-the-shelf open-source and commercially available software component libraries.[124][125][122][123] Because the system boots an OS at reset, software development can get under way quickly within familiar development and debug environments using tools such as ARM's RealView development suite and related third-party tools, Eclipse-based IDEs, GNU, the Xilinx Software Development Kit and others.[124][125][122][123] In early 2011, Xilinx began shipping the Zynq-7000 SoC platform immerses ARM multi-cores, programmable logic fabric, DSP data paths, memories and I/O functions in a dense and configurable mesh of interconnect.[126][127] The platform targets embedded designers working on market applications that require multi-functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless.[124][125][122][123]

Following the introduction of its 28 nm 7-series FPGAs, Xilinx revealed that several of the highest-density parts in those FPGA product lines will be constructed using multiple dies in one package, employing technology developed for 3D construction and stacked-die assemblies.[128][129] The company's stacked silicon interconnect (SSI) technology stacks several (three or four) active FPGA dies side by side on a silicon interposer – a single piece of silicon that carries passive interconnect. The individual FPGA dies are conventional, and are flip-chip mounted by microbumps on to the interposer. The interposer provides direct interconnect between the FPGA dies, with no need for transceiver technologies such as high-speed SerDes.[128][129][130] In October 2011, Xilinx shipped the first FPGA to use the new technology, the Virtex-7 2000T FPGA, which includes 6.8 billion transistors and 20 million ASIC gates.[131][132][133][134] The following spring, Xilinx used 3D technology to ship the Virtex-7 HT, the industry's first heterogeneous FPGAs, which combine high bandwidth FPGAs with a maximum of sixteen 28 Gbit/s and seventy-two 13.1 Gbit/s transceivers to reduce power and size requirements for key Nx100G and 400G line card applications and functions.[135][136]

In January 2011, Xilinx acquired design tool firm AutoESL Design Technologies and added System C high-level design for its 6- and 7-series FPGA families.[137] The addition of AutoESL tools extended the design community for FPGAs to designers more accustomed to designing at a higher level of abstraction using C, C++ and System C.[138]

In April 2012, Xilinx introduced a revised version of its toolset for programmable systems, called Vivado Design Suite. This IP and system-centric design software supports newer high capacity devices, and speeds the design of programmable logic and I/O.[139] Vivado provides faster integration and implementation for programmable systems into devices with 3D stacked silicon interconnect technology, ARM processing systems, analog mixed signal (AMS), and many semiconductor intellectual property (IP) cores.[140]

In July 2019, Xilinx acquired NGCodec, developers of FPGA accelerated video encoders for video streaming, cloud gaming and cloud mixed reality services. NGCodec video encoders include support for H.264/AVC, H.265/HEVC, VP9 and AV1, with planned future support for H.266/VVC and AV2.[141][142]

In May 2020, Xilinx installed its first Adaptive Compute Cluster (XACC) at ETH Zurich in Switzerland.[143] The XACCs provide infrastructure and funding to support research in adaptive compute acceleration for high performance computing (HPC).[143] The clusters include high-end servers, Xilinx Alveo accelerator cards, and high speed networking.[144] Three other XACCs will be installed at the University of California, Los Angeles (UCLA); the University of Illinois at Urbana Champaign (UIUC); and the National University of Singapore (NUS).[143][145]

## Family lines of products[edit]

CPLD Xilinx XC9536XL

Before 2010, Xilinx offered two main FPGA families: the high-performance Virtex series and the high-volume Spartan series, with a cheaper EasyPath option for ramping to volume production.[31] The company also provides two CPLD lines: the CoolRunner and the 9500 series. Each model series has been released in multiple generations since its launch.[146] With the introduction of its 28 nm FPGAs in June 2010, Xilinx replaced the high-volume Spartan family with the Kintex family and the low-cost Artix family.[147][148]

Xilinx's newer FPGA products use a High-K Metal Gate (HKMG) process, which reduces static power consumption while increasing logic capacity.[149] In 28 nm devices, static power accounts for much and sometimes most of the total power dissipation. Virtex-6 and Spartan-6 FPGA families are said to consume 50 percent less power, and have up to twice the logic capacity compared to the previous generation of Xilinx FPGAs.[117][150][151]

In June 2010, Xilinx introduced the Xilinx 7 series: the Virtex-7, Kintex-7, and Artix-7 families, promising improvements in system power, performance, capacity, and price. These new FPGA families are manufactured using TSMC's 28 nm HKMG process.[152] The 28 nm series 7 devices feature a 50 percent power reduction compared to the company's 40 nm devices and offer capacity of up to 2 million logic cells.[147] Less than one year after announcing the 7 series 28 nm FPGAs, Xilinx shipped the world's first 28 nm FPGA device, the Kintex-7.[153][154] In March 2011, Xilinx introduced the Zynq-7000 family, which integrates a complete ARM Cortex-A9 MPCore processor-based system on a 28 nm FPGA for system architects and embedded software developers.[126][127] In May 2017, Xilinx expanded the 7 Series with the production of the Spartan-7 family.[155][156]

In Dec, 2013, Xilinx introduced the UltraScale series: Virtex UltraScale and Kintex UltraScale families. These new FPGA families are manufactured by TSMC in its 20 nm planar process.[157] At the same time it announced an UltraScale SoC architecture, called Zynq UltraScale+ MPSoC, in TSMC 16 nm FinFET process.[158]

In March 2021, Xilinx announced a new cost-optimized portfolio with Artix and Zynq UltraScale+ devices, fabricated on TSMC's 16 nm process.[159]

### Virtex family[edit]

Main article: Virtex (FPGA)

The Virtex series of FPGAs have integrated features that include FIFO and ECC logic, DSP blocks, PCI-Express controllers, Ethernet MAC blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores.[160] These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.[161]

The Virtex 7 family, is based on a 28 nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866 Mbit/s memory interfacing performance and over two million logic cells.[147][148]

In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an interposer) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs – roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA.[131][132][133] In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28Gbit/s transceiver die in the same package.[30]

The Virtex-6 family is built on a 40 nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40 nm FPGAs.[162]

The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications.[163] With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65 nm design fabricated in 1.0 V, triple-oxide process technology.[164]

Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.

### Kintex[edit]

A Xilinx Kintex UltraScale FPGA (XCKU025-FFVA1156) on a Matrox frame grabber

The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 12.5 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks.[147][148]

In August 2018, SK Telecom deployed Xilinx Kintex UltraScale FPGAs as their artificial intelligence accelerators at their data centers in South Korea.[165] The FPGAs run SKT's automatic speech-recognition application to accelerate Nugu, SKT's voice-activated assistant.[165][166]

In July, 2020 Xilinx made the latest addition to their Kintex family, 'KU19P FPGA' which delivers more logic fabric and embedded memory[167]

### Artix[edit]

A Artix-7 FPGA (XC7A35T-CSG325)

The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. The Artix family is designed to address the small form factor and low-power performance requirements of battery-powered portable ultrasound equipment, commercial digital camera lens control, and military avionics and communications equipment.[147][148] With the introduction of the Spartan-7 family in 2017, which lack high-bandwidth transceivers, the Artix-7's was clarified as being the "transceiver optimized" member.[168]

### Zynq[edit]

A Zynq-7000 (XC7Z010-CLG400) on a Adapteva Parallella single-board computer

The Zynq-7000 family of SoCs addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation.[126][127][169] Zynq-7000 integrate a complete ARM Cortex-A9 MPCore-processor-based 28 nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.[126][127][169] For software developers, Zynq-7000 appear the same as a standard, fully featured ARM processor-based system-on-chip (SOC), booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic.[126][127][169] In 2013, Xilinx introduced the Zynq-7100, which integrates digital signal processing (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.[170]

The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core.[32][140] Xilinx's new Vivado Design Suite addressed this issue, because the software was developed for higher capacity FPGAs, and it included high level synthesis (HLS) functionality that allows engineers to compile the co-processors from a C-based description.[32][140]

The AXIOM,[171] the world's first digital cinema camera that is open source hardware, contains a Zynq-7000.[172]

### Spartan family[edit]

Xilinx 3S250, Spartan-3E FPGA family

The Spartan series targets low cost, high-volume applications with a low-power footprint e.g. displays, set-top boxes, wireless routers and other applications.[173]

The Spartan-6 family is built on a 45 nm, 9-metal layer, dual-oxide process technology.[150][174] The Spartan-6 was marketed in 2009 as a low-cost option for automotive, wireless communications, flat-panel display and video surveillance applications.[174]

The Spartan-7 family, built on the same 28 nm process used in the other 7-Series FPGAs, was announced in 2015,[155] and became available in 2017.[156] Unlike the Artix-7 family and the "LXT" members of the Spartan-6 family, the Spartan-7 FPGAs lack high-bandwidth transceivers.[168]

### EasyPath[edit]

Because EasyPath devices are identical to the FPGAs that customers are already using the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.[175]

### Versal[edit]

Versal is Xilinx's 7 nm architecture that targets heterogeneous computing needs in datacenter acceleration applications, in artificial intelligence acceleration at the edge, Internet of Things (IoT) applications and embedded computing.

The Everest program focuses on the Versal Adaptive Compute Acceleration Platform (ACAP), a product category combining a traditional FPGA fabric with an ARM system on chip and a set of coprocessors, connected through a network on a chip.[176] Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads.[177] They are designed for a wide range of applications in the fields of big data and machine learning, including video transcoding, database querying, data compression, search, AI inferencing, machine vision, computer vision, autonomous vehicles, genomics, computational storage and network acceleration.[176]

On April 15, 2020, it was announced that Xilinx would supply its Versal chips to Samsung Electronics for 5G networking equipment.[178] In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with HBM2e memory to alleviate data bottlenecking.[179]

## See also[edit]

* Companies portal
* San Francisco Bay Area portal

* AI accelerator
* Altera
* High speed serial link

## References[edit]

1. ^ "Xilinx Inc, Form DEF 14A, Filing Date Jun 24, 1996". secdatabase.com. Archived from the original on May 7, 2018. Retrieved May 6, 2018.
2. ^ "CFOs On the Move". 10 April 2020. Archived from the original on 18 April 2020. Retrieved 16 April 2020.
3. ^ a b c d e f "Form 10-K Xilinx, Inc. For the Fiscal Year Ended April 3,2021". U.S. Securities and Exchange Commission. 14 May 2021.
4. ^ "XCELL issue 32" (PDF). Xilinx.
5. ^ a b Jonathan Cassell, iSuppli. "A Forgettable Year for Memory Chip Makers: iSuppli releases preliminary 2008 semiconductor rankings Archived 2008-12-17 at the Wayback Machine." December 1, 2008. Retrieved January 15, 2009.
6. ^ a b John Edwards, EDN. "No room for Second Place." June 1, 2006. Retrieved January 15, 2009.
7. ^ "Forbes Profile: Xilinx". Forbes. Retrieved 30 June 2022.
8. ^ Petruno, Tom (30 April 1991). "THE TIMES 100 : The Best Performing Companies in California : View From the Street : Initial Stock Offerings Proved a Real Gamble". Los Angeles Times.
9. ^ "AMD to Acquire Xilinx, Creating the Industry's High Performance Computing Leader". Advanced Micro Devices, Inc. 27 October 2020. Retrieved 2020-10-27.
10. ^ Lee, Jane Lanhee (2022-02-14). "AMD closes record chip industry deal with estimated $50 billion purchase of Xilinx". Reuters. Retrieved 2022-02-14.
11. ^ "424B3". www.sec.gov. Retrieved 2023-05-18.
12. ^ a b c d e f g h i j k l m n Funding Universe. "Xilinx, Inc. Archived 2013-11-04 at the Wayback Machine" Retrieved January 15, 2009.
13. ^ Cai Yan, EE Times. "Xilinx testing out China training program Archived 2013-05-23 at the Wayback Machine." Mar 27, 2007. Retrieved Dec 19, 2012.
14. ^ a b PR Newswire "Xilinx ships world's highest capacity FPGA and shatters industry record for number of transistors by 2x Archived 2018-06-12 at the Wayback Machine" October 2011. Retrieved May 1st, 2018
15. ^ a b c d Xilinx MediaRoom - Press Releases[permanent dead link]. Press.xilinx.com. Retrieved on 2013-11-20.
16. ^ a b c d e "Xilinx". Archived from the original on February 5, 2009. Retrieved August 16, 2015.
17. ^ "Xilinx Fact Sheet" (PDF). Archived (PDF) from the original on 2012-01-05. Retrieved 2009-01-29.
18. ^ The Inflation Calculator Archived 2018-03-26 at the Wayback Machine. Retrieved January 15, 2009.
19. ^ Company Release. "Xilinx Underscores Commitment to China Archived 2013-02-09 at archive.today." November 1, 2006. Retrieved January 15, 2009.
20. ^ EE Times Asia. "Xilinx investing $40 million in Singapore operations Archived 2015-06-10 at the Wayback Machine." November 16, 2005. Retrieved January 15, 2009.
21. ^ Pradeep Chakraborty. "India a high growth area for Xilinx Archived 2009-03-03 at the Wayback Machine." August 8, 2008. Retrieved January 15, 2009.
22. ^ EDB Singapore. "Xilinx, Inc. strengthens presence in Singapore to stay ahead of competition Archived 2009-03-02 at the Wayback Machine." December 1, 2007. Retrieved January 15, 2009.
23. ^ Xilinx Earnings Report. "[1] Archived 2018-04-26 at the Wayback Machine." April 25, 2018. Retrieved April 25, 2018.
24. ^ Embedded Technology Journal, “Introducing the Xilinx Targeted Design Platform: Fulfilling the Programmable Imperative Archived 2011-07-24 at the Wayback Machine.” Retrieved June 10, 2010.
25. ^ Lou Sosa, Electronic Design. "PLDs Present The Key To Xilinx's Success Archived 2009-03-02 at the Wayback Machine." June 12, 2008. Retrieved January 20, 2008.
26. ^ Mike Santarini, EDN. "Congratulations on the Xilinx CEO gig, Moshe! Archived 2008-05-16 at the Wayback Machine." January 8, 2008. Retrieved January 20, 2008.
27. ^ Ron Wilson, EDN. "Moshe Gavrielov Looks into the Future of Xilinx and the FPGA Industry Archived 2012-07-28 at archive.today." January 7, 2008. Retrieved January 20, 2008.
28. ^ Company Release. "Xilinx Appoints Victor Peng as President and Chief Executive Officer Archived 2018-01-24 at the Wayback Machine." Jan 8, 2018
29. ^ Clive Maxfield, EETimes. "Xilinx ships the world’s first heterogeneous 3D FPGA Archived 2012-06-04 at the Wayback Machine." May 30, 2012. Retrieved June 12, 2012.
30. ^ a b Electronic Product News. "Interview with Moshe Gavrielov, president, CEO, Xilinx Archived 2018-06-12 at the Wayback Machine." May 15, 2012. Retrieved June 12, 2012.
31. ^ a b DSP-FPGA.com. Xilinx FPGA Products Archived 2020-10-11 at the Wayback Machine.” April 2010. Retrieved June 10, 2010.
32. ^ a b c Brian Bailey, EE Times. "Second generation for FPGA software Archived 2013-01-16 at the Wayback Machine." Apr 25, 2012. Retrieved Dec 21, 2012.
33. ^ "Xilinx ships first 20nm Virtex UltraScale FPGA – W... - Xilinx User Community Forums". Archived from the original on July 21, 2015. Retrieved August 16, 2015.
34. ^ Karl Freund, Forbes (magazine). "Amazon's Xilinx FPGA Cloud: Why This May Be A Significant Milestone Archived 2018-06-12 at the Wayback Machine." December 13, 2016. Retrieved April 26, 2018.
35. ^ Karl Freund, Forbes (magazine). "Amazon And Xilinx Deliver New FPGA Solutions Archived 2018-06-12 at the Wayback Machine." September 27, 2017. Retrieved April 26, 2018.
36. ^ "Xilinx Acquires DEEPhi Tech ML Startup". AnandTech. 19 July 2018. Archived from the original on 12 February 2020.
37. ^ "Xilinx acquires DeePhi Tech". Scientific Computing World. 19 July 2018. Archived from the original on 11 October 2020.
38. ^ "Xilinx and Huawei Announce the First FPGA Cloud-based Real-time Video Streaming Solution in China". Design And Reuse. Archived from the original on 2019-11-06. Retrieved 2019-11-06.
39. ^ "From NGCodec to Huawei, SALT is the bridge to a new era of hardware monetization". Algodone. Archived from the original on 2020-02-20. Retrieved 2020-02-20.
40. ^ a b "Xilinx Platform to Run AI Driven ZF Automotive Control Unit". finance.yahoo.com. 7 January 2019. Archived from the original on 2019-08-06. Retrieved 2019-08-06.
41. ^ "Zynq UltraScale+ family now offers 61508-certified functional safety". Smart2.0. 2018-11-20. Archived from the original on 2019-08-06. Retrieved 2019-08-06.
42. ^ "Xilinx's Zynq MPSoC Platform Secures Exida Certification". finance.yahoo.com. 21 November 2018. Archived from the original on 2019-08-06. Retrieved 2019-08-06.
43. ^ "Xilinx Zynq Ultrascale+ products assessed to SIL 3". eeNews Embedded. 2018-11-21. Archived from the original on 2019-07-25. Retrieved 2019-08-06.
44. ^ "Xilinx Platform to Run AI Driven ZF Automotive Control Unit". finance.yahoo.com. 7 January 2019. Archived from the original on 2019-08-06. Retrieved 2019-08-23.
45. ^ "Evertiq - Xilinx partners with ZF on autonomous driving development". evertiq.com. 9 January 2019. Archived from the original on 2019-08-23. Retrieved 2019-08-23.
46. ^ "Xilinx and ZF partner to jointly power automated driving". Verdict Traffic. 2019-01-08. Archived from the original on 2020-10-11. Retrieved 2019-08-23.
47. ^ "Xilinx and ZF to collaborate on automated driving". www.mwee.com. 2019-01-07. Archived from the original on 2019-08-23. Retrieved 2019-08-23.
48. ^ "Xilinx introduces 16nm Defense-Grade UltraScale+ Portfolio". eeNews Analog. 2018-11-16. Archived from the original on 2019-08-29. Retrieved 2019-08-29.
49. ^ "Xilinx Advances State-of-the-Art in Integrated and Adaptable Solutions for Aerospace and Defense with Introduction of 16nm Defense-Grade UltraScale+ Portfolio". www.chipestimate.com. Archived from the original on 2019-08-29. Retrieved 2019-08-29.
50. ^ Manners, David (2018-11-16). "16nm for def-stan Ultra-Scale SoCs". Electronics Weekly. Archived from the original on 2019-08-29. Retrieved 2019-08-29.
51. ^ "Adaptable Solutions with 16nm defence-grade UltraScale+ portfolio". aerospacedefence.electronicspecifier.com. Archived from the original on 2019-08-29. Retrieved 2019-08-29.
52. ^ "Highly-integrated Chips Enable Next-Gen Aerospace and Defense Apps". ChipsNWafers. 2018-11-17. Archived from the original on 2019-08-29. Retrieved 2019-08-29.
53. ^ "Xilinx's Compact FPGA Card Heads to the Edge". Electronic Design. 2019-08-07. Archived from the original on 2019-09-05. Retrieved 2019-09-05.
54. ^ "Linley Group Newsletter". The Linley Group. Archived from the original on 2020-10-11.
55. ^ a b "Xilinx unveils Versal ACAP chip and Alveo accelerators for the data center". www.datacenterdynamics.com. Archived from the original on 2019-05-13. Retrieved 2019-10-03.
56. ^ "Xilinx Announces New Alveo U280 HBM2 Accelerator Card". HPCwire. Archived from the original on 2019-09-05. Retrieved 2019-10-10.
57. ^ "Xilinx Announces New Alveo U280 HBM2 Accelerator Card". Servers Maintenance Mashup. 2018-11-15. Archived from the original on 2019-09-05. Retrieved 2019-09-05.
58. ^ Dignan, Larry. "Xilinx launches Alveo U50 data center accelerator card". ZDNet. Archived from the original on 2020-10-11. Retrieved 2019-10-23.
59. ^ Components, Arne Verheyde 2019-08-07T14:56:02Z (7 August 2019). "Xilinx One-Ups Intel With PCIe 4.0 Alveo U50 Data Center Card". Tom's Hardware. Retrieved 2019-10-23.`{{cite web}}`: CS1 maint: numeric names: authors list (link)
60. ^ Abazovic, Fuad. "Xilinx announces Alveo U55C most powerful accelerator card". www.fudzilla.com. Retrieved 21 December 2021.
61. ^ "Xilinx sends lawyers after online educators". EEVblog Electronics Community Forum. 8 January 2019. Archived from the original on 2019-01-21. Retrieved 2019-01-20.
62. ^ "Xilinx sends lawyers after an engineer teaching FPGA programming". Hacker News. 18 January 2019. Archived from the original on 2019-01-20. Retrieved 2019-01-20.
63. ^ "Xilinx sends lawyers after an engineer teaching FPGA programming". YouTube. Archived from the original on 2019-01-18. Retrieved 2019-01-20.
64. ^ "EdgeBoard artificial intelligence device from Baidu based on Xilinx technology". Vision Systems Design. 2019-01-17. Archived from the original on 2019-07-10. Retrieved 2019-07-10.
65. ^ Manners, David (2019-01-17). "Xilinx to power Baidu brain". Electronics Weekly. Archived from the original on 2019-07-10. Retrieved 2019-07-10.
66. ^ "Xilinx to enable Baidu Brain edge AI applications". eeNews Power. 2019-01-18. Archived from the original on 2019-07-25. Retrieved 2019-07-25.
67. ^ "EdgeBoard artificial intelligence device from Baidu based on Xilinx technology". Vision Systems Design. Archived from the original on 2019-07-10. Retrieved 2019-07-10.
68. ^ "Xilinx Technology (NASDAQ:XLNX) Announces That The Baidu Brain Edge AI Platform Will Get Powered By Xilinx". Tech Stock Observer. 2019-01-23. Archived from the original on 2019-08-02. Retrieved 2019-08-02.
69. ^ Atwell, Cabe. "Baidu Announces Xilinx-Based EdgeBoard for AI Applications". Hackster.io. Archived from the original on 2020-10-11. Retrieved 2019-08-02.
70. ^ "Xilinx Technology to Power Baidu Brain Edge AI Applications : Xilinx : International Broadcast News". www.4rfv.com. Archived from the original on 2020-10-11. Retrieved 2019-08-02.
71. ^ "Xilinx Reports Record Revenues Exceeding $3 Billion For Fiscal 2019". HPCwire. Archived from the original on 2019-04-25. Retrieved 2019-06-05.
72. ^ "Xilinx Reports Record Revenues Exceeding $3 Billion For Fiscal 2019". EDACafe. Archived from the original on 2020-10-11. Retrieved 2019-06-05.
73. ^ Cutress, Ian. "Xilinx Announce New RFSoCs for 5G, Covering Sub-6 GHz and mmWave". www.anandtech.com. Archived from the original on 2019-08-09. Retrieved 2019-06-10.
74. ^ "Xilinx, Inc.'s (NASDAQ:XLNX) New Innovative Zynq UltraScale+ RFSoC Portfolio Includes Full Sub-6 GHz Spectrum That Supports 5G". Tech Stock Observer. 2019-02-28. Archived from the original on 2019-08-02. Retrieved 2019-06-10.
75. ^ a b "Xilinx and Samsung enable a 5G NR commercial deployment in South Korea". Fierce Wireless. 7 March 2019. Archived from the original on 2019-03-07. Retrieved 2019-06-14.
76. ^ a b King, Tierney (2019-02-25). "Xilinx and Samsung Join Forces and Enable 5G New Radio Commercial Deployment". Electronic Component News. Archived from the original on 2019-02-26. Retrieved 2019-06-14.
77. ^ Sharma, Ray. "Xilinx, Samsung to Develop and Deploy 5G Massive MIMO and mmWave Solutions". www.thefastmode.com. Archived from the original on 2020-10-11. Retrieved 2019-06-18.
78. ^ "Xilinx introduces HDMI 2.1 IP subsystem". eeNews Analog. 2019-02-05. Archived from the original on 2019-06-26. Retrieved 2019-06-26.
79. ^ "Xilinx unveils HDMI 2.1 IP subsystem for 8K video". www.digitalsignagetoday.com. 2019-02-11. Archived from the original on 2019-06-26. Retrieved 2019-06-26.
80. ^ a b "Xilinx to buy network interface card vendor Solarflare". Electronics 360. Archived from the original on 2019-05-29. Retrieved 2019-05-29.
81. ^ a b "Xilinx to Acquire Solarflare". HPCwire. Archived from the original on 2019-04-25. Retrieved 2019-05-29.
82. ^ Manners, David (2019-04-25). "Xilinx buys Solarflare". Electronics Weekly. Archived from the original on 2019-05-29. Retrieved 2019-05-29.
83. ^ "Xilinx to Acquire Solarflare". HPCwire. Archived from the original on 2019-04-25. Retrieved 2019-06-04.
84. ^ McGrath, Dylan. "Xilinx to Buy Networking Technology Firm Solarflare". EE Times. Archived from the original on 2019-08-02. Retrieved 2019-06-04.
85. ^ Manners, David (2019-08-22). "Xilinx claims world's largest FPGA". Electronics Weekly. Archived from the original on 2019-09-20. Retrieved 2019-09-20.
86. ^ Cutress, Dr Ian. "Xilinx Announces World Largest FPGA: Virtex Ultrascale+ VU19P with 9m Cells". www.anandtech.com. Archived from the original on 2019-09-13. Retrieved 2019-09-20.
87. ^ "Xilinx Claims Title of "World's Largest FPGA" with New VU19P". www.allaboutcircuits.com. Archived from the original on 2019-09-20. Retrieved 2019-09-20.
88. ^ Takashi, Dean (2019-06-18). "Xilinx ships first Versal ACAP chips that adapt to AI programs". Venture Beat. Archived from the original on 2020-05-21. Retrieved 2020-02-26.
89. ^ "Xilinx ships first Versal ACAP chips that adapt to AI programs". VentureBeat. 2019-06-18. Archived from the original on 2020-05-21. Retrieved 2020-03-09.
90. ^ Dignan, Larry. "Xilinx ships its Versal AI Core, Versal Prime, key parts of its adaptive compute acceleration platform". ZDNet. Archived from the original on 2020-08-06. Retrieved 2020-03-09.
91. ^ Altavilla, Dave. "Xilinx Unveils Vitis, Breakthrough Open-Source Design Software For Adaptable Processing Engines". Forbes. Archived from the original on 2019-10-29. Retrieved 2019-10-29.
92. ^ "Xilinx updates their tool suite with Vitis". SemiAccurate. 2019-10-07. Retrieved 2019-10-29.
93. ^ "Xilinx intros Unified Software Platform for developers". Archived from the original on 2019-10-29. Retrieved 2019-10-29.
94. ^ "Xilinx Reports Record Revenues Exceeding $3 Billion For Fiscal 2019". HPCwire. Archived from the original on 2019-04-25. Retrieved 2019-05-15.
95. ^ "Xilinx Reports Record Revenues Exceeding $3 Billion For Fiscal 2019". EDACafe. Archived from the original on 2020-10-11. Retrieved 2019-05-15.
96. ^ Abazovic, Fuad. "Xilinx made $3.06 billion in 2019". www.fudzilla.com. Archived from the original on 2019-05-17. Retrieved 2019-05-17.
97. ^ Abazovic, Fuad. "Xilinx made $3.06 billion in 2019". www.fudzilla.com. Archived from the original on 2019-05-17. Retrieved 2019-05-24.
98. ^ Nellis, Stephen (2020-08-20). "Subaru taps Xilinx for key chip in driver-assistance system". Reuters. Archived from the original on 2020-10-01. Retrieved 2020-09-22.
99. ^ "Open RAN connects Xilinx with network operators". Light Reading. Archived from the original on 2020-09-19. Retrieved 2020-09-29.
100. ^ Lombardo, Cara (October 27, 2020). "AMD Agrees to Buy Xilinx for $35 Billion in Stock". The New York Times. Retrieved October 27, 2020.
101. ^ "AMD and Xilinx Stockholders Overwhelmingly Approve AMD's Acquisition of Xilinx". Xilinx. 2021-04-07. Retrieved 2021-05-10.
102. ^ "AMD Completes Acquisition of Xilinx". AMD. February 14, 2022.
103. ^ "Advancing HLS Adoption – Xilinx, Silexica, Falcon". EEJournal. 2020-12-15. Retrieved 2020-12-18.
104. ^ "Xilinx, Mavenir partner to boost open 5G network capacity". Reuters. 2021-04-13. Retrieved 2021-05-18.
105. ^ "Xilinx Introduces Kria SoMs". EEJournal. 2021-04-20. Retrieved 2021-05-27.
106. ^ Hayes, Caroline (2021-06-15). "Xilinx acquires Silexica and its C/C++ tools". Electronics Weekly. Retrieved 2021-07-08.
107. ^ Xcell Journal, "Building Automotive Driver Assistance System Algorithms with Xilinx FPGA platforms Archived 2009-03-27 at the Wayback Machine." October, 2008. Retrieved January 28, 2009.
108. ^ Xcell Journal, "Taking Designs to New Heights with Space-Grade Virtex-4QV FPGAs Archived 2009-03-27 at the Wayback Machine." July, 2008. Retrieved January 28, 2009.
109. ^ Xcell Journal, "A Flexible Platform for Satellite-Based High-Performance Computing Archived 2009-02-02 at the Wayback Machine". January 2009 p 22. Retrieved January 28, 2009.
110. ^ Xcell Journal, "Virtex-5 Powers Reconfigurable Rugged PC Archived 2009-02-02 at the Wayback Machine." January 2009 p28. Retrieved January 28, 2009.
111. ^ Xcell Journal, "Exploring and Prototyping Designs for Biomedical Applications Archived 2009-03-27 at the Wayback Machine." July 2008. Retrieved January 28, 2009.
112. ^ Xcell Journal, "Security Video Analytics on Xilinx Spartan-3A DSP Archived 2009-03-27 at the Wayback Machine." October 2008. Retrieved January 28, 2009.
113. ^ Xcell Journal, "A/V Monitoring System Rides Virtex-5 Archived 2009-03-27 at the Wayback Machine." October 2008. Retrieved January 28, 2009.
114. ^ Xcell Journal, "CERN Scientists Use Virtex-4 FPGAs for Big Bang Research Archived March 27, 2009, at the Wayback Machine." July 2008. Retrieved January 28, 2009.
115. ^ By Michael Kleinman, US Airforce News. “New computer chip cuts costs, adds efficiency to space systems.” September 21, 2010. Retrieved September 23, 2010.
116. ^ "Virtex-II Pro Datasheet" (PDF). Archived (PDF) from the original on 2009-03-27. Retrieved 2009-01-29.
117. ^ a b "Virtex-4 Family Overview" (PDF). Archived (PDF) from the original on 2009-02-06. Retrieved 2009-01-29.
118. ^ Richard Wilson, ElectronicsWeekly.com, "Xilinx repositions FPGAs with SoC move Archived 2020-10-11 at the Wayback Machine." February 2, 2009. Retrieved on February 2, 2009.
119. ^ EDN. "The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X Archived 2013-01-16 at the Wayback Machine." Jun 15, 2012. Retrieved Jun 25, 2013.
120. ^ Clive Maxfield, EE Times. "WebPACK edition of Xilinx Vivado Design Suite now available Archived 2013-02-11 at the Wayback Machine." Dec 20, 2012. Retrieved Jun 25, 2013.
121. ^ Ken Cheung, EDA Geek. “Xilinx Rolls Out Embedded Development Kit 9.li Archived 2015-03-20 at the Wayback Machine.” March 26, 2007. Retrieved June 10, 2010.
122. ^ a b c d e Rich Nass, EE Times. "Xilinx puts ARM core into its FPGAs Archived 2010-11-23 at the Wayback Machine." April 27, 2010. Retrieved February 14, 2011.
123. ^ a b c d e Steve Leibson, Design-Reuse. "Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform - Part 1 Archived 2011-07-09 at the Wayback Machine." May 3, 2010. Retrieved February 15, 2011.
124. ^ a b c d Toni McConnel, EE Times. "Xilinx Extensible Processing Platform combines best of serial and parallel processing Archived 2011-10-24 at the Wayback Machine." April 28, 2010. Retrieved February 14, 2011.
125. ^ a b c d Ken Cheung, FPGA Blog. "Xilinx Extensible Processing Platform for Embedded Systems Archived 2015-01-08 at the Wayback Machine." April 27, 2010. Retrieved February 14, 2011.
126. ^ a b c d e Colin Holland, EE Times. "Xilinx provides details on ARM-based devices Archived 2011-12-25 at the Wayback Machine." March 1, 2011. Retrieved March 1, 2011.
127. ^ a b c d e Laura Hopperton, Newelectronics. "Embedded world: Xilinx introduces 'industry's first' extensible processing platform Archived 2017-12-07 at the Wayback Machine." March 1, 2011. Retrieved March 1, 2011.
128. ^ a b EDN Europe. "Xilinx adopts stacked-die 3D packaging Archived February 19, 2011, at the Wayback Machine." November 1, 2010. Retrieved May 12, 2011.
129. ^ a b Lawrence Latif (October 27, 2010). "FPGA manufacturer claims to beat Moore's Law". The Inquirer. Archived from the original on 2011-11-21.`{{cite web}}`: CS1 maint: unfit URL (link)
130. ^ Clive Maxfield, EETimes. "Xilinx multi-FPGA provides mega-boost re capacity, performance, and power efficiency! Archived 2010-10-31 at the Wayback Machine." October 27, 2010. Retrieved May 12, 2011.
131. ^ a b Don Clark, The Wall Street Journal. "Xilinx Says Four Chips Act Like One Giant Archived 2018-06-12 at the Wayback Machine." October 25, 2011. Retrieved November 18, 2011.
132. ^ a b Clive Maxfield, EETimes. "Xilinx tips world’s highest capacity FPGA Archived 2011-11-27 at the Wayback Machine." October 25, 2011. Retrieved November 18, 2011.
133. ^ a b David Manners, Electronics Weekly. "Xilinx launches 20m ASIC gate stacked silicon FPGA Archived 2013-01-16 at the Wayback Machine." October 25, 2011. Retrieved November 18, 2011.
134. ^ Tim Pietruck, SciEngines GmbH. "[2] Archived 2011-12-18 at the Wayback Machine." December 21, 2011 - RIVYERA-V7 2000T FPGA computer with the newest and largest Xilinx Virtex-7
135. ^ Tiernan Ray, Barrons. "Xilinx: 3-D Chip a Route to More Complex Semiconductors Archived 2015-09-27 at the Wayback Machine." May 30, 2012. Retrieved Jan 9, 2013.
136. ^ Loring Wirbel, EDN. "Xilinx Virtex-7 HT devices use 3D stacking for a high-end communication edge Archived 2013-01-16 at the Wayback Machine." May 30, 2012. Retrieved Jan 9, 2013.
137. ^ Dylan McGrath, EE Times. "Xilinx buys high-level synthesis EDA vendor Archived 2011-10-17 at the Wayback Machine." January 31, 2011. Retrieved February 15, 2011.
138. ^ Richard Wilson, ElectronicsWeekly.com. "Xilinx acquires ESL firm to make FPGAs easier to use Archived 2011-07-10 at the Wayback Machine." January 31, 2011. Retrieved February 15, 2011.
139. ^ Brian Bailey, EE Times. "Second generation for FPGA software Archived 2013-01-16 at the Wayback Machine." Apr 25, 2012. Retrieved Jan 3, 2013.
140. ^ a b c EDN. "The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X Archived 2013-01-16 at the Wayback Machine." Jun 15, 2012. Retrieved Jan 3, 2013.
141. ^ "Buffer Be Gone! Xilinx Acquires NGCodec to Deliver High-Quality, Efficient Cloud Video Encoding". forums.xilinx.com. 2019-07-01. Archived from the original on 2019-07-02. Retrieved 2019-07-02.
142. ^ "NGCodec". NGCodec. Archived from the original on 2019-07-01. Retrieved 2019-07-02.
143. ^ a b c "Xilinx to establish adaptive compute research clusters". NewsElectronics. 5 June 2020. Archived from the original on 2020-06-09. Retrieved 2020-06-09.
144. ^ Brueckner, Rich (2020-05-05). "Xilinx Establishes FPGA Adaptive Compute Clusters at Leading Universities". insideHPC. Archived from the original on 2020-06-26. Retrieved 2020-06-23.
145. ^ "Xilinx forms university adaptive compute research clusters". eeNews Embedded. 2020-05-06. Archived from the original on 2020-06-18. Retrieved 2020-06-17.
146. ^ Stephen Brown and Johnathan Rose, University of Toronto. “Architecture of FPGAs and CPLDs: A Tutorial Archived 2010-07-09 at the Wayback Machine.” Retrieved June 10, 2010.
147. ^ a b c d e EE Times. “Xilinx to offer three classes of FPGAs at 28-nm Archived 2010-11-23 at the Wayback Machine.” June 21, 2010. Retrieved September 23, 2010.
148. ^ a b c d Kevin Morris, FPGA Journal. “Veni! Vidi! Virtex! (and Kintex and Artix Too) Archived November 23, 2010, at the Wayback Machine.” June 21, 2010. Retrieved September 23, 2010.
149. ^ Daniel Harris, Electronic Design. “If Only the Original Spartans Could Have Thrived On So Little Power Archived 2011-12-05 at the Wayback Machine.” February 27, 2008. Retrieved January 20, 2008.
150. ^ a b Peter Clarke, EE Times, "Xilinx launches Spartan-6, Virtex-6 FPGAs Archived 2013-05-23 at the Wayback Machine." February 2, 2009. Retrieved February 2, 2009
151. ^ Ron Wilson, EDN, "Xilinx FPGA introductions hint at new realities Archived 2013-01-22 at archive.today." February 2, 2009. Retrieved on February 2, 2009.
152. ^ Brent Przybus, Xilinx, "Xilinx Redefines Power, Performance, and Design Productivity with Three New 28 nm FPGA Families: Virtex-7, Kintex-7, and Artix-7 Devices Archived 2010-07-04 at the Wayback Machine." June 21, 2010. Retrieved on June 22, 2010.
153. ^ Convergedigest. "Xilinx Ships First 28nm FPGA[permanent dead link]." Mar 18, 2011. Retrieved May 11, 2012.
154. ^ Clive Maxfield, EETimes. "Xilinx ships first 28nm Kintex-7 FPGAs Archived 2012-04-13 at the Wayback Machine." March 21, 2011. Retrieved May 11, 2012.
155. ^ a b Company Release. "Xilinx Announces the Spartan-7 FPGA Family Archived 2018-05-07 at the Wayback Machine." November 19, 2015.
156. ^ a b Company Release. "Xilinx Spartan-7 FPGAs Now in Production Archived 2018-05-07 at the Wayback Machine." May 09, 2017.
157. ^ "Archived copy" (PDF). Archived from the original (PDF) on 2014-07-07. Retrieved 2014-05-13.`{{cite web}}`: CS1 maint: archived copy as title (link)
158. ^ "UltraScale MPSoC Architecture". Archived from the original on October 12, 2014. Retrieved August 16, 2015.
159. ^ "Xilinx Back in the Cost-Optimized Game". EEJournal. 2021-03-16. Retrieved 2021-04-02.
160. ^ Ron Wilson, EDN. "Xilinx FPGA introductions hint at new realities Archived May 25, 2011, at the Wayback Machine." February 2, 2009 Retrieved June 10, 2010.
161. ^ Design & Reuse. "New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems Archived 2010-01-03 at the Wayback Machine." February 2, 2009. Retrieved June 10, 2010.
162. ^ Company Release. "New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems." February 2, 2009. Retrieved February 2, 2009.
163. ^ DSP DesignLine. "Analysis: Xilinx debuts Virtex-5 FXT, expands SXT Archived 2020-10-11 at the Wayback Machine." June 13, 2008. Retrieved January 20, 2008.
164. ^ National Instruments. "Advantages of the Xilinx Virtex-5 FPGA Archived 2010-07-26 at the Wayback Machine." June 17, 2009. Retrieved June 29, 2010.
165. ^ a b "SK Telecom deploys Xilinx FPGAs for AI". 19 August 2018. Archived from the original on 2020-03-02. Retrieved 2020-03-02.
166. ^ "SSK Telecom deploys Xilinx FPGAs in its data center". Archived from the original on 2020-10-11. Retrieved 2020-03-02.
167. ^ "FPGA boosts logic fabric, embedded memory - Electronic Products & TechnologyElectronic Products & Technology". July 2020. Archived from the original on 2020-08-04. Retrieved 2020-08-05.
168. ^ a b Company Website. "Cost-Optimized Portfolio Archived 2017-07-05 at the Wayback Machine." Retrieved July 5, 2017.
169. ^ a b c Mike Demler, EDN. "Xilinx integrates dual ARM Cortex-A9 MPCore with 28-nm, low-power programmable logic Archived 2013-01-22 at archive.today." March 1, 2011. Retrieved March 1, 2011.
170. ^ Clive Maxfield, EETimes. "Xilinx unveils new Zynq-7100 All Programmable SoCs Archived 2013-03-26 at the Wayback Machine." Mar 20, 2013. Retrieved Jun 3, 2013.
171. ^ "Axiom Alpha". Archived from the original on 2014-07-02. Retrieved 2014-06-20.
172. ^ "Zynq-based Axiom Alpha open 4K cine camera proto debuts in Vienna hackerspace". 2014-03-20. Archived from the original on 2014-08-13. Retrieved 2014-06-20.
173. ^ Daniel Harris, Electronic Design. "If only the original spartans could have thrived on so little power Archived 2009-03-02 at the Wayback Machine." February 27, 2008. Retrieved January 20, 2008.
174. ^ a b Company Release. "The low-cost Spartan-6 FPGA family delivers an optimal balance of low risk, low cost, low power, and high performance[dead link]." February 2, 2009.
175. ^ Morris, Kevin. "Not Bad Die: Xilinx EasyPath Explained" (PDF). FPGA Journal. Archived from the original (PDF) on 27 March 2009. Retrieved 20 January 2008.
176. ^ a b "Xilinx ships first Versal ACAP chips that adapt to AI programs Archived 2020-05-21 at the Wayback Machine." June 18, 2019. Retrieved Feb 26, 2020.
177. ^ Karl Freund, Forbes (magazine). "Xilinx Everest: Enabling FPGA Acceleration With ACAP Archived 2018-06-12 at the Wayback Machine." March 26, 2018. Retrieved April 26, 2018.
178. ^ "Samsung to tap Xilinx chips for 5G network equipment Archived 2020-10-11 at the Wayback Machine." Apr 16, 2020. Retrieved April 16, 2020.
179. ^ McGregor, Jim. "Xilinx Ups The Ante In High-Performance Processing With Versal HBM". Forbes. Retrieved 28 September 2021.

## External links[edit]

Wikimedia Commons has media related to Xilinx.

* Xilinx official website
*     * Historical business data for Xilinx:
* SEC filings

* v
* t
* e

AMD

Products|

| Architecture|

* x86-64
* 3DNow!

|

Processors|

| Desktop|

* Geode
* Duron
* Sempron
* Turion
* Phenom
* Athlon
* FX
* Ryzen

|

Server|

* Opteron
* Epyc

Technologies|

| Graphics|

* Radeon
* AMD Radeon Software
* AMDGPU
* AMD PowerTune
* CrossFire
* Eyefinity
* FreeSync
* Mantle

|

Processor|

* AGESA
* AMD Turbo Core
* Cool'n'Quiet
* AMD Platform Security Processor

Memory|

* High Bandwidth Memory (HBM)

Sockets|

Sockets without existing articles (e.g. FP4) are omitted from this section.

Desktop|

| Pin grid array (PGA)|

* Super Socket 7 (Super 7)
* 939
* AM2
* AM2+
* AM3
* AM3+
* FM1
* FM2
* FM2+
* AM1
* AM4

|

Land grid array (LGA)|

* TR4
* sTRX4
* AM5

Other|

* Slot A

Mobile|

| Pin grid array (PGA)|

* 563
* S1
* FS1

|

Ball grid array (BGA)|

* FT1
* FP2
* FT3
* FP3

Server|

| Pin grid array (PGA)|

* 940

|

Land grid array (LGA)|

* F
* F+
* ~~G3~~
* G34
* C32
* SP3

Mixed|

| Pin grid array (PGA)|

* Socket A (Socket 462)
* 754

|

Product lists|

* List of AMD microprocessors
* List of AMD graphics processing units
* List of AMD accelerated processing units
* List of AMD CPU microarchitectures
* List of AMD chipsets

People|

| Founders|

* Jerry Sanders

|

CEOs|

* Jerry Sanders (1969–2002)
* Hector Ruiz (2002–2008)
* Dirk Meyer (2008–2011)
* Rory Read (2011–2014)
* Lisa Su (2014–present)

Acquisitions|

* ATI Technologies
* SeaMicro
* Xilinx

Joint ventures|

* AMD–Chinese joint venture

Litigation|

* Intel Corp. v. Advanced Micro Devices, Inc. (2004)
* Advanced Micro Devices, Inc. v. Intel Corp. (2005)

Related|

* Vulkan (API)
* NexGen
* Spansion
* AMD Live!
* Performance Rating
* Torrenza
* GlobalFoundries

* Italics indicates an unreleased product (e.g. socket)
*  ~~Strikethrough~~ indicates a product that was never released.
* Mixed indicates sockets that are designed for or integrated with one or more platforms.

* v
* t
* e

Programmable logic

Concepts|

* ASIC
* SoC
* FPGA
* Logic block
* CPLD
* EPLD
* PLA
* PAL
* GAL
* PSoC
* Reconfigurable computing
* Xputer
* Soft microprocessor
* Circuit underutilization
* High-level synthesis
* Hardware acceleration

Languages|

* Verilog
* A
* AMS
* VHDL
* AMS
* VITAL
* SystemVerilog
* DPI
* SystemC
* AHDL
* Handel-C
* Lola
* PSL
* UPF
* PALASM
* ABEL
* CUPL
* OpenVera
* C to HDL
* Flow to HDL
* MyHDL
* ELLA
* Chisel

Companies|

* Accellera
* Achronix
* AMD
* Aldec
* Arm
* Cadence
* Infineon
* Intel
* Lattice
* Microchip Technology
* NXP
* Siemens
* Synopsys
* Texas Instruments

Products|

| Hardware|

* iCE
* Stratix
* Virtex

|

Software|

* Intel Quartus Prime
* Xilinx ISE
* Vivado
* ModelSim
* VTR
* Simulators

Intellectual
property|

| Proprietary|

* ARC
* ARM Cortex-M
* LEON
* LatticeMico8
* MicroBlaze
* PicoBlaze
* Nios
* Nios II

|

Open-source|

* JOP
* LatticeMico32
* OpenCores
* OpenRISC
* 1200
* Power ISA
* Libre-SOC
* Microwatt
* RISC-V
* Zet

Authority control databases

International|

* ISNI

National|

* Germany
* United States

*[v]: View this template
*[t]: Discuss this template
*[e]: Edit this template