CUDA

CUDA

Developer(s)	Nvidia
Initial release	June 23, 2007; 17 years ago (2007-06-23)
Stable release	12.3.2 / January 2, 2024; 6 months ago (2024-01-02)
Operating system	Windows, Linux
Platform	Supported GPUs
Type	GPGPU
License	Proprietary
Website	developer.nvidia.com/cuda-zone

CUDA (or Compute Unified Device Architecture) is a proprietary and closed-source parallel computing platform and application programming interface (API) that allows software to use certain types of graphics processing units (GPUs) for general-purpose processing, an approach called general-purpose computing on GPUs (GPGPU). CUDA is a software layer that gives direct access to the GPU's virtual instruction set and parallel computational elements for the execution of compute kernels.^[1]

CUDA is designed to work with programming languages such as C, C++, and Fortran. This accessibility makes it easier for specialists in parallel programming to use GPU resources, in contrast to prior APIs like Direct3D and OpenGL, which required advanced skills in graphics programming.^[2] CUDA-powered GPUs also support programming frameworks such as OpenMP, OpenACC and OpenCL;^[3][1] and HIP by compiling such code to CUDA.

CUDA was created by Nvidia.^[4] When it was first introduced, the name was an acronym for Compute Unified Device Architecture,^[5] but Nvidia later dropped the common use of the acronym.^[when?]

Background

The graphics processing unit (GPU), as a specialized computer processor, addresses the demands of real-time high-resolution 3D graphics compute-intensive tasks. By 2012, GPUs had evolved into highly parallel multi-core systems allowing efficient manipulation of large blocks of data. This design is more effective than general-purpose central processing unit (CPUs) for algorithms in situations where processing large blocks of data is done in parallel, such as:

• cryptographic hash functions
• machine learning
• molecular dynamics simulations
• physics engines

Ian Buck, while at Stanford in 2000, created an 8K gaming rig using 32 GeForce cards, then obtained a DARPA grant to perform general purpose parallel programming on GPUs. He then joined Nvidia, where since 2004 he has been overseeing CUDA development. In pushing for CUDA, Jensen Huang aimed for the Nvidia GPUs to become a general hardware for scientific computing. CUDA was released in 2006. Around 2015, the focus of CUDA changed to neural networks.^[6]

Ontology

The following table offers a non-exact description for the ontology of CUDA framework.

Programming abilities

Example of CUDA processing flow

1. Copy data from main memory to GPU memory
2. CPU initiates the GPU compute kernel
3. GPU's CUDA cores execute the kernel in parallel
4. Copy the resulting data from GPU memory to main memory

The CUDA platform is accessible to software developers through CUDA-accelerated libraries, compiler directives such as OpenACC, and extensions to industry-standard programming languages including C, C++ and Fortran. C/C++ programmers can use 'CUDA C/C++', compiled to PTX with nvcc, Nvidia's LLVM-based C/C++ compiler, or by clang itself.^[7] Fortran programmers can use 'CUDA Fortran', compiled with the PGI CUDA Fortran compiler from The Portland Group.^{[needs update]}

In addition to libraries, compiler directives, CUDA C/C++ and CUDA Fortran, the CUDA platform supports other computational interfaces, including the Khronos Group's OpenCL,^[8] Microsoft's DirectCompute, OpenGL Compute Shader and C++ AMP.^[9] Third party wrappers are also available for Python, Perl, Fortran, Java, Ruby, Lua, Common Lisp, Haskell, R, MATLAB, IDL, Julia, and native support in Mathematica.

In the computer game industry, GPUs are used for graphics rendering, and for game physics calculations (physical effects such as debris, smoke, fire, fluids); examples include PhysX and Bullet. CUDA has also been used to accelerate non-graphical applications in computational biology, cryptography and other fields by an order of magnitude or more.^{[10][11][12][13][14]}

CUDA provides both a low level API (CUDA Driver API, non single-source) and a higher level API (CUDA Runtime API, single-source). The initial CUDA SDK was made public on 15 February 2007, for Microsoft Windows and Linux. Mac OS X support was later added in version 2.0,^[15] which supersedes the beta released February 14, 2008.^[16] CUDA works with all Nvidia GPUs from the G8x series onwards, including GeForce, Quadro and the Tesla line. CUDA is compatible with most standard operating systems.

CUDA 8.0 comes with the following libraries (for compilation & runtime, in alphabetical order):

• cuBLAS – CUDA Basic Linear Algebra Subroutines library
• CUDART – CUDA Runtime library
• cuFFT – CUDA Fast Fourier Transform library
• cuRAND – CUDA Random Number Generation library
• cuSOLVER – CUDA based collection of dense and sparse direct solvers
• cuSPARSE – CUDA Sparse Matrix library
• NPP – NVIDIA Performance Primitives library
• nvGRAPH – NVIDIA Graph Analytics library
• NVML – NVIDIA Management Library
• NVRTC – NVIDIA Runtime Compilation library for CUDA C++

CUDA 8.0 comes with these other software components:

• nView – NVIDIA nView Desktop Management Software
• NVWMI – NVIDIA Enterprise Management Toolkit
• GameWorks PhysX – is a multi-platform game physics engine

CUDA 9.0–9.2 comes with these other components:

• CUTLASS 1.0 – custom linear algebra algorithms,
• NVIDIA Video Decoder was deprecated in CUDA 9.2; it is now available in NVIDIA Video Codec SDK

CUDA 10 comes with these other components:

• nvJPEG – Hybrid (CPU and GPU) JPEG processing

CUDA 11.0–11.8 comes with these other components:^{[17][18][19][20]}

• CUB is new one of more supported C++ libraries
• MIG multi instance GPU support
• nvJPEG2000 – JPEG 2000 encoder and decoder

Advantages

CUDA has several advantages over traditional general-purpose computation on GPUs (GPGPU) using graphics APIs:

• Scattered reads – code can read from arbitrary addresses in memory.
• Unified virtual memory (CUDA 4.0 and above)
• Unified memory (CUDA 6.0 and above)
• Shared memory – CUDA exposes a fast shared memory region that can be shared among threads. This can be used as a user-managed cache, enabling higher bandwidth than is possible using texture lookups.^[21]
• Faster downloads and readbacks to and from the GPU
• Full support for integer and bitwise operations, including integer texture lookups

Limitations

• Whether for the host computer or the GPU device, all CUDA source code is now processed according to C++ syntax rules.^[22] This was not always the case. Earlier versions of CUDA were based on C syntax rules.^[23] As with the more general case of compiling C code with a C++ compiler, it is therefore possible that old C-style CUDA source code will either fail to compile or will not behave as originally intended.
• Interoperability with rendering languages such as OpenGL is one-way, with OpenGL having access to registered CUDA memory but CUDA not having access to OpenGL memory.
• Copying between host and device memory may incur a performance hit due to system bus bandwidth and latency (this can be partly alleviated with asynchronous memory transfers, handled by the GPU's DMA engine).
• Threads should be running in groups of at least 32 for best performance, with total number of threads numbering in the thousands. Branches in the program code do not affect performance significantly, provided that each of 32 threads takes the same execution path; the SIMD execution model becomes a significant limitation for any inherently divergent task (e.g. traversing a space partitioning data structure during ray tracing).
• No emulation or fallback functionality is available for modern revisions.
• Valid C++ may sometimes be flagged and prevent compilation due to the way the compiler approaches optimization for target GPU device limitations.^{[citation needed]}
• C++ run-time type information (RTTI) and C++-style exception handling are only supported in host code, not in device code.
• In single-precision on first generation CUDA compute capability 1.x devices, denormal numbers are unsupported and are instead flushed to zero, and the precision of both the division and square root operations are slightly lower than IEEE 754-compliant single precision math. Devices that support compute capability 2.0 and above support denormal numbers, and the division and square root operations are IEEE 754 compliant by default. However, users can obtain the prior faster gaming-grade math of compute capability 1.x devices if desired by setting compiler flags to disable accurate divisions and accurate square roots, and enable flushing denormal numbers to zero.^[24]
• Unlike OpenCL, CUDA-enabled GPUs are only available from Nvidia.^[25] Attempts to implement CUDA on other GPUs include:
  • Project Coriander: Converts CUDA C++11 source to OpenCL 1.2 C. A fork of CUDA-on-CL intended to run TensorFlow.^[26][27][28]
  • CU2CL: Convert CUDA 3.2 C++ to OpenCL C.^[29]
  • GPUOpen HIP: A thin abstraction layer on top of CUDA and ROCm intended for AMD and Nvidia GPUs. Has a conversion tool for importing CUDA C++ source. Supports CUDA 4.0 plus C++11 and float16.
  • ZLUDA is a drop-in replacement for CUDA on Intel GPU. ZLUDA allows to run unmodified CUDA applications using Intel GPUs with near-native performance. ^[30]
  • chipStar can compile and run CUDA/HIP programs on advanced OpenCL 3.0 or Level Zero platforms.^[31]

Example

This example code in C++ loads a texture from an image into an array on the GPU:

texture<float, 2, cudaReadModeElementType> tex;

void foo()
{
  cudaArray* cu_array;

  // Allocate array
  cudaChannelFormatDesc description = cudaCreateChannelDesc<float>();
  cudaMallocArray(&cu_array, &description, width, height);

  // Copy image data to array
  cudaMemcpyToArray(cu_array, image, width*height*sizeof(float), cudaMemcpyHostToDevice);

  // Set texture parameters (default)
  tex.addressMode[0] = cudaAddressModeClamp;
  tex.addressMode[1] = cudaAddressModeClamp;
  tex.filterMode = cudaFilterModePoint;
  tex.normalized = false; // do not normalize coordinates

  // Bind the array to the texture
  cudaBindTextureToArray(tex, cu_array);

  // Run kernel
  dim3 blockDim(16, 16, 1);
  dim3 gridDim((width + blockDim.x - 1)/ blockDim.x, (height + blockDim.y - 1) / blockDim.y, 1);
  kernel<<< gridDim, blockDim, 0 >>>(d_data, height, width);

  // Unbind the array from the texture
  cudaUnbindTexture(tex);
} //end foo()

__global__ void kernel(float* odata, int height, int width)
{
   unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
   unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
   if (x < width && y < height) {
      float c = tex2D(tex, x, y);
      odata[y*width+x] = c;
   }
}

Below is an example given in Python that computes the product of two arrays on the GPU. The unofficial Python language bindings can be obtained from PyCUDA.^[32]

import pycuda.compiler as comp
import pycuda.driver as drv
import numpy
import pycuda.autoinit

mod = comp.SourceModule(
    """
__global__ void multiply_them(float *dest, float *a, float *b)
{
  const int i = threadIdx.x;
  dest[i] = a[i] * b[i];
}
"""
)

multiply_them = mod.get_function("multiply_them")

a = numpy.random.randn(400).astype(numpy.float32)
b = numpy.random.randn(400).astype(numpy.float32)

dest = numpy.zeros_like(a)
multiply_them(drv.Out(dest), drv.In(a), drv.In(b), block=(400, 1, 1))

print(dest - a * b)

Additional Python bindings to simplify matrix multiplication operations can be found in the program pycublas.^[33]

import numpy
from pycublas import CUBLASMatrix

A = CUBLASMatrix(numpy.mat(1, 2, 3], [4, 5, 6, numpy.float32))
B = CUBLASMatrix(numpy.mat(2, 3], [4, 5], [6, 7, numpy.float32))
C = A * B
print(C.np_mat())

while CuPy directly replaces NumPy:^[34]

import cupy

a = cupy.random.randn(400)
b = cupy.random.randn(400)

dest = cupy.zeros_like(a)

print(dest - a * b)

GPUs supported

Supported CUDA Compute Capability versions for CUDA SDK version and Microarchitecture (by code name):

Note: CUDA SDK 10.2 is the last official release for macOS, as support will not be available for macOS in newer releases.

CUDA Compute Capability by version with associated GPU semiconductors and GPU card models (separated by their various application areas):

'*' – OEM-only products

Version features and specifications

^[53]

Data types

Note: Any missing lines or empty entries do reflect some lack of information on that exact item.^[54]

Tensor cores

Note: Any missing lines or empty entries do reflect some lack of information on that exact item.^[57][58]

^{[66][67][68][69]}

Technical Specification

Multiprocessor Architecture

For more information read the Nvidia CUDA programming guide.^[111]

Current and future usages of CUDA architecture

• Accelerated rendering of 3D graphics
• Accelerated interconversion of video file formats
• Accelerated encryption, decryption and compression
• Bioinformatics, e.g. NGS DNA sequencing BarraCUDA^[112]
• Distributed calculations, such as predicting the native conformation of proteins
• Medical analysis simulations, for example virtual reality based on CT and MRI scan images
• Physical simulations,^[113] in particular in fluid dynamics
• Neural network training in machine learning problems
• Face recognition
• Volunteer computing projects, such as SETI@home and other projects using BOINC software
• Molecular dynamics
• Mining cryptocurrencies
• Structure from motion (SfM) software

See also

• SYCL – an open standard from Khronos Group for programming a variety of platforms, including GPUs, with single-source modern C++, similar to higher-level CUDA Runtime API (single-source)
• BrookGPU – the Stanford University graphics group's compiler
• Array programming
• Parallel computing
• Stream processing
• rCUDA – an API for computing on remote computers
• Molecular modeling on GPUs
• Vulkan – low-level, high-performance 3D graphics and computing API
• OptiX – ray tracing API by NVIDIA
• CUDA binary (cubin) – a type of fat binary
• Numerical Library Collection – by NEC for their vector processor

References

Further reading

• Buck, Ian; Foley, Tim; Horn, Daniel; Sugerman, Jeremy; Fatahalian, Kayvon; Houston, Mike; Hanrahan, Pat (2004-08-01). "Brook for GPUs: stream computing on graphics hardware". ACM Transactions on Graphics 23 (3): 777–786. doi:10.1145/1015706.1015800. ISSN 0730-0301. https://dl.acm.org/doi/10.1145/1015706.1015800. 
• Nickolls, John; Buck, Ian; Garland, Michael; Skadron, Kevin (2008-03-01). "Scalable Parallel Programming with CUDA: Is CUDA the parallel programming model that application developers have been waiting for?". Queue 6 (2): 40–53. doi:10.1145/1365490.1365500. ISSN 1542-7730. https://dl.acm.org/doi/10.1145/1365490.1365500. 

External links

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