- control and data paths
- pipeline design
- cache design
- - Carry Look-ahead Adder (CLA)
- - Carry Save Adder (CSA)
- - Prefix Adder (Prefix)* Multiplier
- - Divider
- ALU (Arithmetic Logical Unit)
- FF Metastability (pdf)
- FF Min Max Timing Constraints (pdf)
- FF Clock Skew Timing Constraints (pdf)
- Synchronizer (pdf)
- Resolution Time Analysis (pdf)
- FSM State Encoding
- FSM Types : Mealy and Moore Machines
- FSM Example (pdf)
- - Reese's Lecture Note
- Microprogramming Design (pdf)
- Barrel Shifter (3A.pdf)
- Booth Multiplier
- Content Addressable Memory (pdf)
- Address Partition (pdf)
- Cache Mapping (pdf)
- Intersystem Communication (pdf)
Implementation in Hardware
Implementation in Software
- Instruction Set (pdf)
- Data Path (pdf)
- Control Path (pdf)
- FPGA Implementation (pdf)
go to [ Electrical_&_Computer_Engineering_Studies ]